TI SN74AHC257D

SN54AHC257, SN74AHC257
QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS
WITH 3-STATE OUTPUTS
SCLS349C – MAY 1996 – REVISED JULY 1998
D
SN54AHC257 . . . J OR W PACKAGE
SN74AHC257 . . . D, DB, DGV, N, OR PW PACKAGE
(TOP VIEW)
Operating Range 2-V to 5.5-V VCC
EPIC  (Enhanced-Performance Implanted
CMOS) Process
Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB), Thin Very Small-Outline (DGV), Thin
Shrink Small-Outline (PW), and Ceramic
Flat (W) Packages, Ceramic Chip Carriers
(FK), and Standard Plastic (N) and Ceramic
(J) DIPs
A/B
1A
1B
1Y
2A
2B
2Y
GND
description
These quadruple 2-line to 1-line data
selectors/multiplexers are designed for 2-V to
5.5-V VCC operation.
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
OE
4A
4B
4Y
3A
3B
3Y
1A
A/B
NC
VCC
OE
SN54AHC257 . . . FK PACKAGE
(TOP VIEW)
The ’AHC257 devices are designed to multiplex
signals from 4-bit data sources to 4-output data
lines in bus-organized systems. The 3-state
outputs do not load the data lines when the
output-enable (OE) input is at a high logic level.
1B
1Y
NC
2A
2B
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
4A
4B
NC
4Y
3A
2Y
GND
NC
3Y
3B
To ensure the high-impedance state during power
up or power down, OE should be tied to VCC
through a pullup resistor; the minimum value of
the resistor is determined by the current-sinking
capability of the driver.
4
PRODUCT PREVIEW
D
D
NC – No internal connection
The SN54AHC257 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74AHC257 is characterized for
operation from –40°C to 85°C.
FUNCTION TABLE
INPUTS
OE
A/B
A
B
OUTPUT
Y
H
X
X
X
Z
L
L
L
X
L
L
L
H
X
H
L
H
X
L
L
L
H
X
H
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
Copyright  1998, Texas Instruments Incorporated
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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1
SN54AHC257, SN74AHC257
QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS
WITH 3-STATE OUTPUTS
SCLS349C – MAY 1996 – REVISED JULY 1998
logic symbol†
OE
A/B
1A
1B
2A
2B
3A
3B
4A
4B
15
1
EN
G1
2
1
3
MUX
4
1Y
1
5
7
6
11
9
10
14
12
13
2Y
3Y
4Y
PRODUCT PREVIEW
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, DB, DGV, J, N, PW, and W packages.
logic diagram (positive logic)
OE
A/B
1A
1B
2A
2B
3A
3B
4A
4B
15
1
2
4
5
7
2Y
6
11
9
3Y
10
14
12
13
Pin numbers shown are for the D, DB, DGV, J, N, PW, and W packages.
2
1Y
3
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4Y
SN54AHC257, SN74AHC257
QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS
WITH 3-STATE OUTPUTS
SCLS349C – MAY 1996 – REVISED JULY 1998
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
recommended operating conditions (see Note 3)
SN54AHC257
VCC
Supply voltage
VIH
High-level input voltage
VCC = 2 V
VCC = 3 V
VCC = 5.5 V
VCC = 2 V
VIL
Low-level input voltage
SN74AHC257
MIN
MAX
MIN
MAX
2
5.5
2
5.5
1.5
V
1.5
2.1
2.1
3.85
3.85
0.5
VCC = 3 V
VCC = 5.5 V
UNIT
V
0.5
0.9
0.9
1.65
1.65
V
VI
VO
Input voltage
0
5.5
0
5.5
V
Output voltage
0
VCC
–50
0
VCC
–50
V
IOH
High-level output current
VCC = 2 V
VCC = 3.3 V ± 0.3 V
VCC = 5 V ± 0.5 V
VCC = 2 V
IOL
∆t/∆v
Low-level output current
Input transition rise or fall rate
–4
–4
–8
–8
50
50
VCC = 3.3 V ± 0.3 V
VCC = 5 V ± 0.5 V
4
4
8
8
VCC = 3.3 V ± 0.3 V
VCC = 5 V ± 0.5 V
100
100
20
20
mA
mA
mA
mA
ns/V
TA
Operating free-air temperature
–55
125
–40
85
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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3
PRODUCT PREVIEW
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131°C/W
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
SN54AHC257, SN74AHC257
QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS
WITH 3-STATE OUTPUTS
SCLS349C – MAY 1996 – REVISED JULY 1998
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
IOH = –50 mA
1.9
2
1.9
1.9
MAX
SN74AHC257
MIN
3
2.9
2.9
4.4
4.5
4.4
4.4
IOH = –4 mA
3V
2.58
2.48
2.48
IOH = –8 mA
4.5 V
3.94
3.8
3.8
IOL = 4 mA
PRODUCT PREVIEW
2V
MIN
2.9
VOL
4
SN54AHC257
3V
IOL = 50 mA
IOZ
Ci
TA = 25°C
TYP
MAX
4.5 V
VOH
II
ICC
MIN
VCC
IOL = 8 mA
VI = VCC or GND
VI = VCC or GND,
VO = VCC or GND
VI = VCC or GND
IO = 0
MAX
UNIT
V
2V
0.1
0.1
0.1
3V
0.1
0.1
0.1
4.5 V
0.1
0.1
0.1
3V
0.36
0.5
0.44
4.5 V
0.36
0.5
0.44
5.5 V
±0.1
±1
±1
mA
5.5 V
4
40
40
mA
5.5 V
±0.25
±2.5
±2.5
mA
5V
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V
pF
• DALLAS, TEXAS 75265
SN54AHC257, SN74AHC257
QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS
WITH 3-STATE OUTPUTS
SCLS349C – MAY 1996 – REVISED JULY 1998
switching characteristics over recommended operating free-air temperature range,
VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
SN54AHC257
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
tPLH*
tPHL*
A or B
Y
CL = 15 pF
ns
tPLH*
tPHL*
A/B
Y
CL = 15 pF
ns
tPZH*
tPZL*
OE
Y
CL = 15 pF
ns
tPHZ*
tPLZ*
OE
Y
CL = 15 pF
ns
tPLH
tPHL
A or B
Y
CL = 50 pF
ns
tPLH
tPHL
A/B
Y
CL = 50 pF
ns
tPZH
tPZL
OE
Y
CL = 50 pF
ns
tPHZ
tPLZ
OE
Y
CL = 50 pF
ns
TA = 25°C
MIN
TYP
MAX
MIN
MAX
UNIT
PRODUCT PREVIEW
PARAMETER
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
switching characteristics over recommended operating free-air temperature range,
VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
SN74AHC257
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
MIN
TA = 25°C
TYP
MAX
MIN
MAX
UNIT
tPLH
tPHL
A or B
Y
CL = 15 pF
ns
tPLH
tPHL
A/B
Y
CL = 15 pF
ns
tPZH
tPZL
OE
Y
CL = 15 pF
ns
tPHZ
tPLZ
OE
Y
CL = 15 pF
ns
tPLH
tPHL
A or B
Y
CL = 50 pF
ns
tPLH
tPHL
A/B
Y
CL = 50 pF
ns
tPZH
tPZL
OE
Y
CL = 50 pF
ns
tPHZ
tPLZ
OE
Y
CL = 50 pF
ns
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
SN54AHC257, SN74AHC257
QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS
WITH 3-STATE OUTPUTS
SCLS349C – MAY 1996 – REVISED JULY 1998
switching characteristics over recommended operating free-air temperature range,
VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
SN54AHC257
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
tPLH*
tPHL*
A or B
Y
CL = 15 pF
ns
tPLH*
tPHL*
A/B
Y
CL = 15 pF
ns
tPZH*
tPZL*
OE
Y
CL = 15 pF
ns
tPHZ*
tPLZ*
OE
Y
CL = 15 pF
ns
tPLH
tPHL
A or B
Y
CL = 50 pF
ns
tPLH
tPHL
A/B
Y
CL = 50 pF
ns
tPZH
tPZL
OE
Y
CL = 50 pF
ns
tPHZ
tPLZ
OE
Y
CL = 50 pF
ns
PRODUCT PREVIEW
PARAMETER
TA = 25°C
MIN
TYP
MAX
MIN
MAX
UNIT
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
switching characteristics over recommended operating free-air temperature range,
VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
SN74AHC257
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
MIN
6
TA = 25°C
TYP
MAX
MIN
MAX
UNIT
tPLH
tPHL
A or B
Y
CL = 15 pF
ns
tPLH
tPHL
A/B
Y
CL = 15 pF
ns
tPZH
tPZL
OE
Y
CL = 15 pF
ns
tPHZ
tPLZ
OE
Y
CL = 15 pF
ns
tPLH
tPHL
A or B
Y
CL = 50 pF
ns
tPLH
tPHL
A/B
Y
CL = 50 pF
ns
tPZH
tPZL
OE
Y
CL = 50 pF
ns
tPHZ
tPLZ
OE
Y
CL = 50 pF
ns
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN54AHC257, SN74AHC257
QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS
WITH 3-STATE OUTPUTS
SCLS349C – MAY 1996 – REVISED JULY 1998
noise characteristics VCC = 5 V, CL = 50 pF, TA = 25°C (see Note 4)
SN74AHC257
PARAMETER
MIN
TYP
MAX
UNIT
VOL(P)
Quiet output, maximum dynamic VOL
V
VOL(V)
Quiet output, minimum dynamic VOL
V
VOH(V)
Quiet output, minimum dynamic VOH
V
VIH(D)
High-level dynamic input voltage
V
VIL(D)
Low-level dynamic input voltage
NOTE 4: Characteristics are for surface-mount packages only.
V
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER
TEST CONDITIONS
Power dissipation capacitance
No load,
f = 1 MHz
TYP
UNIT
pF
PRODUCT PREVIEW
Cpd
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SN54AHC257, SN74AHC257
QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS
WITH 3-STATE OUTPUTS
SCLS349C – MAY 1996 – REVISED JULY 1998
PARAMETER MEASUREMENT INFORMATION
RL = 1 kΩ
From Output
Under Test
Test
Point
From Output
Under Test
VCC
Open
S1
TEST
GND
CL
(see Note A)
CL
(see Note A)
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open Drain
Open
VCC
GND
VCC
LOAD CIRCUIT FOR
3-STATE AND OPEN-DRAIN OUTPUTS
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
VCC
50% VCC
Timing Input
0V
tw
tsu
VCC
50% VCC
50% VCC
Input
th
VCC
50% VCC
Data Input
50% VCC
PRODUCT PREVIEW
0V
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
VCC
50% VCC
Input
50% VCC
tPLH
In-Phase
Output
tPHL
50% VCC
tPHL
Out-of-Phase
Output
0V
VOH
50% VCC
VOL
VCC
Output
Control
50% VCC
0V
tPZL
Output
Waveform 1
S1 at VCC
(see Note B)
tPLH
50% VCC
VOH
50% VCC
VOL
50% VCC
Output
Waveform 2
S1 at GND
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
tPLZ
50% VCC
tPZH
≈ VCC
VOL + 0.3 V
VOL
tPHZ
50% VCC
VOH – 0.3 V
VOH
≈0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns.
D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
8
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Copyright  1998, Texas Instruments Incorporated