PCA0300A PHASE LOCKED LOOP 9939 Via Pasar • San Diego, CA 92126 TEL (858) 621-2700 FAX (858) 621-2722 Rev A1 PHASE NOISE (1 Hz BW, typical) -70 -80 -90 -100 -110 FEATURES • Frequency Range: 275 - 325 MHz • Step Size: 100 KHz • cPLL - Style Package APPLICATIONS • Satellite Modems • Mobile Radios • CATV -120 -130 -140 -150 2 10 3 4 10 10 5 6 10 10 VALUE 275 - 325 UNITS MHz RMS Phase Error (100 Hz - 100 KHz) 1.0 Harmonic Suppression (2nd, typ.) Sideband Spurs (typ.) -7 -65 ° dBc Power Output 4±3 dBm Load Impedance 50 Ω 100 KHz 1250 µΑ 3 mSec 5 -40 to 85 mSec PERFORMANCE SPECIFICATIONS Frequency Range Step Size Charge Pump Output Current Switching Speed (typ., adjacent channel) Startup Lock Time (typ.) Operating Temperature Range dBc °C cPLL Package Style POWER SUPPLY REQUIREMENTS Supply Voltage (Vcc, nom.) Supply Current (Icc, typ.) 5 Vdc 24 mA All specifications are typical unless otherwise noted and subject to change without notice. APPLICATION NOTES • AN-107 : How to Solder Z-COMM VCOs / PLLs • AN-200 : Mounting and Grounding of Z-COMM PLLs • AN-201 : PLL Fundamentals AN-202 : PLL Functional Description NOTES: Reference Oscillator Signal: 5 MHz< f osc <100 MHz Frequency Synthesizer IC: Analog Devices - ADF4113 © Z-Communications, Inc. Page 1 All rights reserved LOW COST - HIGH PERFORMANCE PHASE LOCKED LOOP PCA0300A PAGE 2 POWER PLL OUTPUT SPECTRUM FREQUENCY OFFSET (KHz) POWER CURVE, typ. 25 °c PHYSICAL DIMENSIONS 12 11 1. The inside radius of all 14 half holes at the perimeter of the board 10 are plated to provide a surface for the attachment of the PLL Module to the motherboard. 5 pads are for grounding, 8 pads are for signal interface. 2. The surface of the shield is tin-plated and may be soldered to. 1 Bottom View 9 The shield's base metal is brass. 3.The ground plane on the bottom side is ground and attaches to a ground track on the top side of the board as well as to the shield. Top View 2 8 4. Unless otherwise noted all dimensions are in inches. 5.Unless otherwise noted all tolerances are as follows: .xxx = ± .010 3 7 P1 RF OUTPUT P2 REFERENCE OSCILLATOR INPUT 4 5 6 P3 CLOCK P4 DATA P5 LOAD ENABLE P6 LOCK DETECT SIDE VIEW P7 VCC P8 GROUND P9 NO CONNECTION P10-12 GROUND © Z-Communications, Inc. Page 2 Printed in the U.S.A.