PSA0869A-LF PHASE LOCKED LOOP 9939 Via Pasar • San Diego, CA 92126 TEL (858) 621-2700 FAX (858) 621-2722 Rev A1 PHASE NOISE (1 Hz BW, typical) FEATURES • Frequency Range: 865 - 870 MHz • Step Size: 50 KHz • PLL-24 - Style Package APPLICATIONS • Basestations • Satellite Communications • Mobile Radios VALUE 865 - 870 PERFORMANCE SPECIFICATIONS Frequency Range UNITS MHz dBc/Hz Phase Noise @ 10 kHz offset (1 Hz BW, typ.) -100 Harmonic Suppression (2nd, typ.) -15 -65 dBc 2.5±2.5 dBm Sideband Spurs (typ.) Power Output Load Impedance 50 Step Size 50 dBc KHz 1250 Charge Pump Output Current Switching Speed (typ., adjacent channel) Startup Lock Time (typ.) Operating Temperature Range 2 mSec 2 -40 to 85 mSec °C PLL-24 Package Style POWER SUPPLY REQUIREMENTS Supply Voltage (Vcc, nom.) 5 Vdc Supply Current (Icc, typ.) 22 mA All specifications are typical unless otherwise noted and subject to change without notice. APPLICATION NOTES • AN-107 : How to Solder Z-COMM VCOs / PLLs • AN-200 : Mounting and Grounding of Z-COMM PLLs • AN-201 : PLL Fundamentals AN-202 : PLL Functional Description NOTES: Reference Oscillator Signal: 5 MHz< <100 MHz Frequency Synthesizer: Analog Devices - ADF4106 © Z-Communications, Inc. Page 1 All rights reserved PSA0869A-LF LOW COST - HIGH PERFORMANCE PHASE LOCKED LOOP PAGE 2 VCO TUNING CURVE, typ. 940 920 FREQUENCY (MHz) 900 880 860 85 840 820 25 800 -40 °c °c °c 780 760 740 0 0.5 1 1.5 2 2.5 3 3.5 4 TUNING VOLTAGE (Vdc) VCO POWER CURVE, typ. OUTPUT POWER (dBm) 8 7 6 5 4 3 2 25 1 °c 0 -1 -2 -3 761 788 811 830 848 865 882 898 914 FREQUENCY (MHz) PHYSICAL DIMENSIONS PLL-24 415-0089 REV. A (DRAWING NOT TO SCALE) 0.140 0.481 0.606 0.631 0.396 0.311 0.226 0.141 0.000 0.026 24 23 22 21 20 DETAIL A TABS RANGE: SEE NOTE 5 (4 PLACES) 1 19 2 18 17 3 16 4 TOP 5 0.000 15 6 14 7 13 0.025 0.178 PIN 1 8 0.263 .055 0.348 0.433 0.518 .032 BOTTOM 0.603 .015 .030 SEE DETAIL A 0.688 0.841 DETAIL B (TYP) 0.866 (8 PLACES) SEE DETAIL B © Z-Communications, Inc. Page 2 1. The inside radius of all 24 half holes at the perimeter of the board are plated to provide a surface for the attachment of the PLL Module to the PCB. 16 pads are for grounding, 8 pads are for signal interface. 2. The surface of the shield is tin-plated and may be soldered to. The shield's base metal is cold rolled steel. 3.The ground plane on the bottom side is ground and attaches to a ground track on the top side of the board as well as to the shield. 4. Unless otherwise noted all dimensions are in inches. 5. Unless otherwise noted all tolerances are as follows: .xxx = ± .010 9 10 11 12 P1 P2-4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18-24 RF OUTPUT GROUND REFERENCE OSCILLATOR INPUT GROUND CLOCK DATA GROUND LOAD ENABLE GROUND LOCK DETECT VCC GROUND GROUND GROUND NO CONNECTION GROUND Printed in the U.S.A.