TI SN74ALS1002A

SDAS238 − D2661, DECEMBER 1983 − REVISED MAY 1986
•
•
•
•
Quad Versions of ’ALS805A
Buffer Version of ’ALS02
Package Options Include Plastic Small
Outline Packages, Ceramic Chip Carriers,
and Standard Plastic and Ceramic 300-mil
DIPs
Dependable Texas Instruments Quality and
Reliability
SN54ALS1002A . . . J PACKAGE
SN74ALS1002A . . . D OR N PACKAGE
(TOP VIEW)
1Y
1A
1B
2Y
2A
2B
GND
description
These devices contain four independent 2-input
NOR buffers. They perform the Boolean functions
Y = A + B or Y = A•B in positive logic.
OUTPUT
L
L
L
H
L
1B
2A
2B
3A
3B
4A
4B
2
≥1
1
5
4
6
6
9
7
8
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
1A
1Y
1B
2A
2Y
2B
10
9
11
10
4B
NC
4A
NC
3Y
logic diagram (positive logic)
3
8
11
5
NC − No internal connection
logic symbol†
1A
12
4
2B
GND
NC
3A
3B
X
H
3
VCC
4Y
4B
4A
3Y
3B
3A
4
Y
X
13
1A
1Y
NC
V CC
4Y
1B
NC
2Y
NC
2A
FUNCTION TABLE
(each gate)
H
14
2
SN54ALS1002A . . . FK PACKAGE
(TOP VIEW)
The SN54ALS1002A is characterized for operation over the full military temperature range of
−55°C to 125°C. The SN74ALS1002A is
characterized for operation from 0°C to 70°C.
INPUTS
A
B
1
3A
3Y
3B
13
12
4A
4Y
4B
1Y
2Y
3Y
4Y
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for D, J, and N packages.
Copyright  1986, Texas Instruments Incorporated
5BASIC
!"#$ % &'!!($ #% )'*+&#$ ,#$(!,'&$% &!" $ %)(&&#$% )(! $.( $(!"% (/#% %$!'"($%
%$#,#!, 0#!!#$1- !,'&$ )!&(%%2 ,(% $ (&(%%#!+1 &+',(
$(%$2 #++ )#!#"($(!%-
•
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POST OFFICE BOX 1443 HOUSTON, TEXAS 77001
•
1
SDAS238 − D2661, DECEMBER 1983 − REVISED MAY 1986
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Operating free-air temperature range: SN54ALS1002A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C
SN74ALS1002A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
recommended operating conditions
SN54ALS1002A
SN74ALS1002A
MIN
NOM
MAX
MIN
NOM
MAX
4.5
5
5.5
4.5
5
5.5
UNIT
VCC
VIH
Supply voltage
VIL
IOH
Low-level input voltage
0.7
0.8
V
High-level output current
−1
−2.6
mA
IOL
TA
Low-level output current
24
mA
70
°C
High-level input voltage
2
2
V
12
Operating free-air temperature
−55
125
V
0
electrical characteristics over recommended operating-free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VCC = 4.5 V,
VCC = 4.5 V to 5.5 V,
II = − 18 mA
IOH = − 0.4 mA
VCC = 4.5 V,
VCC = 4.5 V,
IOH = − 1 mA
IOH = − 2.6 mA
VOL
VCC = 4.5 V,
VCC = 4.5 V,
IOL = 12 mA
IOL = 24 mA
II
IIH
VCC = 5.5 V,
VCC = 5.5 V,
VI = 7 V
VI = 2.7 V
IIL
IO†
VCC = 5.5 V,
VCC = 5.5 V,
VI = 0.4 V
VO = 2.25 V
ICCH
ICCL
VCC = 5.5 V,
VCC = 5.5 V,
VI = 0 V
VI = 4.5 V
VOH
SN54ALS1002A
TYP† MAX
TEST CONDITIONS
MIN
SN74ALS1002A
TYP† MAX
MIN
−1.5
VCC −2
2.4
−1.5
UNIT
V
VCC −2
3.3
V
2.4
0.25
−30
3.2
0.4
0.25
0.4
0.35
0.5
V
0.1
0.1
20
20
µA
−0.1
−0.1
mA
−112
−30
mA
−112
mA
1.7
2.8
1.7
2.8
mA
5.6
9
5.6
9
mA
† All typical values are at VCC = 5 V, TA = 25°C.
‡ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
switching characteristics (see Note 1)
PARAMETER
VCC = 5 V,
CL = 50 pF,
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
RL = 500 Ω,
FROM
TO
RL = 500 Ω,
(INPUT)
(OUTPUT)
TA = 25°C
’ALS1002A
MAX
MIN
MAX
A or B
Y
4
2
10
2
8
ns
A or B
Y
4
2
10
2
7
ns
TYP
tPLH
tPHL
NOTE 1: Load circuit and voltage waveforms are shown in Section 1.
2
•
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001
•
TA = MIN to MAX
SN54ALS1002A
SN74ALS1002A
MIN
UNIT
PACKAGE OPTION ADDENDUM
www.ti.com
9-Oct-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
JM38510/38402B2A
ACTIVE
LCCC
FK
20
1
TBD
JM38510/38402BCA
ACTIVE
CDIP
J
14
1
TBD
A42 SNPB
N / A for Pkg Type
JM38510/38402BCA
ACTIVE
CDIP
J
14
1
TBD
A42 SNPB
N / A for Pkg Type
SN74ALS1002AN
OBSOLETE
PDIP
N
14
TBD
Call TI
Call TI
SN74ALS1002AN
OBSOLETE
PDIP
N
14
TBD
Call TI
Call TI
Lead/Ball Finish
MSL Peak Temp (3)
POST-PLATE N / A for Pkg Type
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
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information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
18
17
16
15
14
13
NO. OF
TERMINALS
**
12
19
11
20
10
A
B
MIN
MAX
MIN
MAX
20
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
28
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
9
22
8
44
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
23
7
52
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
24
6
68
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
84
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
B SQ
A SQ
25
5
26
27
28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140 / D 10/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a metal lid.
The terminals are gold plated.
Falls within JEDEC MS-004
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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