TI BQ25050DQCT

bq25050
www.ti.com
SLUSA33 – MARCH 2010
1A, Single-Input, Single Cell Li-Ion Battery Charger with 50-mA LDO, External Power Path
Control, and Single Input Interface
Check for Samples: bq25050
FEATURES
1
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•
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DESCRIPTION
30V input Rating, With 10.5V Over-Voltage
Protection (OVP)
FET Controller for External Battery FET for
External Power Path Control (BGATE)
Input Voltage Dynamic Power Management
50mA integrated Low Dropout Linear
Regulator (LDO)
Programmable Charge Current Through Single
Input Interface (CTRL)
0.5% Battery Voltage Regulation Accuracy
7% Charge Current Regulation Accuracy
Thermal Regulation and Protection
Battery NTC Monitoring During Charge and
Discharge
Status Indication – Charging/Done and
Temperature Faults
Available in small 2mm × 3mm 10 Pin SON
Package
The bq25050 is a highly integrated Li-Ion linear
battery charger targeted at space-limited portable
applications. It operates from either a USB port or AC
Adapter and charges a single-cell Li-Ion battery with
up to 1A of charge current. The 30V input voltage
range with input over-voltage protections supports
low-cost unregulated adapters.
The bq25050 has a single power output that charges
the battery. The system load is connected to OUT.
The low-battery system startup circuitry maintains
OUT greater than 3.4V whenever an input source is
connected. This allows the system to start-up and run
whenever an input source is connected regardless of
the battery voltage. The charge current is
programmable up to 1A using the CTRL input.
Additionally, a 4.9V 50mA LDO is integrated into the
IC for supplying low power external circuitry.
The battery is charged in three phases: conditioning,
constant current and constant voltage. In all charge
phases, an internal control loop monitors the IC
junction temperature and reduces the charge current
if an internal temperature threshold is exceeded. The
charger power stage and charge current sense
functions are fully integrated. The charger function
has high accuracy current and voltage regulation
loops, charge status display, and charge termination.
APPLICATIONS
•
•
•
•
Smart Phones
Mobile Phones
Portable Media Players
Low Power Handheld Devices
TYPICAL APPLICATION CIRCUIT
VGPIO
VGPIO
bq25050
USB or Adaptor
VBUS
D+
DGND
1
R2
100kΩ
CHG
8
OUT
10
STATUS
IN
C1
0.1uF
VDD
C2
1uF
QBAT
BGATE 9
7
CTRL
BAT
HOST
6
PACK+
2
IMON
3
VSS
TS
5
LDO
4
TEMP
C4
0.1uF
R1
1 kΩ
PACK -
VLDO
C3
0.1uF
ISENSE
GPIO
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2010, Texas Instruments Incorporated
bq25050
SLUSA33 – MARCH 2010
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
PART NO.
MARKING
MEDIUM
QUANTITY
bq25050DQCR
DAM
Tape and Reel
3000
bq25050DQCT
DAM
Tape and Reel
250
PACKAGE DISSIPATION RATINGS TABLE
PACKAGE
RqJA
RqJC
TA < 25°C POWER
RATING
DERATING FACTOR
ABOVE TA = 25°C
10 Pin 2mm × 3mm SON (1)
58.7°C/W (2)
3.9°C/W
1.70W
0.017W/°C
(1)
(2)
Maximum power dissipation is a function of TJ(max), RqJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD = [TJ(max) - TA]/RqJA.
This data is based on using the JEDEC High-K board and the exposed die pad is connected to a Cu pad on the board. The pad is
connected to the ground plane by a 2×3 via matrix.
ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range (unless otherwise noted)
VALUE / UNIT
IN (with respect to VSS)
–0.3 to 30 V
CTRL, TS, CHG, BGATE (with respect to VSS)
–0.3 to 7 V
Output Voltage
BAT, OUT, LDO, CHG, BGATE, IMON (with respect to VSS)
–0.3 to 7 V
Input Current (Continuous)
IN
1.2 A
Output Current (Continuous)
BAT
1.2 A
Output Current (Continuous)
LDO
100 mA
Output Sink Current
CHG
Input Voltage
5 mA
Junction temperature, TJ
–40°C to 150°C
Storage temperature, TSTG
–65°C to 150°C
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage
values are with respect to the network ground terminal unless otherwise noted.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
IN voltage range
VIN
IN operating voltage range
MIN
MAX
3.55
28
4.4
10.2
UNITS
V
IIN
Input current, IN
1
A
IOUT
Ouput Current in charge mode, OUT
1
A
TJ
Junction Temperature
125
°C
0
ELECTRICAL CHARACTERISTICS
Over junction temperature range 0°C ≤ TJ ≤ 125°C and VIN = 5V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
3.25
3.30
3.55
UNITS
INPUT
VUVLO
Under-voltage lock-out
VIN: 0V → 4V
VHYS-UVLO
Hysteresis on UVLO
VIN: 4V → 0V
2
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250
V
mV
Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): bq25050
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SLUSA33 – MARCH 2010
ELECTRICAL CHARACTERISTICS (continued)
Over junction temperature range 0°C ≤ TJ ≤ 125°C and VIN = 5V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
1.95
2.05
2.15
UNITS
VBATUVLO
Battery UVLO
VBAT rising
VHYS-BUVLO
Hysteresis on BAT UVLO
VBAT falling
VIN-SLP
Valid input source threshold VIN-SLP above
VBAT
Input power good if VIN > VBAT + VIN–SLP
VBAT = 3.6V, VIN: 3.5V → 4V
VHYS-INSLP
Hysteresis on VIN-SLP
VBAT = 3.6V, VIN: 4V → 3.5V
32
mV
tDGL(NO-IN)
Deglitch time, input power loss to charger
turn-off
Time measured from VIN: 5V → 2.5V 1µs
fall-time
32
ms
VOVP
Input over-voltage protection threshold
VIN: 5 V → 11 V
VHYS-OVP
Hysteresis on OVP
VIN: 11 V → 5 V
tDGL(OVP)
Input over-voltage deglitch time
tREC(OVP)
Input over-voltage recovery time
Time measured from VIN: 11V → 5V 1µs
fall-time to LDO = HI, VBAT = 3.5V
VIN_DPM
Input DPM threshold
VIN Falling, VIN-DPM enabled with CTRL
125
30
10.2
4.2
75
10.5
V
mV
150
10.8
mV
V
100
mV
100
µs
100
µs
4.30
4.4
V
120
150
µA
6
µA
QUIESCENT CURRENT
IBAT(PDWN)
Battery current into BAT, No input
connected
VIN = 0V, VCHG = High, TS Enabled
IBAT(DONE)
BAT current, charging terminated
VIN = 6V, VBAT > VBAT(REG)
10
µA
IIN(STDBY)
Standby current into IN pin
CTRL = HI, VIN < VOVP
0.5
mA
CTRL = HI, VIN ≥ VOVP
2
ICC
Active supply current, IN pin
VIN = 6V, no load on OUT pin, VBAT >
VBAT(REG), IC enabled
3
VIN = 0V, VCHG = Low, TS Disabled, TJ =
85°C
mA
BATTERY CHARGER FAST-CHARGE
VBAT(REG)
Battery charge regulation voltage
TA = 0°C to 125°C, IOUT = 50 mA
TA = 25°C
IIN(LIM)
Input current limit (selected by CTRL
interface)
4.16
4.20
4.23
4.179
4.200
4.221
4 pulses on CTRL
87
93
100
5 pulses on CTRL
174
187
200
6 pulses on CTRL
261
280
300
7 pulses on CTRL
348
374
400
8 pulses on CTRL
435
467
500
9 pulses on CTRL
608
654
700
10 pulses on CTRL
739
794
850
11 pulses on CTRL
864
935
1000
500
900
VDO(IN-OUT)
VIN – VOUT
VIN = 4.2V, IOUT = 0.75 A
KIMON
Input current monitor ratio
KIMON = IIMON / ICHG, RIMON = 1kΩ,
Current programmed using CTRL
VIMON(MAX)
Maximum IMON voltage
IMON open
IMON Accuracy
25 mA < IIN < 100 mA
–25%
25%
IIN = 100 mA to 1 A
–8.5%
5%
1
1.2
V
mA
mV
mA/A
1.25
V
PRE-CHARGE AND CHARGE DONE
VLOWV
Pre-charge to fast-charge transition
threshold
tDGL1(LOWV)
Deglitch time on pre-charge to fast-charge
transition
25
ms
tDGL2(LOWV)
Deglitch time on fast-charge to pre-charge
transition
25
ms
IPRECHARGE
Precharge current to BAT during precharge
mode
VBAT = 0V to 2.9V, Battery FET connected
Default termination current threshold
VIN = 5V, ICHARGE = 100 mA to 1 A
ITERM
External power path control disabled,
BGATE = VSS
2.4
2.5
2.6
External power path control enabled
2.8
2.9
3.0
VBAT = 0V to 2.5V, BGATE = VSS, Input
current limit regulated to IPRECHARGE
28
37
45
41.5
45
48.5
7.5
10.5
13.5
VBAT(REG)
–0.13V
VBAT(REG)
–0.1V
VBAT(REG)
–0.065V
V
mA
%ICHG
RECHARGE OR REFRESH
VRCH
Recharge detection threshold
VBAT falling
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ELECTRICAL CHARACTERISTICS (continued)
Over junction temperature range 0°C ≤ TJ ≤ 125°C and VIN = 5V (unless otherwise noted)
PARAMETER
tDGL(RCH)
TEST CONDITIONS
MIN
Deglitch time, recharge threshold detected
TYP
MAX
25
UNITS
ms
EXTERNAL POWER PATH CONTROL
VOUT(REG)
Output regulation voltage
VBAT ≤ 2.9 V
2.9 V < VBAT ≤ 3.6V
VBAT > 3.6 V
3.4
3.5
3.6
V
3.44
3.59
3.75
V
VBAT + Vdrop(QBAT)
V
VSUPP1
Enter supplement mode threshold
VBAT = 3.4 V, VOUT Falling
VOUT ≤
VBAT
-60mV
V
VSUPP2
Exit supplement mode threshold
VBAT = 3.4 V, VOUT Rising
VOUT ≥
VBAT-20mV
V
VLDO
LDO Output Voltage
VIN = 5.5V, ILDO = 0mA to 50mA
ILDO
Maximum LDO Output Current
VDO
Dropout Voltage
LDO
4.
4.9
5.1
60
VIN = 4.5V, ILDO = 50mA
V
mA
200
300
mV
CTRL INTERFACE
tCTRL-DGL
CTRL Deglitch timer
5
tCTRL-LATCH
CTRL Latch timer
2
ms
tCTRL-HIGH
High Duration on CTRL
50
1000
tCTRL-LOW
Low Time Duration on CTRL
50
1000
RPULLDOWN
CTRL Pulldown Resistor
ms
260
ms
µs
kΩ
LOGIC LEVELS ON CTRL, CHG, BGATE
VIL
Logic LOW input voltage
VIH
Logic HIGH input voltage
0.4
1.4
V
V
BATTERY-PACK NTC MONITOR (TS)
VTS_CLAMP
Maximum TS Voltage
ITS-0C
Current source for 0°C TS sensing
1.5
V
3.75
4
4.25
µA
ITS
Current source for 45°C and 60°C TS
sensing
19
20
21
µA
VCOLD
TS Cold Threshold, when BGATE is
disabled
VTS < VCOLD to begin charge
(Corresponds to 0°C, 2°C, 4°C (1)
0.55
0.575
0.600
V
VCUTOFF_0
TS Cold Cutoff Threshold
Temp falling (Corresponds to –1°C, 1°C,
3°C (1) (2))
0.575
0.600
0.625
V
VHOT_45
TS Hot Threshold (0°C to 45°C), when
BGATE is disabled
VTS > VHOT_45 to begin charge, 0°C to
45°C thresholds selected. (Corresponds to
40°C, 42°C, 44°C (1) (2))
0.44
0.45
0.46
V
VCUTOFF_45
TS Hot Cutoff Threshold (0°C to 45°C)
Temp rising (Corresponds to 45°C, 47°C,
49°C (1) (2))
0.365
0.375
0.385
V
VHOT_60
TS Hot Threshold (0°C to 60°C), when
BGATE is disabled
VTS > VHOT_60 to begin charge, 0°C to
60°C thresholds selected, Temp rising
(Corresponds to 54.5°C, 57°C, 60°C (1)
0.240
0.250
0.258
V
VCUTOFF_60
TS Hot Cutoff Threshold (0°C to 60°C)
Temp rising. (Corresponds to 58.5°C,
61.5°C, 64°C (1) (2))
0.204
0.213
0.223
V
V-20
–20°C TS Voltage
See
(1)
0.968
V80
+80°C TS Voltage
See
(1)
0.110
tdgl(TS)
Deglitch for TS Fault
Fault detected on TS to stop charge
VOL
Output LOW voltage
ISINK = 5 mA
IIH
Leakage current
V/CHG = 5 V
tFLSH(TS)
TS fault flash period
50% Duty Cycle, TS out of valid range
100
ms
(2)
)
(2)
)
V
V
25
ms
CHG OUTPUT
0.45
V
1
µA
THERMAL REGULATION
TJ(REG)
Temperature Regulation Limit
TJ rising
125
°C
TJ(OFF)
Thermal shutdown temperature
TJ rising
155
°C
(1)
(2)
4
Information is based on using the NCP15WB473F NTC thermistor.
Temperature references give design guidance only, actual absolute temperatures are not guaranteed.
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bq25050
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SLUSA33 – MARCH 2010
ELECTRICAL CHARACTERISTICS (continued)
Over junction temperature range 0°C ≤ TJ ≤ 125°C and VIN = 5V (unless otherwise noted)
PARAMETER
TJ(OFF-HYS)
Thermal shutdown hysteresis
TEST CONDITIONS
TJ falling
MIN
TYP
MAX
20
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UNITS
°C
5
bq25050
SLUSA33 – MARCH 2010
www.ti.com
DEVICE INFORMATION
SIMPLIFIED BLOCK DIAGRAM
LDO
+
Q1
Q2
OUT
VIN
Precharge
Current Source
+
IMON
+
125C
TJ
Charge
Pump
1.5V
+
IIN(REG)
External Power
Path Control
Mode
2.9V
BAT
VOUT(REG)
+
VIN_DPM
+
Charge
Pump
VOUT(MIN)
ILIM
TERMINATION
COMPARATOR
BGATE
+
VREF
+
VOUTMIN
150mV
VIN-DPM
Enable
External Power Path
Control Mode
Sleep Comparator
75mV
VBAT
+
CTRL
Digital
Decode
CHARGE
CONTROL
260k
OVP Comparator
+
VIN
VOUTMIN Enable
Comparator
VBAT
3.5V
+
VOVP
V IN
TS Current
VREF
Source Control
STATUS
OUTPUT
DISABLE
+
VREF
+
/CHG
TS COLD
TS HOT
TS
VSS
6
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SLUSA33 – MARCH 2010
PIN CONFIGURATION
IN
1
10
IMON
2
9
BGATE
VSS
3
8
CHG
OUT
bq 25050
LDO
4
7
CTRL
TS
5
6
BAT
10-pin 2mm x 3mm SON
PIN FUNCTIONS
PIN
NAME
NO.
I/O
DESCRIPTION
IN
1
I
Input power supply. IN is connected to the external DC supply (AC adapter or USB port). Bypass IN to VSS with
at least a 0.1µF ceramic capacitor.
IMON
2
O
Current monitoring output. Connect a 1kΩ resistor from IMON to VSS to monitor the input current. The voltage at
IMON ranges from 0V to 1V which corresponds to an input current from 0A to 1A.
VSS
3
–
Ground terminal. Connect to the thermal pad and the ground plane of the circuit.
LDO
4
O
LDO output. LDO is regulated to 4.9V and drives up to 50mA. Bypass LDO to VSS with a 0.1µF ceramic
capacitor. LDO is enabled when VUVLO < VIN < VOVP.
TS
5
I
Battery pack NTC monitoring input. Connect the battery pack 47-kΩ NTC from TS to VSS to monitor battery pack
temperature. The default pack temperature range is 0°C to 45°C thresholds.
CTRL
7
I
Single-input interface Input. Drive CTRL with pulses to enable/disable the device, enable/disable VIN-DPM, select
battery temperature range and select current limits. See the interface section for details on using the CTRL
interface.
CHG
8
I/O Charge status indicator open-drain output. CHG is pulled low while the device is charging the battery. CHG goes
high impedance when the battery is fully charged and does not indicate subsequent recharge cycles. CHG pulses
to indicate TS faults.
BAT
6
O
BGATE
9
I/O Battery P-Channel FET gate drive output. Connect BGATE to the gate of the external P-Channel FET that
connects the battery to OUT. Connect BGATE to VSS if the external FET is not used. No external capacitor is
recommended from BGATE to GND.
OUT
10
O
System output connection. OUT supplies the system with a minimum voltage of 3.4V (min.) to ensure system
operation whenever an input adapter is connected regardless of the battery voltage. Bypass OUT to VSS with a
1µF ceramic capacitor.
Pad
–
There is an internal electrical connection between the exposed thermal pad and the VSS pin of the device. The
thermal pad must be connected to the same potential as the VSS pin on the printed circuit board. Do not use the
thermal pad as the primary ground input for the device. VSS pin must be connected to ground at all times.
Thermal
PAD
Battery connection output. BAT is the sense input for the battery as well as the precharge current output. Connect
BAT to the battery and bypass BAT to VSS with a 0.1µF ceramic capacitor.
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APPLICATION CIRCUITS
VGPIO
VGPIO
bq25050
USB or Adaptor
VBUS
D+
DGND
1
R2
100kΩ
CHG
8
OUT
10
STATUS
IN
C1
0.1uF
VDD
C2
1uF
QBAT
BGATE 9
7
CTRL
BAT
6
TS
5
HOST
PACK+
2
TEMP
C4
0.1uF
IMON
R1
1 kΩ
PACK -
3
VSS
LDO
4
VLDO
C3
0.1uF
ISENSE
GPIO
Figure 1. Typical Application Circuit Using the External Power Path Control Feature
VGPIO
VGPIO
bq25050
USB or Adaptor
VBUS
D+
DGND
1
R2
100kΩ
CHG
8
OUT
10
STATUS
IN
C1
0.1uF
VDD
C2
1uF
7
CTRL
BGATE
9
BAT
6
TS
5
HOST
PACK+
2
TEMP
IMON
R1
1 kΩ
PACK -
3
VSS
LDO
4
VLDO
C3
0.1uF
ISENSE
GPIO
Figure 2. Typical Application Circuit Disabling the External Power Path Control Feature
8
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SLUSA33 – MARCH 2010
TYPICAL CHARACTERISTICS
Using circuit in Figure 1, TA = 25°C, unless otherwise specified
ADAPTER INSERTION
ENABLE USING CTRL
CTRL
2 V/div
VIN = 0 V - 5 V, VBAT = 3.3 V, ICHG = 280 mA
VIN = 5 V, VBAT = 3 V, ICHG = 280 mA
CHG
2 V/div
VIN
5 V/div
BGATE
2 V/div
BGATE
2 V/div
LDO
2 V/div
ICHG
0.5 A/div
IIN
100 mA/div
20 ms/div
10 ms/div
Figure 3.
Figure 4.
DISABLE USING CTRL
CONTROL CURRENT LIMIT - STEP UP
CTRL
2 V/div
LDO
2 V/div
CTRL
2 V/div
VIN = 5 V, VBAT = 3.4 V, ICHG = 280 mA
VIN = 5 V, VBAT = 3.4 V, ICHG = 93 mA to 935 mA
BGATE
2 V/div
IMON
500 mV/div
BGATE
2 V/div
IBAT
0.5 A/div
IIN
2 mA/div
1 ms/div
5 ms/div
Figure 5.
Figure 6.
CONTROL CURRENT LIMIT - STEP DOWN
BGATE FORCED ON
CTRL
2 V/div
VIN = 5 V, VBAT = 3.4 V, ICHG = 935 mA to 93 mA
CTRL
2 V/div
VBAT
2 V/div
Offset 4.1 V
VOUT
2 V/div
Offset 4.1 V
BGATE
2 V/div
BGATE
2 V/div
IMON
500 MV/div
IBAT
500 mA/div
VIN = 5 V, VBAT = 4.18 V, VBAT(REG) = 4.2 V
5 ms/div
1 ms/div
Figure 7.
Figure 8.
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TYPICAL CHARACTERISTICS (continued)
Using circuit in Figure 1, TA = 25°C, unless otherwise specified
CANCEL BGATE FORCED ON
INPUT OVP
VIN
10 V/div
CTRL
2 V/div
VIN = 5 V to 29 V, VBAT = 3.8 V
VBAT
2 V/div
Offset 4.1 V
VOUT
2 V/div
Offset 4.1 V
VBAT
2V/div
LDO
2 V/div
BGATE
2 V/div
VIN = 5 V, VBAT = 4.18 V, VBAT(REG) = 4.2 V
IBAT
0.5 A/div
1 ms/div
50 µs/div
Figure 9.
Figure 10.
PRE-CHARGE MODE TO MINIMUM OUTPUT REGULATION
MODE
MINIMUM OUTPUT REGULATION MODE TO CONSTANT
CURRENT (CC) MODE
VIN = 5 V, VBAT = 1.8 V to 3.45 V, ICHG = 467 mA
VIN = 5 V, VBAT = 2.4 V to 3.6 V, ICHG = 467 mA
VBAT
500 V/div
VBAT
500 V/div
IMON
500 mV/div
IMON
500 mV/div
BGATE
2 V/div
BGATE
2 V/div
IBAT
500 mA/div
IBAT
500 mA/div
20 ms/div
20 ms/div
Figure 11.
Figure 12.
PRE-CHARGE TO CONSTANT VOLTAGE (CV) MODE
VIN-DPM
VIN
2 V/div
VBAT
500 mV/div
IMON
500 mV/div
VIN = 5 V, VBAT = 2.8 V to 4.18 V, ICHG = 467 mA
IIN
500 mA/div
IMON
500 mV/div
BGATE
2 V/div
BGATE
2 V/div
IBAT
500 mA/div
20 ms/div
200 µs/div
Figure 13.
10
VIN = 5 V with current limit of 600 mA,
VBAT = 3.2 V, ICHG = 93 mA to 935 mA
Figure 14.
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SLUSA33 – MARCH 2010
TYPICAL CHARACTERISTICS (continued)
Using circuit in Figure 1, TA = 25°C, unless otherwise specified
SUPPLEMENT MODE
CHARGE CYCLE DEMO
VOUT
2 V/div
IMON
1 V/div
VBAT
2 V/div
BGATE
1 V/div
VIN = 5 V, ICHG = 280 mA,
BGATE =Enabled, CBAT = 2000 µF,
No battery connected,
RDSon from IN to OUT
IIN
100 mA/div
VOUT
2 V/div
IOUT
2 A/div
BGATE
2 V/div
VIN = 5 V, VBAT = 3.2 V,
ICHG = 935 mA, IOUT = 0 A to 2 A
20 ms/div
100 µs/div
Figure 15.
Figure 16.
BATTERY VOLTAGE
vs
CHARGE CURRENT
RDSON (From IN to OUT)
vs
JUNCTION TEMPERATURE
4.24
1.20
CV Mode
Iload = 500 mA
4.23
1.00
4.22
RDSON - W
VBAT - Battery Voltage - V
0.80
4.21
4.20
0.60
4.19
0.40
4.18
0.20
4.17
4.16
0
200
400
600
800
1000
0.00
-50
ICHRG - Charge Current - mA
Figure 17.
0
50
100
TJ - Junction Temperature - °C
150
Figure 18.
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TYPICAL CHARACTERISTICS (continued)
Using circuit in Figure 1, TA = 25°C, unless otherwise specified
INPUT CURRENT LIMIT
vs
INPUT VOLTAGE
OUTPUT VOLTAGE
vs
CHARGE CURRENT
4.00
1000
VBAT = 3 V
900
3.90
Dropout
Thermal Regulation
3.80
700
VOUT - Output Voltage - V
IINLIM - Input Current Limit - mA
800
600
500
400
300
3.70
3.60
3.50
3.40
3.30
200
3.20
100
3.10
0
4
5
6
7
8
9
10
11
External Power Path Control Mode
VBAT = 3 V
3.00
0.000
VIN - Input Voltage - V
0.200
0.400
0.600
0.800
1.000
ICHRG - Charge Current - mA
Figure 19.
Figure 20.
DETAILED FUNCTIONAL DESCRIPTION
The bq25050 is a highly integrated Li-Ion linear battery charger targeted at space-limited portable applications. It
operates from either a USB port or AC Adapter and charges a single-cell Li-Ion battery with up to 1A of charge
current. The 30V input voltage range with input over-voltage protections supports low-cost unregulated adapters.
The bq25050 has a single power output that charges the battery. The system load is connected to OUT. The
low-battery system startup circuitry maintains OUT pin voltage at VOUT(REG) whenever an input source is
connected. This allows the system to start-up and run whenever an input source is connected regardless of the
battery voltage. The charge current is programmable up to 1A using the CTRL input. Additionally, a 4.9V 50mA
LDO is integrated into the IC for supplying low power external circuitry.
External FET Controller (BGATE)
The External Power Path Control feature is implemented using the BGATE output. BGATE is also used to
enable/ disable the External Power Path Control feature. When power is first applied to either VBAT or VIN on the
bq25050, the BGATE output is tested. If the BGATE pin is connected to VSS, the External Power Path Control
feature is disabled. In order to enable the External Power Path Control feature after it has been disabled, the
battery and the input source must be removed and reconnected and BGATE must NOT be connected to VSS.
With External Power Path Control enabled, BGATE is used to drive an external P-channel MOSFET that
connects the battery to the system output. This state of this MOSFET is dependant on the battery voltage and
the IC status. In discharge mode, BGATE is pulled to GND to turn the MOSFET on fully. During discharge mode,
the output is connected directly to the battery. Discharge mode is entered under the following conditions:
1. IC disabled or no input power
2. Supplement mode
3. "Force On" – enabled through CTRL
When not in one of these conditions, the BGATE output is controlled by the bq25050 and changes depending on
which mode is required. See the Charging Operation section for more details.
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Enable/ Disable External Power Path Control
When power is first applied to the bq25050, either at the IN or BAT input, the bq25050 checks the BGATE
output. The device sources a small current out of BGATE for 32ms and monitors the voltage. If VBGATE is
connected to ground and the voltage does not rise above logic High, the External Power Path Control feature is
disabled and VLOWV is set to 2.5V. If the BGATE voltage rises above logic High, the External Power Path
Control feature is enabled and VLOWV is set to 2.9V. The bq25050 only does this check when power is initially
applied. Power must removed from IN and BAT and then reapplied to initiate another check. Figure 21 illustrates
the startup check procedure.
No Input Source or
Battery Connected
Input source OR
Battery connected?
NO
YES
Source Current to
BGATE
BGATE =
VSS?
YES
External
Power Path
Control
Disabled
V LOWV = 2.5V
NO
External
Power Path
Control
Enabled
VLOWV = 2.9V
Figure 21. BGATE Monitor Sequence
Charging Operation
The bq25050 charges a battery in 3 stages while maintaining a minimum system output. When the bq25050 is
enabled by CTRL, the battery voltage is monitored to verify which stage of charging must be used. The bq25050
charges in precharge mode, minimum output regulation mode, or normal CC/CV mode based on the battery
voltage.
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Charger Operation with External Power Path Control Mode Enabled
PRECHARGE
4.2V
CC FAST CHARGE
Maximum
Charge Current
(ILIM )
CV TAPER
System Voltage
IFASTCHG
3.5V
VLOWV
Battery Voltage
IPRECHG
CHG = Hi -Z
ITERM
Figure 22. Typical Charging Cycle with External Power Path Control Enabled
Precharge Mode (VBAT ≤ VLOWV)
The bq25050 enters precharge mode when VBAT ≤ VLOWV. Upon entering precharge mode, the battery is charged
with a 40mA current source and /CHG goes low. During precharge mode, VOUT is regulated to 3.5V and the
battery is charged from the internal fixed 40mA current source connected to the BAT output. With BGATE
connected to GND, the system output is connected to the battery and therefore the system voltage is equal to
the battery voltage.
Minimum Output Regulation Mode (2.9V<VBAT<3.6V)
Once VBAT exceeds 2.9V, the bq25050 enters Minimum Output Regulation Mode. While 2.9V<VBAT<3.6V, VOUT
is regulated to VOUT(REG) by the external FET (QBAT) while the internal FETs between IN and OUT is used to
regulate the fast charge current. The total current is shared between the output load and the battery. As the
system current increases, the battery charge current decreases. In order to maintain the minimum output
regulation voltage VOUT(REG), the system load must be less than the input current limit.
Normal CC/CV Mode
Once VBAT>3.6V, QBAT is fully turned on and VOUT = VBAT + Vdrop(Q1). At this point, the bq25050 is in constant
current (CC) mode where charge current is regulated using the internal FETs between IN and OUT. The VOUT
voltage is not regulated. The total current is shared between the output load and the battery. Once the battery
voltage charges up to VBAT(REG), the bq25050 enters constant voltage (CV) mode where VBAT is regulated to
VBAT(REG) and the current is reduced. Once the input current falls below the termination threshold (ITERM)
BGATE is turned off and CHG goes high impedance. The system output is regulated to 4.2V and the battery is
disconnected from OUT, however supplement mode is still available.
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Charger Operation With External Power Path Control Mode Disabled (BGATE = VSS)
PRECHARGE
CC FAST CHARGE
CV TAPER
VOUT(REG)
IFASTCHG
VLOWV
Battery
Current
Battery and
Output
Voltage
CHG = Hi-Z
IPRECHG
ITERM
Figure 23. Charging Cycle with External Power Path Control Disabled (BGATE = VSS)
Precharge Mode (VBAT ≤ VLOWV)
The bq25050 enters precharge mode when VBAT ≤ VLOWV. Upon entering precharge mode, CHG goes low and
the input current limit is set to IPRECHARGE. With BGATE connected to GND, the system output is connected to the
battery and therefore the system voltage is equal to the battery voltage. During precharge mode, the input
current is regulated to 50mA and as such, only loads up to 50mA are supported.
Normal CC/CV Mode
Once VBAT > VLOWV, the bq25050 enters constant current (CC) mode where charge current is regulated using the
internal MOSFETs between IN and OUT. The total current is shared between the output load and the battery.
Once the battery voltage charges up to VBAT(REG), the bq25050 enters constant voltage (CV) mode where
VBAT is regulated to VBAT(REG) and the current is reduced. Once the input current falls below the termination
threshold (ITERM), CHG goes high impedance but the system remains charging and regulates the output to
VBAT(REG).
Charge Current Translator (IMON)
When the charger is enabled, internal circuits generate a current proportional to the charge current at the IMON
input. The current out of IMON is 1/1000 (±10%) of the charge current. This current, when applied to the external
charge current programming resistor, R1 (see Figure 1), generates an analog voltage that can be monitored by
an external host to calculate the current sourced from BAT. Connect a 1kΩ resistor from IMON to VSS. The
voltage at IMON is calculated as:
VIMON = 1IN × 1 V/A
Using this output allows for the host to calculate the actual charging current and therefore perform more accurate
termination. The input current to the system must be monitored and subtracted from the current into the bq25050
which is show by VIMON.
Input Over Voltage Protection
The bq25050 contains an input over voltage protection circuit that disables the LDO output and charging when
the input voltage rises above VOVP. This prevents damage from faulty adapters. The OVP circuitry contains an
deglitch that prevents ringing on the input from line transients from tripping the OVP circuitry falsely. If an adapter
with an output greater than VOVP is plugged in, the IC completes power up and then shuts down if the voltage
remains above VOVP after the deglitch. The LDO remains off and charging remains disabled until the input
voltage falls below VOVP.
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Under-Voltage Lockout (UVLO)
The bq25050 remains in power down mode when the input voltage is below the under-voltage lockout threshold
(VUVLO). During this mode, the control input (CTRL) is ignored. The LDO, the charge FET connected between
IN and OUT are off and the status output (CHG) is high impedance. Once the input voltage rises above VUVLO,
the internal circuitry is turned on and the normal operating procedures are followed.
Input DPM Mode (VIN-DPM)
The input current into the bq25050 includes all load currents, i.e. the system load, LDO load, and battery charge
current. The total input current is regulated by the input current limit of the bq25050. The bq25050 utilizes the
VIN-DPM mode for operation from current-limited input sources. VIN-DPM is enabled at startup and active until
disabled by the CTRL interface. See the Single Input Interface (CTRL) section for more details.
When VIN-DPM is enabled, the input voltage is monitored. If VIN falls to VIN-DPM, the input current limit is reduced
to prevent the input voltage from falling further. This prevents the bq25050 from crashing poorly designed or
incorrectly configured USB sources. Figure 24 shows the VIN-DPM behavior to a current limited source. In this
figure the input source has a 200mA current limit and the device has started up with the 285mA current limit.
VIMON
500 mV/div
Input voltage falls due to
adapter current limit
VIN
2 V/div
Input current limit is
reduced to prevent
crashing the input
supply
ILIM
200 mA/div
1 ms/div
Figure 24. bq25050 VIN-DPM
External NTC Monitoring (TS)
The bq25050 provides a TS input for monitoring an external 47kΩ NTC thermistor. There are 2 temperature
thresholds that are monitored; the cold battery threshold (TCOLD) and the hot battery threshold (THOT). The TS
input is monitored at all times and disables charge if the temperature of the NTC falls outside of the operating
range. The operating range by default is 0°C to 45°C. An extended range of 0°C to 60°C is selectable using the
CTRL input. VTS is also used to monitor the battery temperature. The temperature range is based on the NTC
thermistor #NCP15WB473F.
The TS function remains on during battery discharge to enable the host to monitor the battery temperature. The
VTS reflects the battery temperature the same as when the battery is charged. The bq25050 does not monitor
this voltage, only the current source is active. Table 1 shows important temperatures and the corresponding
voltage. This table can be used by the host to determine proper operation limits. The TS function is disabled if
the CHG voltage falls below logic low while in battery discharge mode.
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Table 1. VTS vs Temperature
(47kΩ Thermistor, b=4050, NCP15WB473F)
TEMPERATURE
VTS
–20°C
0.968 V
0°C
0.600 V
45°C
0.450 V
60°C
0.250 V
80°C
0.110 V
50mA LDO (LDO)
The LDO output of the bq25050 is a low dropout linear regulator (LDO) that supplies up to 50mA while regulating
to VLDO. The LDO is active whenever the input voltage is above VUVLO and below VOVP. It is not affected by the
CTRL input. The LDO output is used to power circuitry such as USB transceivers in dead battery conditions. This
allows the user to operate the product immediately after plugging the adapter in, instead of waiting for the battery
to charge to useable levels.
Charge Status Indicator (CHG)
The bq25050 contains an open drain CHG output that indicates when charge cycles and faults. When charging a
battery in precharge, fastcharge or CV mode, the CHG output is pulled to VSS. Once the BAT output reaches
regulation and the charge current falls below the termination threshold, CHG goes high impedance to signal the
battery is fully charged. The CHG output goes low during battery recharge cycles to signal the host to monitor for
termination.
Additionally, CHG notifies the host if a NTC temperature fault has occurred. CHG pulses with a period of 100ms
and a 50% duty cycle if a TS faults occurs. Connect CHG to the required logic level voltage through a resistor to
use the signal with a microprocessor. The sink current ICHG must be below 5mA.
The IC monitors the CHG pin when no input is connected to verify if the phone circuitry is active. If the voltage at
CHG is logic low when no driven low, the TS current source is turned off for a low quiescent current state. Once
the voltage at CHG increases above logic high, the current source is turned on to allow the host to sense battery
temperature.
Single Input Interface (CTRL)
CTRL is used to enable/disable the device as well as select the input current limit, enable/disable charge, extend
the TS operation range and disable VIN-DPM mode. CTRL is pulled low to enable the device. After the deglitch
tCTRL_DGL expires, the IC enters the 32ms WAIT state. CTRL may be used to program the bq25050 during this
time. Once tWAIT expires, the IC starts up. If no command is sent to CTRL during tWAIT, the IC starts up with a
default 285mA current limit, termination enabled and VIN-DPM enabled.
Programming the different modes is done by pulsing the CTRL input. See Table 2 for a map of the different
modes. The width of the CTRL pulses is unimportant as long as they are between 50µs and 1000µs long. The
time between pulses must be between 50ms and 1000µs to be properly read. Once CTRL is held low for 2ms,
the number of pulses is passed to the control logic and decoded and then the mode changes. To ensure proper
operation, more than 16 pulses are not recommended. See Figure 26 for a flow diagram of the CTRL interface.
Table 2. Pulse Counting Map for CTRL Interface
# OF PULSES
BGATE CONTROL
CURRENT LIMIT
TS RANGE
VIN-DPM
1
Force Termination
No Change
No Change
No Change
2
Force On Disable
No Change
No Change
No Change
3
Force On Enable
No Change
No Change
No Change
4
No Change
93 mA
No Change
No Change
5
No Change
187 mA
No Change
No Change
6
No Change
280 mA
No Change
No Change
7
No Change
374 mA
No Change
No Change
8
No Change
467 mA
No Change
No Change
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Table 2. Pulse Counting Map for CTRL Interface (continued)
# OF PULSES
BGATE CONTROL
CURRENT LIMIT
TS RANGE
VIN-DPM
9
No Change
654 mA
No Change
No Change
10
No Change
794 mA
No Change
No Change
11
No Change
935 mA
No Change
No Change
12
No Change
No Change
0°C to 60°C
No Change
13-16
No Change
No Change
No Change
Disabled
If, at any time, the CTRL input is held high for more than 2ms, the IC is disabled. When disabled, charging is
suspended and the bq25050 input quiescent current is reduced.
IC disabled if CTRL
pulled high for >2.0 ms
# of pulses decoded once
CTRL pulled low for 2.0 ms
IC can be
programmed during
tWAIT
tHI
CTRL
tCTRL-LATCH
tCTRL-LATCH
2.0 ms
2.0 ms
2.0 ms
tCTRL-LATCH
tCTRL-DGL
tLO
Power up with default
285 mA current limit
475 mA current limit
programmed
190 mA current limit
programmed
IIN
Figure 25. CTRL Timing Diagram
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Any
State
IC Enabled
CTRL
Rising Edge
Detected?
NO
YES
Send Pulse
Counter Info to
Decode Block
Begin 1.5ms OFF
Timer
NO
#PULSE = 1?
Falling Edge
Detected?
NO
Has 1.5ms OFF
Timer Expired?
YES
Force Charge Termination
NO
#PULSE = 2?
YES
Force BGATE On
Disabled
YES
Force BGATE On
Enabled
YES
100mA Mode
ICHARGE = 95mA (100mA)
YES
200mA Mode
ICHARGE = 190mA (200mA)
YES
300mA Mode
ICHARGE = 285mA (300mA)
YES
400mA Mode
ICHARGE = 380mA (400mA)
YES
500mA Mode
ICHARGE = 475mA (500mA)
YES
700mA Mode
ICHARGE = 665mA (700mA)
YES
850mA Mode
ICHARGE = 807.5mA (850mA)
YES
YES
NO
Disable IC
Turn off Charge
Turn ON BGATE
/CHG = Hi-Z
#PULSE = 3?
NO
Go to IC
Disabled
Routine
#PULSE = 4?
NO
#PULSE = 5?
Increment Pulse
Counter
NO
#PULSE = 6?
NO
Begin 1.5ms
LATCH Timer
#PULSE = 7?
NO
NO
YES
CTRL
Rising Edge
Detected?
NO
Has 1.5ms
LATCH Timer
Expired?
YES
#PULSE = 8?
NO
#PULSE = 9?
NO
IC Disabled
#PULSE = 10?
CTRL = 0?
NO
YES
300mA Mode
ICHARGE = 285mA
VIN-DPM Enabled
#PULSE = 11?
YES
1A Mode
ICHARGE = 950mA (1A)
NO
#PULSE = 12?
YES
TS Range = 0C to 60C
NO
Begin Battery
Charging
Disable VIN_DPM
Figure 26. CTRL Flow Diagram
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Thermal Regulation and Thermal Shutdown
The bq25050 contains a thermal regulation loop that monitors the die temperature continuously. If the
temperature exceeds TJ(REG), the device automatically reduces the charging current to prevent the die
temperature from increasing further. In some cases, the die temperature continues to rise despite the operation
of the thermal loop, particularly under high VIN conditions. If the die temperature increases to TJ(OFF), the IC is
turned off. Once the device die temperature cools by TJ(OFF-HYS), the device turns on and returns to thermal
regulation. Continuous over-temperature conditions result in the pulsing of the load current. If the junction
temperature of the device exceeds TJ(OFF), the charge FET is turned off. The FET is turned back on when the
junction temperature falls below TJ(OFF) – TJ(OFF-HYS).
Note that these features monitor the die temperature of the bq25050. This is not synonymous with ambient
temperature. Self heating exists due to the power dissipated in the IC because of the linear nature of the battery
charging algorithm.
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APPLICATION INFORMATION
Selection of Input/ Output Capacitors
In most applications, all that is needed is a high-frequency decoupling capacitor on the input power pin. For
normal charging applications, a 0.1µF ceramic capacitor, placed in close proximity to the IN pin and GND pad
works best. In some applications, depending on the power supply characteristics and cable length, it may be
necessary to increase the input filter capacitor to avoid exceeding the OVP voltage threshold during adapter hot
plug events where the ringing exceeds the deglitch time.
The charger in the bq25050 requires a capacitor from OUT to GND for loop stability. Connect a 1µF ceramic
capacitor from OUT to GND close to the pins for best results. More output capacitance may be required to
minimize the output droop during large load transients. Connect a 0.1µF ceramic capacitor from BAT to GND to
eliminate the potential ESD strike.
The LDO also requires an output capacitor for loop stability. Connect a 0.1µF ceramic capacitor from LDO to
GND close to the pins. For improved transient response, this capacitor may be increased.
bq25050 Charger Design Example
The following sections provide an example for determining the component values for use with the bq25050.
Requirements Refer to Figure 1 and Figure 2 for Schematics of the Design Example
• Supply voltage = 4.35~10.2V
• Fast charge current is set by CTRL - pin 7
• Input current monitoring output - pin 2
• Set 0°C~45°C operating range
Calculations
Program the Fast Charge Current (CTRL): Programming the different input currents, BGATE option,
temperature operating range, and VIN-DPM is done by pulsing the CTRL input. See table 2 for details. If, at any
time, the CTRL input is held high for more than 2ms, the IC is disabled. After CTRL is pulled low for more than
2ms, the charger resumes. See Figure 26 for details.
Program the input current monitoring output (IMON): Connect a resistor from IMON to VSS to monitor the
input current. The voltage of IMON pin is determined by:
VIMON = KIMON × RIMON × ICHG
The maximum IMON pin voltage is typically 1.2V. If the VIMON is programmed to be higher than VIMON(MAX), the
VIMON will be clamped on VIMON(MAX). But, ICHG is controlled by the CTRL pin separately and is not affected by
VIMON.
Set charger operating temperature range (TS): The operating range is 0°C to 45°C by a default NTC
thermistor NCP15WB473F (47kΩ Thermistor, b=4050). 12 qualified CTRL pulses can set VHOT_60 as TS hot
threshold and set 0°C to 60°C as the operating range. The following conditions will reset temperature operating
range back to 0°C to 45°C.
• Input voltage is lower than UVLO
• The CTRL input is held high for more than 2ms
In battery discharge mode, the TS function is disabled if the CHG voltage falls below logic low.
External FET Controller (BGATE): On Figure 1, BGATE drives an external P-channel FET that connects the
battery to the system output. When power is first applied to either VBAT or VIN, the device sources a typical 50µA
small current out of BGATE and monitors the voltage. If BGATE voltage is higher than logic high in first 1ms and
stays high for at least 2ms, the external power path control feature is enabled and VLOWV is set to 2.9V. The OUT
pin maintains voltage at VOUT(REG).
In Figure 2, BGATE is connected to Vss. The external power path control feature is disabled and VLOWV is set to
2.5V. The OUT pin shorts to BAT.
Status Indicators (CHG): The CHG pin is open drain output. If used, CHG pin should be pulled up via a resistor
and possibly a LED to a power source. If monitored by a host, the host pull-up power source should be used.
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Thermal Considerations
The bq25050 is packaged in a thermally enhanced QFN package. The package includes a thermal pad to
provide an effective thermal contact between the IC and the printed circuit board (PCB). Full PCB design
guidelines for this package are provided in the application note entitled: QFN/SON PCB Attachment Application
Note (SLUA271).
The most common measure of package thermal performance is thermal impedance (qJA ) measured (or
modeled) from the chip junction to the air surrounding the package surface (ambient). The mathematical
expression for qJA is:
T - TA
qJA = J
PD
(1)
Where:
TJ = chip junction temperature
TA = ambient temperature
PD = device power dissipation
Factors that can greatly influence the measurement and calculation of qJA include:
• Whether or not the device is board mounted
• Trace size, composition, thickness, and geometry
• Orientation of the device (horizontal or vertical)
• Volume of the ambient air surrounding the device under test and airflow
• Whether other surfaces are in close proximity to the device being tested
The device power dissipation, PD, is a function of the charge rate and the voltage drop across the internal
PowerFET. It can be calculated from the following equation when a battery pack is being charged:
P D = (VIN - VO UT ) ´ IOUT
(2)
Due to the charge profile of Li-Ion batteries the maximum power dissipation is typically seen at the beginning of
the charge cycle when the battery voltage is at its lowest. See the charging profile, Figure 22. If the board
thermal design is not adequate the programmed fast charge rate current may not be achieved under maximum
input voltage and minimum battery voltage, as the thermal loop can be active, effectively reducing the charge
current to avoid excessive IC junction temperature
PCB Layout Considerations
It is important to pay special attention to the PCB layout. The following provides some guidelines:
• To obtain optimal performance, the decoupling capacitor from IN to GND (thermal pad) and the output filter
capacitors from OUT to GND (thermal pad) should be placed as close as possible to the bq25050, with short
trace runs to both IN, OUT and GND (thermal pad).
• All low-current GND connections should be kept separate from the high-current charge or discharge paths
from the battery. Use a single-point ground technique incorporating both the small signal ground path and the
power ground path.
• The high current charge paths into IN pin and from the OUT pin must be sized appropriately for the maximum
charge current in order to avoid voltage drops in these traces.
• The bq25050 is packaged in a thermally enhanced SON package. The package includes a thermal pad to
provide an effective thermal contact between the IC and the printed circuit board (PCB); this thermal pad is
also the main ground connection for the device. Connect the thermal pad to the PCB ground connection. Full
PCB design guidelines for this package are provided in the application note entitled: QFN/SON PCB
Attachment Application Note (SLUA271).
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Product Folder Link(s): bq25050
PACKAGE OPTION ADDENDUM
www.ti.com
25-Jul-2011
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package
Drawing
Pins
Package Qty
Eco Plan
(2)
Lead/
Ball Finish
MSL Peak Temp
(3)
BQ25050DQCR
ACTIVE
WSON
DQC
10
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
BQ25050DQCT
ACTIVE
WSON
DQC
10
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
Samples
(Requires Login)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
25-Jul-2011
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
BQ25050DQCR
WSON
DQC
10
3000
330.0
12.4
2.3
3.3
0.85
4.0
12.0
Q1
BQ25050DQCT
WSON
DQC
10
250
180.0
12.4
2.3
3.3
0.85
4.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
25-Jul-2011
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
BQ25050DQCR
WSON
DQC
10
3000
346.0
346.0
29.0
BQ25050DQCT
WSON
DQC
10
250
190.5
212.7
31.8
Pack Materials-Page 2
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