TPS61199 SLVSAN3 A – DECEMBER 2010 – REVISED MAY 2011 www.ti.com White LED Driver for LCD Monitors Backlighting Check for Samples: TPS61199 FEATURES • • • 1 • • • • • • • • • 8V to 30V Input Voltage Integrated High-Power Boost Controller Adaptive Boost Output for LED Voltages Drive up to Eight LED Strings in Parallel Maximum 70 mA for Each LED String 3% Current Matching Between Strings 5000:1 PWM Dimming Ratio at 200Hz MOSFET Over-current Protection Programmable LED Short Protection Adjustable LED Open Protection Thermal Shutdown Protection 20-pin SOP Package and TSSOP Package with PowerPAD™ APPLICATIONS • • • Monitor LCD Backlight LCD TV Backlight General LED Lighting DESCRIPTION The TPS61199 provides highly integrated solutions for large size LCD backlighting. This device integrates a current-mode boost controller and eight current sinks for driving up to eight LED strings with multiple LEDs in series. Each string has an independent current regulator with current matching between strings reaching 3% regulation accuracy. The IC adjusts the boost controller's output voltage automatically to provide only the voltage required by the LED string with the largest forward voltage drop plus the minimum required voltage at that string's IFBx pin, thereby optimizing the driver's efficiency. The TPS61199 provides PWM brightness dimming with an external PWM signal. The PWM signal’s maximum frequency can be as high as 22kHz. Dimming ratios up to 5000:1 can be achieved with 200Hz PWM signal. The TPS61199 integrates over current protection for the switch FET, soft startup, LED short protection, LED open protection, and over temperature shutdown protection. The TPS61199 device is available in 20-pin SOP and HTSSOP package. L1 22µH 12V IN D1 SS5P10 OUT 60V + C1 10µF R8 3Ω Q1 Si4480DY C2 3 X 33µF R9 200Ω C3 2.2µF OUT VIN GDRV VDD ISNS C6 0.47nF R1 0.03Ω R2 190kΩ GND IFB1 IFB2 IFB3 IFB4 OVP TPS61199 10kΩ R3 10kΩ EN 10kΩ IFB5 PWM IFB6 IFB7 COMP IFB8 R4 50kΩ FBP ISET R6 40.2kΩ R5 200kΩ FSW R7 160kΩ C5 0.47nF C4 47nF Figure 1. Typical Application of TPS61199 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2010–2011, Texas Instruments Incorporated TPS61199 SLVSAN3 A – DECEMBER 2010 – REVISED MAY 2011 www.ti.com Table 1. PACKAGE INFORMATION (1) (1) (2) PACKAGE PART NUMBER (2) SOP – 20 TPS61199NS HTSSOP – 20 TPS61199PWP For the most current package and ordering information, see the Package Option Addendum at the end of this document; or, see the TI Web site at www.ti.com. The SOP and HTSSOP package are available in tape and reel. Add R suffix (TPS61199PWPR / TPS61199NSR) to order quantities of 2000 parts per reel. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) VALUE Voltage Range MIN MAX Pin VIN (2) –0.3 33 Pin IFB1 to IFB8 (2) –0.3 30 Pin EN and PWM (2) –0.3 20 –0.3 3.6 –0.3 7 Pin ISET, ISNS and OVP (2) All other pins (2) HBM ESD rating V 2 Continuous Power Dissipation KV See Thermal Information Table Operating Junction Temperature Range –40 +150 Storage Temperature Range –65 +150 (1) (2) UNIT °C Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to network ground terminal RECOMMENDED OPERATING CONDITIONS (1) MIN NOM MAX L1 Inductor 10 22 47 C1 Input capacitor 10 C2 Output capacitor 10 33 100 µF fPWM PWM dimming frequency 0.1 22 KHz tPWM Rising/falling edge of PWM signal 1 µsec fBOOST Boost regulator switching frequency 300 800 kHz TA Operating ambient temperature –40 85 °C (1) UNIT µH µF Customers need to verify the component values in their application if the values are different from the recommended values. THERMAL INFORMATION TPS61199 THERMAL METRIC (1) TPS61199 NS PWP 20 PINS 20 PINS θJA Junction-to-ambient thermal resistance 69.4 46.9 θJCtop Junction-to-case (top) thermal resistance 36.4 48.2 θJB Junction-to-board thermal resistance 37.3 22.1 ψJT Junction-to-top characterization parameter 11.0 3.4 ψJB Junction-to-board characterization parameter 36.8 13.3 θJCbot Junction-to-case (bottom) thermal resistance n/a 2.3 (1) 2 UNITS °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated Product Folder Link(s): TPS61199 TPS61199 SLVSAN3 A – DECEMBER 2010 – REVISED MAY 2011 www.ti.com ELECTRICAL CHARACTERISTICS VIN = 12V; TA = –40°C to +85°C, typical values are at TA = +25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SUPPLY CURRENT VIN Input voltage range VUVLO_VIN Under voltage lockout threshold VIN falling 8 6.5 30 VVIN_SYS VIN hysteresis VIN rising 300 Iq_VIN Operating quiescent current into Vin EN=high; PWM = low; no switching, VIN=30V ISD Shutdown current VDD Internal regulation voltage Output current of VDD = 15mA 5.7 VH Logic high threshold on EN,PWM, VIN = 8V to 30V 2.0 VL Logic Low threshold on EN,PWM, VIN = 8V to 30V RPD Pull down resistor on EN, PWM 6.0 7 V V mV 1.5 mA 10 µA 6.3 V EN and PWM V 0.8 V 400 800 1600 kΩ 1.204 1.229 1.253 V CURRENT REGULATION VISET ISET pin voltage KISET Current multiple IIFB(AVG)/Iset IISET = 30µA; IFB = 450mV IFB Current accuracy to IIFB(AVG) IISET = 30µA; IFB = 450mV IFB(BR) (1) Current matching IISET= 30µA; IFB = 450mV IFBleak IFB pin leakage current IFB voltage = 30V; PWM = low 10 IIFB_max Current sink max output current IFB = 450mV 70 1990 -2% 2% 3% 25 45 µA mA OSCILLATOR FOSC Switching frequency VFSW FSW pin reference voltage Dutymax Maximum duty cycle tskip Minimum pulse width for skip cycle mode R = 100 kΩ 0.66 0.8 0.94 R = 160 kΩ 0.44 0.5 0.56 FSW= 500 kHz 90% 1.229 MHz V 94% 200 ns 2 Ω GATE DRIVER and OVER CURRENT LIMIT RGDRV(SRC) Gate driver impedance when sourcing VGDRV = 6V, IGDRV = 20mA RGDRV(SNK) Gate driver impedance when sinking VGDRV = 6V, IGDRV = 20mA VISNS Switch current limit detection threshold VIN = 8V to 30V Ω 1.5 120 160 180 mV V PROTECTION VCLAMP Output overvoltage threshold at OVP pin 2.77 2.95 3.13 IFBP LED short across protection bias current multiple VFBP = 1V IFBP/IISET 0.23 0.25 0.27 VOVP_IFB IFB overvoltage threshold 26.5 29.5 V THERMAL SHUTDOWN Tshutdown (1) Thermal shutdown threshold 150 °C Current matching = (IMAX – IMIN)/ IAVG Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated Product Folder Link(s): TPS61199 3 TPS61199 SLVSAN3 A – DECEMBER 2010 – REVISED MAY 2011 www.ti.com DEVICE INFORMATION TOP VIEW SOP - 20 (NS) HTTSOP - 20 (PWP) 1 20 OVP COMP 2 19 VDD FSW 3 18 VIN ISET 4 17 GDRV EN 5 16 ISNS PWM 6 15 GND IFB8 7 14 IFB1 IFB7 8 13 IFB2 IFB6 9 12 IFB3 IFB5 10 11 IFB4 FBP COMP FSW ISET EN PWM IFB8 IFB7 IFB6 IFB5 1 2 3 4 5 6 7 8 9 10 PowerPAD FBP 20 19 18 17 16 15 14 13 12 11 OVP VDD VIN GDRV ISNS GND IFB1 IFB2 IFB3 IFB4 PIN ASSIGNMENTS PIN NAME DESCRIPTION NO. VDD 19 Internal regulator output pin. Connect a 2.2µF capacitor between this pin to GND. EN 5 Enable/disable Pin. High = IC is enabled; low = IC is disabled. FSW 3 Boost switching frequency selection pin. Connect a resistor to set the frequency between 300kHz to 800 kHz PWM 6 PWM dimming signal input pin. The frequency must be in the range of 100Hz to 22 kHz ISET 4 Full-scale LED current selection pin. Connect a resistor to program LED current for each string IFB1 to IFB8 7, 8, 9, 10, 11 12, 13, 14 Regulated current sink input pins. GND 15 Ground pin COMP 2 Loop compensation pin. Connect an RC network to make loop stable. See the relevant application information section. ISNS 16 External MOSFET current sense positive input pin. GDRV 17 External Switch MOSFET gate driver output pin. OVP 20 Over voltage protection pin. See the relevant application information section FBP 1 LED short-across protection threshold program pin. See the relevant application information section VIN 18 Supply input pin. This pin can be tied to a voltage different from the power stage input. PowerPAD in TPS61199PWP 4 The PowerPAD pad must be soldered to the ground. If possible, use thermal vias to connect to top and internal ground plane layers for ideal power dissipation. Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated Product Folder Link(s): TPS61199 TPS61199 SLVSAN3 A – DECEMBER 2010 – REVISED MAY 2011 www.ti.com FUNCTIONAL BLOCK DIAGRAM VIN VDD VDD LDO VDD PWM Logic FSW GDRV Driver ISNS Oscillator and Slope Compensation COMP OC Protection 160mV OVP Protection EA Ref OVP 8 IFBs Selection IFB1 EN Shutdown PWM EN Current Sink GND IFB2 Dimming Control ISET Current Mirror & REF IFB Protection FBP Current Sinks IFB8 Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated Product Folder Link(s): TPS61199 5 TPS61199 SLVSAN3 A – DECEMBER 2010 – REVISED MAY 2011 www.ti.com TYPICAL CHARACTERISTICS Figure 1 as test circuit, and L = CDRH127/HPNP- 220M, R6 = 41kΩ, unless otherwise noted DESCRIPTION FIGURES Dimming efficiency 17LEDs in series; 200Hz dimming frequency; Figure 2 Dimming efficiency 13LEDs in series; 200Hz dimming frequency; Figure 3 Dimming linearity 17LEDs in series; VIN = 12V; Figure 4 Dimming with short on time 17LEDs in series; VIN = 12V; Figure 5 Current matching 17LEDs in series; VIN = 12V; Figure 6 Dimming waveform 17LEDs in series; VIN = 12V; 200Hz with 1% duty cycle Figure 7 Dimming waveform 17LEDs in series; VIN = 12V; 22kHz with 5% duty cycle Figure 8 Startup waveform 17LEDs in series; VIN = 12V; 200Hz with 50% duty cycle Figure 9 Shutdown waveform 17LEDs in series; VIN = 12V; 200Hz with 50% duty cycle Figure 10 100 100 95 95 90 90 85 VI = 24 V VI = 12 V 80 Efficiency - % Efficiency - % 85 75 70 75 70 65 60 60 55 55 20 40 60 PWM - Duty Cycle - % 80 100 50 0 Figure 2. Dimming Efficiency 6 VI = 12 V 80 65 50 0 VI = 24 V 20 40 60 PWM - Duty Cycle - % 80 100 Figure 3. Dimming Efficiency Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated Product Folder Link(s): TPS61199 TPS61199 SLVSAN3 A – DECEMBER 2010 – REVISED MAY 2011 www.ti.com 0.48 0.44 100 Total LED Average Current - mA Total LED Average Current - A 0.40 0.36 0.32 0.28 0.24 0.20 0.16 0.12 10 1 0.08 0.04 0.1 0 0 20 40 60 PWM Duty Cycle - % 80 100 1 Figure 4. Dimming Linearity 2 3 4 5 6 7 PWM On Time - ms 8 9 10 Figure 5. Dimming With Short On Time 60 IFB1 10 V/div DC LED String Current - mA 59.8 59.6 VOUT 200 mV/div AC 59.4 59.2 Total LED 500 mA/div DC 59 58.8 58.6 IFB1 IFB2 IFB3 IFB4 IFB5 IFB6 IFB7 IFB8 Figure 6. Current Matching t - Time - 10 ms/div Figure 7. Dimming Waveforms Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated Product Folder Link(s): TPS61199 7 TPS61199 SLVSAN3 A – DECEMBER 2010 – REVISED MAY 2011 www.ti.com EN 5 V/div DC IFB1 10 V/div DC IFB1 10 V/div DC VOUT 500 mV/div AC VOUT 20 V/div AC Total LED 500 mA/div DC Total LED 500 mA/div DC t - Time - 10 ms/div t - Time - 20 ms/div Figure 8. Dimming Waveforms Figure 9. Startup Waveform EN 5 V/div DC IFB1 10 V/div DC VOUT 20 V/div AC Total LED 500 mA/div DC t - Time - 40 ms/div Figure 10. Shutdown Waveform 8 Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated Product Folder Link(s): TPS61199 TPS61199 SLVSAN3 A – DECEMBER 2010 – REVISED MAY 2011 www.ti.com DETAILED DESCRIPTION See the functional block diagram and Figure 1 for each section. Supply Voltage The TPS61199 has a built-in linear regulator to supply the IC analog and logic circuitry. The VDD pin, output of the regulator, must be connected to a 2.2µF bypass capacitor. VDD only has a current sourcing capability of 15mA. VDD voltage is ready after the EN pin is pulled high. Boost Controller A boost controller is shown at the top of the functional block diagram. The TPS61199 regulates the output voltage with current mode PWM (pulse width modulation) control. The control circuitry turns on an external switch FET at the beginning of each switching cycle. The input voltage is applied across the inductor and stores the energy as the inductor current ramps up. During this portion of the switching cycle, the load current is provided by the output capacitor. When the inductor current rises to the threshold set by the Error Amplifier (EA) output, the switch FET is turned off and the external Schottky diode is forward biased. The inductor transfers stored energy to replenish the output capacitor and supply the load current. This operation repeats each switching cycle. The switching frequency is programmed by the external resistor. A ramp signal from the oscillator is added to the current ramp to provide slope compensation, shown in the Oscillator and Slope Compensation block. The duty cycle of the converter is then determined by the PWM Logic block which compares the EA output and the slope compensated current ramp. The feedback loop regulates the OVP pin to a reference voltage generated by the minimum voltage across the IFB pins. The output of the EA is connected to the COMP pin. An external RC compensation network must be connected to the COMP pin to optimize the feedback loop for stability and transient response. The IC consistently adjusts the boost output voltage to account for any changes in LED forward voltages. In the event that the boost controller is not able to regulate the output voltage due to the minimum pulse width (tskip, in the Electrical Characterization table), the IC enters pulse skip mode. In this mode, the device keeps the power switch off for several switching cycles to prevent the output voltage from rising above the regulated voltage. This operation typically occurs in light load condition or when the input voltage is higher than the output voltage. Switching Frequency The TPS61199 switching frequency can be programmed between 300kHz to 800kHz by a external resistor (R7, in Figure 1). Table 2 shows the recommended values for the resistance. Fs (in kHz) = 80,000 / R7 (in kΩ) Table 2. Recommended Value for Resistance R7 FSW 100 kΩ 800 kHz 160 kΩ 500 kHz Enable And Under Voltage Lockout The TPS61199 is enabled with the soft-start when the EN pin voltage is higher than 2.0 V; A voltage of less than 0.8 V disables the IC. An under voltage lockout protection feature is provided. When the voltage at VIN pin is less than 7 V, the IC is switched off. The IC resumes the operation once the voltage at VIN pin recovers adjusted for hysteresis (VVIN_SYS, in the Electrical Characterization table) Startup The TPS61199 has integrated soft-start circuitry to avoid any inrush current during startup. During the startup period, the output voltage rises step-by-step from the minimum voltage of LED string in 100 mV increments, shown in Figure 9. The soft-start time depends on the load and the output capacitor. Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated Product Folder Link(s): TPS61199 9 TPS61199 SLVSAN3 A – DECEMBER 2010 – REVISED MAY 2011 www.ti.com Unused LED String If the application requires less than eight LED strings, the TPS61199 simply requires shorting the unused IFB pin to ground. The IC detects the voltage less than 0.3 V and immediately disables the string during startup. Refer to Figure 12. Program LED Full-Scale Current The eight current sink regulators embedded in the TPS61199 can be configured to provide up to a maximum of 70mA per string. The current must be programmed to the expected full-scale LED current by the ISET pin resistor, (R6, in Figure 1) using Equation 1. V ILED = ISET ´KISET R6 (1) Where: KISET = Current multiple (1990 TYP, in the Electrical Characterization table) VISET = ISET pin voltage (1.229V TYP, in the Electrical Characterization table) PWM Dimming LED brightness dimming is set by applying an external PWM signal of 100Hz to 22kHz to the PWM pin. Varying the PWM duty cycle from 0% to 100% adjusts the LED from minimum to maximum brightness respectively. The minimum on time of the LED string is 1 µsec; thus the TPS61199 has a dimming ratio of 5000:1 at 200Hz. Refer to Figure 5 for dimming ratio in other dimming frequency. When the PWM voltage is pulled low, the IC will turn off the LED strings and keep the boost converter output at the same level as when PWM is high. Thus, the TPS61199 limit the output ripple due to the load transient that occurs during PWM dimming. Drive High Current LED For applications requiring LEDs rated for more than 70mA, it is acceptable to tie two or more IFB pins together as shown in Figure 13. Protection 1. Switch current limit protection using the ISNS pin The TPS61199 monitors the inductor current through the voltage across a sense resistor (R1 in Figure 1) in order to provide current limit protection. During the switch FET on period, when the voltage at ISNS pin rises above 160 mV (VISNS in the Electrical Characterization table), the IC turns off the FET immediately and does not turn it back on until the next switch cycle. The switch current limit is equal to 160mV / R1. 2. LED open protection When one of the LED strings is open, the boost output rises to the clamp threshold voltage (see the Output over-voltage protection using the OVP pin section). The IC detects the open string by sensing no current on the corresponding IFB pin. As a result, the IC deactivates the open IFB pin and removes it from the voltage feedback loop. Afterwards, the output voltage returns to the voltage required for the connected WLED strings. The IFB pin currents of the connected strings remain in regulation during this process. If all the LED strings are open, the IC repeatedly attempts to restart until the fault is cleared. 3. LED short-across protection using the FBP pin If one or several LEDs short in one string, the corresponding IFB pin voltage rises but continues to sink the LED current, causing increased IC power dissipation. To protect the IC, the TPS61199 provides a programmable LED short-across protection feature with threshold voltage that can be programmed by properly sizing the resistor on the FBP pin (See R5 in Figure 1) using the following equation. R5 VLED_short = ´1.229V R6 (2) 10 Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated Product Folder Link(s): TPS61199 TPS61199 SLVSAN3 A – DECEMBER 2010 – REVISED MAY 2011 www.ti.com If any IFB pin voltage exceeds the threshold (VLED_short), the IC turns off the corresponding current sink and removes this IFB pin from the output voltage regulation loop. Current regulation of the remaining IFB pins is not affected. If the voltage on all the IFB pins exceed the threshold, the IC repeatedly attempts to restart until the fault is cleared. 4. IFB over-voltage protection When any of IFB pin reaches the threshold (VOVP_IFB), the IC stops switching immediately to protect from damage. The IC will re-start when IFB pin voltage falls below the threshold. The time delay depends on how quickly IFB voltage can fall. It is usually determined by the amount of output capacitance and load. 5. Output over-voltage protection using the OVP pin: Use a resistor divider to program the clamp threshold voltage as follows: (a) Compute the maximum output voltage by multiplying the maximum forward voltage (VFWD(MAX)) and number (n) of series LEDs. Add 1V to account for regulation and resistor tolerances and load transients. VOUTMAX = VFLED_MAX ´ Number +1V (3) (b) The recommended bottom feedback resistor (R3, in the ) at 10k. Calculate the top resistor (R2, in the Figure 1) using the following equation +1V ö æV - 1÷ ´ R3 R2 = ç OUTMAX 2.95V è ø (4) When the IC detects that the OVP pin exceeds 2.95V, indicating that the output voltage has exceeded the clamp threshold voltage, the IC clamps the output voltage to the set threshold. When the OVP pin voltage is higher than 3.0V, indicating that the output is higher than the clamp threshold voltage due to transients or high voltage noise spike coupling from external circuits, the IC shuts down the boost controller until the output drops below the clamp threshold voltage. 6. Output short to ground protection When the inductor peak current reaches twice the switch current limit in each switch cycle, the IC immediately disables the boost controller until the fault is cleared. This protects the IC and external components from damage if the output is shorted to ground. 7. Thermal Protection When the IC junction temperature is over 150°C, the thermal protection circuit is triggered and shuts down the device immediately. The device automatically restarts when the junction temperature falls back to less than 150°C, with approximate 15°C hysteresis. Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated Product Folder Link(s): TPS61199 11 TPS61199 SLVSAN3 A – DECEMBER 2010 – REVISED MAY 2011 www.ti.com APPLICATION INFORMATION Inductor Selection The TPS61199 is designed to work with inductor values between 10µH to 47µH. Running the controller at higher switching frequencies allows the use of smaller and/or lower profile inductors in the 10µH range. Running the controller at slower switching frequencies requires the use of larger inductors, near 47µH, to maintain the same inductor current ripple but may improve overall inefficiency due to smaller switching losses. Inductor values can have ±20% tolerance with no current bias. When the inductor current approaches saturation level, its inductance can decrease 20% to 35% from the 0A value depending on how the inductor vendor defines saturation. In a boost regulator, the inductor peak current can be calculated with Equation 5 and Equation 6. IL Peak V × IOUT IPP = OUT + VIN × η 2 DIL = (5) 1 æ 1 1 ö L ´ ç + ÷ ´ FSW è VOUT - VIN VIN ø (6) Where: VOUT = output voltage IOUT = total LED current VIN = input voltage η = power conversion efficiency, use 85% for TPS61199 applications L = inductor value FSW = switching frequency Select an inductor with a saturation current over the calculated peak current. To calculate the worst case inductor peak current, use the minimum input voltage, maximum output voltage, and maximum total LED current. Select an inductor with a saturation current at least 30% higher the calculated peak current to account for load transients when dimming. Table 2 lists the recommended inductors Table 3. Recommended Value for Inductor L(µH) DCR (mΩ) ISAT (A) SIZE (LxWxH mm) MFR. CDRH127/HPNP-220M 22 48.8 5.6 12.5 x 12.5 x 8.0 Sumida SLF12575T- 220M 22 26.3 4 12.5 x 12.5 x 7.5 TDK #B953AS-220M 22 46 3.6 12.8 x 12.8 x 6.8 TOKO Schottky Diode The TPS61199 demands a high-speed rectification for optimum efficiency. Ensure theat the diode's average and peak current rating exceed the output LED current and inductor peak current. In addition, the diode's reverse breakdown voltage must exceed the application output voltage. Therefore, the VISHAY SS5P9 is recommended. Switch MOSFET And Gate Driver Resistor The TPS61199 demands a power N-MOSFET (See Q1 in Figure 1) as a switch. The voltage and current rating of the MOSFET must be higher than the application output voltage and the inductor peak current. The applications benefits from the addition of a resistor (See R8 in Figure 1) connected between the GDRV pin and the gate of the switching MOSFET. With this resistor, the load regulation between LED dimming on and off period and EMI are improved. A 3-Ω resistor value is recommended. The TPS61199 exhibits lower efficiency when the resistor value is above 3Ω. Current Sense and Current Sense Filtering R1 determines the correct over current limit protection. To choose the right value of R1, start with the total system power needed Pout. Input current Iin = Pout / (Vin * efficiency). Efficinecy can be estimated from Figure 3. The second step is to calculate the inductor ripple current based on the inductor value L. 12 Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated Product Folder Link(s): TPS61199 TPS61199 SLVSAN3 A – DECEMBER 2010 – REVISED MAY 2011 www.ti.com dIL = Vin * D / (fs * L) where, D = 1 - Vin/Vo So the peak current Ipk = Iin + dIL/2. The maximum R1 can now be calculated as, R1 = VISNS / Ipk It is recommended to add 20% or more margin to account for component variations. A small filter placed on the ISNS pin improves performance of the converter (See R9 and C6 in Figure 1). The time constant of this filter should be approximately 100ns. The range of R9 should be from about 100Ω to 1kΩ for best results. The C6 should be located as close as possible to the ISNS pin to provide noise immunity. Output Capacitor The output capacitor is mainly selected to meet the requirements for output ripple and loop stability of the whole system. This ripple voltage is related to the capacitance of the capacitor and its equivalent series resistance (ESR). Assuming a capacitor with zero ESR, the minimum capacitance needed for a given ripple can be calculated by: Vripple = C DMAX × IOUT FSW × COUT (7) Where Vripplec is the peak to peak output ripple, and DMAX is the duty cycle of the boost converter. DMAX is equal to approximately (VOUT_MAX - VIN_MIN) / VOUT_MAX in applications. Care must be taken when evaluating a capacitor’s derating under dc bias. The DC bias can also significantly reduce capacitance. Ceramic capacitors can loss as much as 50% of its capacitance at its rated voltage. Therefore, leave the margin on the voltage rating to ensure adequate capacitance in the recommendation table. The ESR impact on the output ripple must be considered as well if tantalum or electrolytic capacitors are used. Assuming there is enough capacitance such that the ripple due to the capacitance can be ignored, the ESR needed to limit the Vripple is: Vripple ESR = IL Peak × ESR (8) Ripple current flowing through a capacitor’s ESR causes power dissipation in the capacitor. This power dissipation causes a temperature increase internal to the capacitor. Excessive temperature can seriously shorten the expected life of a capacitor. Capacitors have ripple current ratings that are dependent on ambient temperature and should not be exceeded. Therefore, three electrolytic capacitors (UPW2A330MPD6, Nichicon) in parallel reduces the total ESR, shown as Figure 1. In typical application, The output requires a capacitor in the range of 10µF to 100µF. The output capacitor affects the small signal control loop stability of the boost converter. If the output capacitor is below the range, the boost regulator may potentially become unstable. Loop Consideration The COMP pin on the TPS61199 is used for external compensation, allowing the loop response to be optimized for each application. The COMP pin is the output of the internal transconductance amplifier. The external resistor R4, along with ceramic capacitors C4 and C5, are connected to the COMP pin to provide poles and zero. The poles and zero, along with the inherent pole and zero in a peak current mode control boost converter, determine the closed loop frequency response. This is important to converter stability and transient response. For most of the applications, the recommended value of 10kΩ for R4, 100nF for C4 and 470pF for C5 are sufficient. For applications with different components or requirements, please refer to application note SLVA452 “Compensating the Current Mode Boost Converter” for guidance on selecting different compensation components. Layout Consideration As for all switching power supplies, especially those providing high current and using high switching frequencies, layout is an important design step. If layout is not carefully done, the regulator could show instability as well as EMI problems. Therefore, use wide and short traces for high current paths. The VDD capacitor, C3 (see in Figure 1) is the filter and noise decoupling capacitor for the internal linear regulator powering the internal digital circuits. It should be placed as close as possible between the VDD and GND pins to prevent any noise insertion to digital circuits. The switch node at the drain of Q1 carries high current with fast rising and falling edges. Therefore, the connection between this node to the inductor and the schottky diode should be kept as short and Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated Product Folder Link(s): TPS61199 13 TPS61199 SLVSAN3 A – DECEMBER 2010 – REVISED MAY 2011 www.ti.com wide as possible. It is also beneficial to have the ground of the output capacitor C2 close to the GND pin since there is large ground return current flowing between them. When laying out signal grounds, it is recommended to use short traces separate from power ground traces and connect them together at a single point, for example on the thermal pad in the PWP package. Resistors R5, R6, and R7 in the Typical Application Circuits are LED short protection threshold current setting and switching frequency programming resistors. To avoid unexpected noise coupling into the pins and affecting the accuracy, these resistors need to be close to the pins with short and wide traces to GND. In PWP package, The thermal pad needs to be soldered on to the PCB and connected to the GND pin of the IC. Additional thermal via can significantly improve power dissipation of the IC. Figure 11. Recommended PCB Layout 14 Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated Product Folder Link(s): TPS61199 TPS61199 SLVSAN3 A – DECEMBER 2010 – REVISED MAY 2011 www.ti.com ADDITIONAL APPLICATION CIRCUITS L1 22µH 12V IN D1 SS5P10 OUT 60V + C1 10µF R8 3Ω C2 3 x 33µF Q1 Si4480DY R9 200Ω C3 2.2µF OUT VIN GDRV VDD ISNS C6 0.47nF R1 0.03Ω R2 190kΩ GND IFB1 IFB2 OVP TPS61199 IFB3 10kΩ IFB4 R3 10kΩ EN 10kΩ IFB5 PWM IFB6 IFB7 COMP IFB8 R4 50kΩ FBP ISET R6 40.2kΩ R5 200kΩ FSW R7 160kΩ C5 0.47nF C4 47nF Figure 12. Six LED Strings Application Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated Product Folder Link(s): TPS61199 15 TPS61199 SLVSAN3 A – DECEMBER 2010 – REVISED MAY 2011 www.ti.com L1 22µH 12V IN D1 SS5P10 OUT 60V + C1 10µF R8 3Ω Q1 Si4480DY C2 3 x 33µF R9 200Ω C3 2.2µF OUT VIN GDRV VDD ISNS C6 0.47nF R1 0.03Ω R2 190kΩ GND IFB1 IFB2 OVP TPS61199 IFB3 10kΩ IFB4 R3 10kΩ EN 10kΩ IFB5 PWM IFB6 IFB7 COMP IFB8 R4 50kΩ FBP ISET R6 40.2kΩ R5 200kΩ FSW R7 160kΩ C5 0.47nF C4 47nF Figure 13. Four LED Strings with 130mA Current Application 16 Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated Product Folder Link(s): TPS61199 TPS61199 SLVSAN3 A – DECEMBER 2010 – REVISED MAY 2011 www.ti.com L1 22µH 12V IN C1 10µF D1 SS5P10 OUT 45V C2 R8 3Ω Q1 Si4480DY 2 X 10µF R9 200Ω C3 2.2µF OUT VIN GDRV VDD ISNS C6 0.47nF R1 0.03Ω R2 150kΩ GND IFB1 IFB2 IFB3 IFB4 OVP TPS61199 10kΩ R3 10kΩ EN 10kΩ IFB5 PWM IFB6 IFB7 COMP IFB8 R4 100kΩ FBP ISET C2 = GRM55DR61H106K R6 40.2kΩ R5 200kΩ FSW R7 100kΩ C5 0.47nF C4 100nF Figure 14. 112-LED Driver Application with Ceramic Output Capacitor Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated Product Folder Link(s): TPS61199 17 PACKAGE OPTION ADDENDUM www.ti.com 24-Jan-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Qty Drawing Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) TPS61199NSR ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TPS61199 TPS61199PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 TPS61199 TPS61199PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 TPS61199 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Only one of markings shown within the brackets will appear on the physical device. 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Addendum-Page 1 Samples PACKAGE MATERIALS INFORMATION www.ti.com 26-Mar-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device TPS61199PWPR Package Package Pins Type Drawing SPQ HTSSOP 2000 PWP 20 Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 330.0 16.4 Pack Materials-Page 1 6.95 B0 (mm) K0 (mm) P1 (mm) 7.1 1.6 8.0 W Pin1 (mm) Quadrant 16.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 26-Mar-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS61199PWPR HTSSOP PWP 20 2000 367.0 367.0 38.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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