SCLS606A − MARCH 2005 − MARCH 2005 D Qualification in Accordance With DBV OR DCK PACKAGE (TOP VIEW) AEC-Q100† D Qualified for Automotive Applications D Customer-Specific Configuration Control D D D D D D A B GND Can Be Supported Along With Major-Change Approval Operating Range of 4.5 V to 5.5 V Max tpd of 9.5 ns at 5 V Low Power Consumption, 20-µA Max ICC ±8-mA Output Drive at 5 V Inputs Are TTL-Voltage Compatible ESD Protection Level Per AEC-Q100 Classification − 2000-V (H2) Human-Body Model − 200-V (M3) Machine Model − 1000-V (C5) Charged-Device Model 1 5 VCC 4 Y 2 3 † Contact factory for details. Q100 qualification data available on request. description/ordering information The SN74AHCT1G32 is a single 2-input positive-OR gate. The device performs the Boolean function Y + A ) B or Y + A • B in positive logic. ORDERING INFORMATION −40°C to 125°C ORDERABLE PART NUMBER PACKAGE‡ TA TOP-SIDE MARKING§ SOT (SOT-23) − DBV Reel of 3000 CAHCT1G32QDBVRQ1 B32_ SOT (SC-70) − DCK Reel of 3000 CAHCT1G32QDCKRQ1 BG_ ‡ Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. § The actual top-side marking has one additional character that designates the assembly/test site. FUNCTION TABLE INPUTS A B OUTPUT Y H X H X H H L L L logic diagram (positive logic) A B 1 2 4 Y Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2005, Texas Instruments Incorporated ! "#$ ! %#&'" ($) (#"! " !%$""! %$ *$ $! $+! !#$! !(( ,-) (#" %"$!!. ($! $"$!!'- "'#($ $!. '' %$$!) POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SCLS606A − MARCH 2005 − MARCH 2005 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Package thermal impedance, θJA (see Note 2): DBV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206°C/W DCK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 3) VCC VIH Supply voltage VIL VI Low-level input voltage Input voltage VO IOH Output voltage IOL ∆t/∆v MIN MAX 4.5 5.5 High-level input voltage 2 UNIT V V 0.8 V 0 5.5 V 0 V High-level output current VCC −8 Low-level output current 8 mA 20 ns/V Input transition rise or fall rate mA TA Operating free-air temperature −40 125 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC VOH IOH = −50 mA IOH = −8 mA 4.5 V VOL IOL = 50 mA IOL = 8 mA 4.5 V II ICC VI = 5.5 V or GND VI = VCC or GND, ∆ICC‡ One input at 3.4 V, TA = 25°C TYP MAX MIN 4.4 3.94 MIN MAX -40°C TO 125°C MIN 4.4 4.4 3.8 3.7 UNIT V 0.1 0.1 0.1 0.36 0.44 0.52 V ±0.1 ±1 ±1 µA 1 10 20 µA 5.5 V 1.35 1.5 1.65 mA 10 pF Ci VI = VCC or GND 5V 2 10 10 ‡ This is the increase in supply current for each input at one of the specified TTL voltage levels, rather than 0 V or VCC. 2 MAX 5.5 V 0 V to 5.5 V IO = 0 Other inputs at VCC or GND 4.5 -40°C TO 85°C POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SCLS606A − MARCH 2005 − MARCH 2005 switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE tPLH tPHL A or B Y CL = 15 pF tPLH tPHL A or B Y CL = 50 pF MIN TA = 25°C TYP MAX -40°C TO 85°C MIN MAX -40°C TO 125°C MIN MAX 5 6.9 1 8 9.5 5 6.9 1 8 9.5 5.5 7.9 1 9 10.5 5.5 7.9 1 9 10.5 UNIT ns ns operating characteristics, VCC = 5 V, TA = 25°C PARAMETER Cpd Power dissipation capacitance POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TEST CONDITIONS TYP UNIT No load, 11.5 pF f = 1 MHz 3 SCLS606A − MARCH 2005 − MARCH 2005 PARAMETER MEASUREMENT INFORMATION From Output Under Test Test Point RL = 1 kΩ From Output Under Test VCC Open S1 TEST GND CL (see Note A) CL (see Note A) S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Drain Open VCC GND VCC LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS 3V 1.5 V Timing Input 0V tw 3V 1.5 V Input 1.5 V th tsu 3V 1.5 V Data Input 1.5 V 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 3V 1.5 V Input 1.5 V 0V tPLH In-Phase Output tPHL 50% VCC tPHL Out-of-Phase Output VOH 50% VCC VOL Output Waveform 1 S1 at VCC (see Note B) VOH 50% VCC VOL 1.5 V tPLZ ≈VCC 50% VCC Output Waveform 2 S1 at GND (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS 1.5 V 0V tPZL tPZH tPLH 50% VCC 3V Output Control VOL + 0.3 V VOL tPHZ 50% VCC VOH − 0.3 V VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns. D. The outputs are measured one at a time, with one input transition per measurement. E. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 6-Dec-2006 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty CAHCT1G32QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Pb-Free (RoHS) CU NIPDAU Level-1-260C-UNLIM CAHCT1G32QDCKRQ1 ACTIVE SC70 DCK 5 3000 Pb-Free (RoHS) CU NIPDAU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. 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