TI UA9638CIDREP

uA9638C-EP
SLLSEA4A – DECEMBER 2011 – REVISED DECEMBER 2011
www.ti.com
DUAL HIGH-SPEED DIFFERENTIAL LINE DRIVER
Check for Samples: uA9638C-EP
FEATURES
1
•
2
•
•
•
•
•
SUPPORTS DEFENSE, AEROSPACE,
AND MEDICAL APPLICATIONS
Meets or Exceeds ANSI Standard
EIA/TIA-422-B
Operates From a Single 5-V Power Supply
Drives Loads as Low as 50 Ω up to 15 Mbps
TTL- and CMOS-Input Compatibility
Output Short-Circuit Protection
Interchangeable With National
Semiconductor™ DS9638
•
•
•
•
•
•
•
Controlled Baseline
One Assembly/Test Site
One Fabrication Site
Rated From –40°C to 85°C
Extended Product Life Cycle
Extended Product-Change Notification
Product Traceability
D PACKAGE
(TOP VIEW)
VCC
1A
2A
GND
1
8
2
7
3
6
4
5
1Y
1Z
2Y
2Z
DESCRIPTION
The uA9638C is a dual high-speed differential line driver designed to meet ANSI Standard EIA/TIA-422-B. The
inputs are TTL and CMOS compatible and have input clamp diodes. Schottky-diode-clamped transistors are
used to minimize propagation delay time. This device operates from a single 5-V power supply and is supplied in
an 8-pin package.
The uA9638 provides the current needed to drive low-impedance loads at high speeds. Typically used with
twisted-pair cabling and differential receiver(s), base-band data transmission can be accomplished up to and
exceeding 15 Mbps in properly designed systems. The uA9637A dual line receiver is commonly used as the
receiver. For even faster switching speeds in the same pin configuration, see the SN75ALS191.
The uA9638C is characterized for operation from -40°C to 85°C.
8
8
1Y
2
1A
7
1Z
2
1A
1Z
6
3
6
2Y
2A
5
2Z
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
1Y
7
3
2A
2Y
5
2Z
Figure 2. Logic Diagram
Figure 1. Logic Symbol
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
National Semiconductor is a trademark of National Semiconductor Corporation.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2011, Texas Instruments Incorporated
uA9638C-EP
SLLSEA4A – DECEMBER 2011 – REVISED DECEMBER 2011
www.ti.com
ORDERING INFORMATION (1)
TA = TJ
–40°C to 85°C
(1)
PACKAGE
SOIC - D
Reel of 2500
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
VID NUMBER
UA9638CIDREP
9638I
V62/12606-10XE
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
SCHEMATICS OF INPUTS AND OUTPUTS
VCC
VCC
4 kΩ NOM
Input
9.6 Ω NOM
Output
Figure 3. Equivalent of Each Input
GND
Figure 4. Typical of All Inputs
ABSOLUTE MAXIMUM RATINGS
(1)
over operating free-air temperature range (unless otherwise noted)
VCC
Supply voltage range (2)
–0.5 V to 7 V
VI
Input voltage range
–0.5 V to 7 V
Continuous total power dissipation
Lead temperature 1,6 mm (1/16 inch) from 10 seconds
See Dissipation Ratings Table
260°C
TA
Operating free-air temperature range
–40°C to 85°C
Tstg
Storage temperature range
–65°C to 150°C
(1)
(2)
2
Voltage values except differential output voltages are with respect to network GND.
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
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Copyright © 2011, Texas Instruments Incorporated
uA9638C-EP
SLLSEA4A – DECEMBER 2011 – REVISED DECEMBER 2011
www.ti.com
THERMAL INFORMATION
uA9638C
THERMAL METRIC (1)
D
UNITS
8 PINS
θJA
Junction-to-ambient thermal resistance (2)
114.3
θJC
Junction-to-case thermal resistance
59.1
θJB
Junction-to-board thermal resistance (3)
55.3
ψJT
Junction-to-top characterization parameter (4)
12.7
ψJB
Junction-to-board characterization parameter (5)
54.7
(1)
(2)
(3)
(4)
(5)
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
The junction-to-top characterization parameter, ψJT, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θJA, using a procedure described in JESD51-2a (sections 6 and 7).
The junction-to-board characterization parameter, ψJB, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θJA , using a procedure described in JESD51-2a (sections 6 and 7).
DISSIPATION RATINGS
PACKAGE
POWER RATING
TA = 25°C
(mW)
DERATING FACTOR
TA > 70°C
(mW/°C)
POWER RATING
TA = 85°C
(mW)
D
725
8.75
199
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
4.75
5
5.25
V
VCC
Supply voltage
VIH
High-level input voltage
VIL
Low-level input voltage
0.8
V
IOH
High-level output current
-50
mA
IOL
Low-level output current
50
mA
TA
Operating free-air temperature
85
°C
2
V
-40
ELECTRICAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP (1)
MAX
UNIT
-1
-1.2
V
Input clamp voltage
VCC = 4.75 V, II = −18 mA
VOH
High level output voltage
VCC = 4.75 V,
VIH = 2 V,
VIL = 0.8 V
VOL
Low level output voltage
VCC = 4.75 V, VIH = 2 V, VIL = 0.8 V,
IOL = 40 mA
|VOD1|
Magnitude of differential output voltage
VCC = 5.25 V, IO = 0 A
|VOD2|
Magnitude of differential output voltage
VCC = 4.75 V to 5.25 V, RL = 100 Ω,
See Figure 5
Δ|VOD|
Change in magnitude of differential output
voltage (2)
VCC = 4.75 V to 5.25 V, RL = 100 Ω,
See Figure 5
±0.4
V
VOC
Common-mode output voltage (3)
VCC = 4.75 V to 5.25 V, RL = 100 Ω,
See Figure 5
3
V
VIK
(1)
(2)
(3)
IOH = −10 mA
2.5
IOH = −40 mA
2
3.5
V
0.5
1.25 x
VOD2
V
V
2
V
All typical values are at VCC = 5 V and TA = 25°C.
Δ|VOD| and Δ|VOC| are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from a high level
to a low level or vice versa.
In Standard EIA-422-A, VOC, which is the average of the two output voltages with respect to ground, is called output offset voltage, VOS.
Copyright © 2011, Texas Instruments Incorporated
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uA9638C-EP
SLLSEA4A – DECEMBER 2011 – REVISED DECEMBER 2011
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ELECTRICAL CHARACTERISTICS (continued)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TYP (1)
MIN
MAX
UNIT
±0.4
V
Δ|VOC|
Change in magnitude of common-mode
output voltage (2)
VCC = 4.75 V to 5.25 V, RL = 100 Ω,
See Figure 5
IO
Output current with power off
VCC = 0 V
II
Input current
VCC = 5.25 V, VI = 5.5 V
50
µA
IIH
High-level input current
VCC = 5.25 V, VI = 2.7 V
25
µA
IIL
Low-level input current
VCC = 5.25 V, VI = 0.5 V
IOS
Short-circuit output current (4)
VCC = 5.25 V, VO = 0 V
ICC
Supply current (both drivers)
VCC = 5.25 V, No load, All inputs at 0 V
VO = 6 V
VO = −0.25 V
0.1
100
-0.1
-100
VO = −0.25 V to 6 V
(4)
µA
±100
-50
-200
µA
-150
mA
65
mA
45
Only one output at a time should be shorted, and duration of the short circuit should not exceed one second.
SWITCHING CHARACTERISTICS
VCC = 5 V, TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
td(OD)
Differential output delay time
CL = 15 pF, RL = 100 Ω, See Figure 6
10
ns
tt(OD)
Differential output transition time
CL = 15 pF, RL = 100 Ω, See Figure 6
10
ns
tsk(o)
Output skew
See Figure 6
1
ns
PARAMETER MEASUREMENT INFORMATION
50 Ω
VOD2
Input
VOC
50 Ω
Figure 5. Differential and Common-Mode Output Voltages
3V
Input
1.5 V
1.5 V
0V
Y Output
Differential
Output
CL
Generator
(see Note A)
RL = 100 Ω
50 Ω
td(OD)
td(OD)
90%
90%
10%
10%
tt(OD)
tt(OD)
Z Output
CL = 15 pF
(see Note B)
VOH
Y Output
50%
50%
tsk(o)
tsk(o)
VOL
VOH
Z Output
50%
50%
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
A.
The input pulse generator has the following characteristics: ZO = 50 Ω, PRR ≤ 500 kHz, tw = 100 ns, tr = ≤ 5 ns.
B.
CL includes probe and jig capacitance.
Figure 6. Test Circuit and Voltage Waveforms
4
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Copyright © 2011, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
23-Dec-2011
PACKAGING INFORMATION
Orderable Device
UA9638CIDREP
Status
(1)
ACTIVE
Package Type Package
Drawing
SOIC
D
Pins
Package Qty
8
2500
Eco Plan
(2)
Green (RoHS
& no Sb/Br)
Lead/
Ball Finish
MSL Peak Temp
(3)
Samples
(Requires Login)
CU NIPDAU Level-2-260C-1 YEAR
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
13-Feb-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
UA9638CIDREP
Package Package Pins
Type Drawing
SOIC
D
8
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
2500
330.0
12.4
Pack Materials-Page 1
6.4
B0
(mm)
K0
(mm)
P1
(mm)
5.2
2.1
8.0
W
Pin1
(mm) Quadrant
12.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
13-Feb-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
UA9638CIDREP
SOIC
D
8
2500
340.5
338.1
20.6
Pack Materials-Page 2
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