CDCV304-EP www.ti.com SCAS927A – MARCH 2012 200-MHz GENERAL-PURPOSE CLOCK BUFFER, PCI-X COMPLIANT Check for Samples: CDCV304-EP FEATURES 1 • • • • • • • • General-Purpose and PCI-X 1:4 Clock Buffer Operating Frequency – 0 MHz to 200 MHz General-Purpose Low Output Skew: <100 ps Distributes One Clock Input to One Bank of Four Outputs Output Enable Control that Drives Outputs Low when OE is Low Operates from Single 3.3-V Supply or 2.5-V Supply PCI-X Compliant 8-Pin TSSOP Package SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS • • • • • • • Controlled Baseline One Assembly/Test Site One Fabrication Site Available in –40°C/105°C Temperature Range (1) Extended Product Life Cycle Extended Product-Change Notification Product Traceability TSSOP PW PACKAGE (TOP VIEW) CLKIN OE 1Y0 GND (1) 1 2 3 4 8 7 6 5 1Y3 1Y2 VDD 1Y1 Custom temperature ranges available DESCRIPTION The CDCV304 is a high-performance, low-skew, general-purpose PCI-X compliant clock buffer. It distributes one input clock signal (CLKIN) to the output clocks (1Y[0:3]). It is specifically designed for use with PCI-X applications. The CDCV304 operates at 3.3 V and 2.5 V and is therefore compliant to the 3.3-V PCI-X specifications. The CDCV304 is characterized for operation from –40°C to 105°C. Table 1. FUNCTION TABLE FUNCTIONAL BLOCK DIAGRAM INPUTS OE CLKIN 2 Logic Control 1 3 5 7 8 1Y0 1Y1 OUTPUTS CLKIN OE 1Y[0:3] L L L H L L L H L H H H 1Y2 1Y3 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2012, Texas Instruments Incorporated CDCV304-EP SCAS927A – MARCH 2012 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. Table 2. ORDERING INFORMATION (1) TA PACKAGE ORDERABLE PART NUMBER TOP-SIDE MARKING VID NUMBER –40°C to 105°C TSSOP - PW CDCV304TPWREP C304T V62/12618-01XE (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI Web site at www.ti.com. TERMINAL FUNCTIONS TERMINAL I/O DESCRIPTION NAME NO. 1Y[0:3] 3, 5, 7, 8 O Buffered output clocks CLKIN 1 I Input reference frequency GND 4 Power OE 2 I VDD 6 Power Ground Output enable control Supply ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) UNIT Supply voltage range, VDD Input voltage range, VI –0.5 V to 4.3 V (2) (3) Output voltage range, VO –0.5 V to VDD + 0.5 V (2) (3) –0.5 V to VDD + 0.5 V Input clamp current, IIK (VI < 0 or VI> VDD) ±50 mA Output clamp current, IOK (VO < 0 or VO > VDD) ±50 mA Continuous total output current, IO (VO = 0 to VDD) ±50 mA Storage temperature range Tstg (1) (2) (3) 2 –65°C to 150°C Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output negative voltage ratings may be exceeded if the input and output clamp-current ratings are observed. This value is limited to 4.6 V maximum. Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): CDCV304-EP CDCV304-EP www.ti.com SCAS927A – MARCH 2012 THERMAL INFORMATION CDCV304 THERMAL METRIC (1) PW UNITS 8 PINS Junction-to-ambient thermal resistance (2) θJA 175.8 (3) θJCtop Junction-to-case (top) thermal resistance θJB Junction-to-board thermal resistance (4) ψJT Junction-to-top characterization parameter (5) ψJB Junction-to-board characterization parameter (6) 61.8 104.3 °C/W 7.7 102.6 xxx (1) (2) (3) (4) (5) (6) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as specified in JESD51-7, in an environment described in JESD51-2a. The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDECstandard test exists, but a close description can be found in the ANSI SEMI standard G30-88. The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB temperature, as described in JESD51-8. The junction-to-top characterization parameter, ψJT, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining θJA, using a procedure described in JESD51-2a (sections 6 and 7). The junction-to-board characterization parameter, ψJB, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining θJA , using a procedure described in JESD51-2a (sections 6 and 7). RECOMMENDED OPERATING CONDITIONS MIN Supply voltage, VDD NOM 2.3 Low-level input voltage, VIL High-level input voltage, VIH V 0.3 x VDD V V 0 Low-level output current, IOL UNIT 3.6 0.7 x VDD Input voltage, VI High-level output current, IOH MAX VDD VDD = 2.5 V –12 VDD = 3.3 V –24 VDD = 2.5 V 12 VDD = 3.3 V 24 Operating free-air temperature, TA –40 V mA mA 105 °C TIMING REQUIREMENTS over operating free-air temperature range (unless otherwise noted) PARAMETER fclk TEST CONDITIONS Clock frequency MIN 0 TYP MAX UNIT 200 MHz Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): CDCV304-EP 3 CDCV304-EP SCAS927A – MARCH 2012 www.ti.com ELECTRICAL CHARACTERISTICS over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH VOL Input voltage High-level output voltage Low-level output voltage IOH High-level output current IOL Low-level output current II Input current IDD Dynamic current, see CI CO (1) 4 TEST CONDITIONS MIN TYP (1) MAX UNIT –1.2 V VDD = 3 V, II = –18 mA VDD = min to max, IOH = –1 mA VDD – 0.3 VDD = 2.3 V, IOH = –8 mA 1.78 VDD = 3 V, IOH = –24 mA 1.90 VDD = 3 V, IOH = –12 mA 2.30 VDD = 2.3 V, IOL = 8 mA 0.51 VDD = min to max, IOL = 1 mA 0.20 VDD = 3 V, IOL = 24 mA 0.84 VDD = 3 V, IOL = 12 mA VDD = 3 V, VO = 1 V VDD = 3.3 V, VO = 1.65 V VDD = 3 V, VO = 2 V VDD = 3.3 V, VO = 1.65 V V V 0.60 –45 mA –55 54 mA 70 VI = VO or VDD ±5 μA f = 67 MHz, VDD = 2.7 V 28 f = 67 MHz, VDD = 3.6 V 37 Input capacitance VDD = 3.3 V, VI = 0 V or VDD 3 pF Output capacitance VDD = 3.3 V, VI = 0 V or VDD 3.2 pF mA All typical values are with respect to nominal VDD and TA = 25°C. Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): CDCV304-EP CDCV304-EP www.ti.com SCAS927A – MARCH 2012 SWITCHING CHARACTERISTICS VDD = 2.5 V ± 10%, CL= 10 pF (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP (1) MAX 2 2.9 4.5 2 3 4.5 UNIT tPLH Low-to-high propagation delay tPHL High-to-low propagation delay tsk(o) Output skew (2) 50 150 tr Output rise slew rate (3) 1 2.2 4 V/ns tf Output fall slew rate (3) 1 2.2 4 V/ns MIN TYP (1) MAX UNIT 1.8 2.4 3.8 1.8 2.5 3.8 50 100 (1) (2) (3) See Figure 1 and Figure 2 See Figure 3 ns ps All typical values are with respect to nominal VDD. The tsk(o) specification is only valid for equal loading of all outputs and TA = -40°C to 85°C. This symbol is according to PCI-X terminology. SWITCHING CHARACTERISTICS VDD = 3.3 V ± 10%, CL= 10 pF (unless otherwise noted) PARAMETER TEST CONDITIONS tPLH Low-to-high propagation delay tPHL High-to-low propagation delay tsk(o) Output skew (2) tjitter Additive phase jitter from input to output 1Y0 tsk(p) Pulse skew tsk(pr) Process skew tsk(pp) Part-to-part skew Clock high time, see Figure 4 tlow Clock low time, see Figure 4 tr Output rise slew rate (3) (1) (2) (3) Output fall slew rate 12 kHz to 5 MHz, fout = 30.72 MHz 63 12 kHz to 20 MHz, fout = 125 MHz 56 VIH = VDD, VIL = 0 V thigh tf See Figure 1 and Figure 2 66 MHz 140 MHz 6 3 (3) 180 ps 0.2 ns 0.25 ns ns 2.2 140 MHz ps fs rms 6 66 MHz ns ns 1 2.7 4 V/ns 1 2.7 4 V/ns All typical values are with respect to nominal VDD. The tsk(o) specification is only valid for equal loading of all outputs and and TA = -40°C to 85°C. This symbol is according to PCI-X terminology. Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): CDCV304-EP 5 CDCV304-EP SCAS927A – MARCH 2012 www.ti.com PARAMETER MEASUREMENT INFORMATION VDD 140 Ω Yn 10 pF 140 Ω Figure 1. Test Load Circuit VDD 50% VDD CLKIN 0V tPLH tPHL 0.6 VDD 0.6 VDD 50% VDD 50% VDD 0.2 VDD 1Y0 − 1Y3 VOH 0.2 VDD tr VOL tf Figure 2. Voltage Waveforms Propagation Delay (tpd) Measurements 50% VDD Any Y 50% VDD Any Y tsk(0) Figure 3. Output Skew tcyc PARAMETER VIH(Min) VIL(Max) Vtest VALUE 0.5 VDD thigh UNIT V 0.35 VDD V VIH(Min) 0.4 VDD V Vtest 0.6 VDD VIL(Max) tlow 0.2 VDD 0.4 VDD Peak to Peak (Minimum) A. All parameters in Figure 4 are according to PCI-X 1.0 specifications. Figure 4. Clock Waveform 6 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): CDCV304-EP CDCV304-EP www.ti.com SCAS927A – MARCH 2012 HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT VOH − High-Level Output Voltage − V 3.5 3.0 VDD = 3.3 V TA = 25°C 2.5 2.0 1.5 1.0 0.5 0.0 −100 −90 −80 −70 −60 −50 −40 −30 −20 −10 0 IOH − High-Level Output Current − mA Figure 5. LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT VOL − Low-Level Output Voltage − V 3.5 3.0 VDD = 3.3 V TA = 25°C 2.5 2.0 1.5 1.0 0.5 0.0 −20 0 20 40 60 80 100 120 IOL − Low-Level Output Current − mA Figure 6. Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): CDCV304-EP 7 PACKAGE OPTION ADDENDUM www.ti.com 31-Mar-2012 PACKAGING INFORMATION Orderable Device CDCV304TPWREP Status (1) Package Type Package Drawing ACTIVE TSSOP PW Pins Package Qty 8 2000 Eco Plan (2) Green (RoHS & no Sb/Br) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) CU NIPDAU Level-1-260C-UNLIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF CDCV304-EP : • Catalog: CDCV304 NOTE: Qualified Version Definitions: • Catalog - TI's standard catalog product Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device CDCV304TPWREP Package Package Pins Type Drawing TSSOP PW 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2000 330.0 12.4 Pack Materials-Page 1 7.0 B0 (mm) K0 (mm) P1 (mm) 3.6 1.6 8.0 W Pin1 (mm) Quadrant 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CDCV304TPWREP TSSOP PW 8 2000 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily performed. TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional restrictions. Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use of any TI components in safety-critical applications. In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and requirements. Nonetheless, such components are subject to these terms. No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties have executed a special agreement specifically governing such use. Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI has specifically designated certain components which meet ISO/TS16949 requirements, mainly for automotive use. Components which have not been so designated are neither designed nor intended for automotive use; and TI will not be responsible for any failure of such components to meet such requirements. Products Applications Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps DSP dsp.ti.com Energy and Lighting www.ti.com/energy Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial Interface interface.ti.com Medical www.ti.com/medical Logic logic.ti.com Security www.ti.com/security Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video RFID www.ti-rfid.com OMAP Mobile Processors www.ti.com/omap TI E2E Community e2e.ti.com Wireless Connectivity www.ti.com/wirelessconnectivity Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2012, Texas Instruments Incorporated