LMV721-N, LMV722-N www.ti.com SNOS414I – AUGUST 1999 – REVISED AUGUST 2013 LMV721-N/LMV722 10MHz, Low Noise, Low Voltage, and Low Power Operational Amplifier Check for Samples: LMV721-N, LMV722-N FEATURES DESCRIPTION • The LMV721-N (Single) and LMV722 (Dual) are low noise, low voltage, and low power op amps, that can be designed into a wide range of applications. The LMV721-N/LMV722 has a unity gain bandwidth of 10MHz, a slew rate of 5V/us, and a quiescent current of 930uA/amplifier at 2.2V. 1 2 • • • • • • • (For Typical, 5 V Supply Values; Unless Otherwise Noted) Ensured 2.2V and 5.0V Performance Low Supply Current LMV721-N/2 930µA/Amplifier at 2.2V High Unity-Gain Bandwidth 10MHz Rail-to-Rail Output Swing – at 600Ω Load 120mV from Either Rail at 2.2V – at 2kΩ Load 50mV from Either Rail at 2.2V Input Common Mode Voltage Range Includes Ground Silicon Dust, SC70-5 Package 2.0x2.0x1.0 mm Input Voltage Noise 9 nV/√Hz at f = 1KHz APPLICATIONS • • • • Cellular an Cordless Phones Active Filter and Buffers Laptops and PDAs Battery Powered Electronics The LMV721-N/722 are designed to provide optimal performance in low voltage and low noise systems. They provide rail-to-rail output swing into heavy loads. The input common-mode voltage range includes ground, and the maximum input offset voltage are 3.5mV (Over Temp) for the LMV721N/LMV722. Their capacitive load capability is also good at low supply voltages. The operating range is from 2.2V to 5.5V. The chip is built with TI's advanced Submicron Silicon-Gate BiCMOS process. The single version, LMV721-N, is available in 5 pin SOT-23 and a SC70 (new) package. The dual version, LMV722, is available in an SOIC-8 and VSSOP-8 package. Typical Application Figure 1. A Battery Powered Microphone Preamplifier These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1999–2013, Texas Instruments Incorporated LMV721-N, LMV722-N SNOS414I – AUGUST 1999 – REVISED AUGUST 2013 Absolute Maximum Ratings ESD Tolerance www.ti.com (1) (2) (3) Human Body Model 2000V Machine Model 100V Differential Input Voltage ± Supply Voltage Supply Voltage (V+ – V−) 6V Soldering Information Infrared or Convection (20 sec.) 235°C −65°C to 150°C Storage Temp. Range Junction Temperature (1) (4) 150°C Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test conditions, see the Electrical Characteristics. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. Human body model, 1.5 kΩ in series with 100 pF. Machine model, 200Ω in series with 100 pF. The maximum power dissipation is a function of TJ(max), θJA, and TA . The maximum allowable power dissipation at any ambient temperature is P D = (TJ(max)–T A)/θJA. All numbers apply for packages soldered directly into a PC board. (2) (3) (4) Operating Ratings (1) Supply Voltage 2.2V to 5.5V −40°C ≤T J ≤85°C Temperature Range Thermal Resistance (θJA) Silicon Dust SC70-5 Pkg 440°C/W Tiny SOT-23 package 265 °C/W SOIC package, 8-pin Surface Mount 190°C/W VSSOP package, 8-Pin Mini Surface Mount 235 °C/W SOIC package, 14-Pin Surface Mount 145°C/W (1) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of 30 mA over long term may adversely affect reliability. 2.2V DC Electrical Characteristics Unless otherwise specified, all limits specified for TJ = 25°C. V+ = 2.2V, V− = 0V, VCM = V+/2, VO = V+/2 and R L > 1 MΩ. Boldface limits apply at the temperature extremes. Parameter Test Conditions Typ (1) Units Input Offset Voltage TCVOS Input Offset Voltage Average Drift 0.6 μV/°C IB Input Bias Current 260 nA IOS Input Offset Current CMRR Common Mode Rejection Ratio 0V ≤ VCM ≤ 1.3V 88 70 64 dB min PSRR Power Supply Rejection Ratio 2.2V ≤ V+ ≤ 5V, VO = 0 VCM = 0 90 70 64 dB min VCM Input Common-Mode Voltage Range For CMRR ≥ 50dB (1) (2) 2 Large Signal Voltage Gain 3 3.5 (2) VOS AV 0.02 Limit 25 mV max nA −0.30 V 1.3 V RL=600Ω VO = 0.75V to 2.00V 81 75 60 dB min RL= 2kΩ VO = 0.50V to 2.10V 84 75 60 dB min Typical Values represent the most likely parametric norm. All limits are specified by testing or statistical analysis. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LMV721-N LMV722-N LMV721-N, LMV722-N www.ti.com SNOS414I – AUGUST 1999 – REVISED AUGUST 2013 2.2V DC Electrical Characteristics (continued) Unless otherwise specified, all limits specified for TJ = 25°C. V+ = 2.2V, V− = 0V, VCM = V+/2, VO = V+/2 and R L > 1 MΩ. Boldface limits apply at the temperature extremes. Parameter VO Test Conditions + Output Swing RL = 600Ω to V /2 Output Current IS Supply Current (1) (2) Limit Units 2.125 2.090 2.065 V min 0.071 0.120 0.145 V max 2.177 2.150 2.125 V min 0.056 0.080 0.105 V max Sourcing, VO = 0V VIN(diff) = ± 0.5V 14.9 10.0 5.0 mA min Sinking, VO = 2.2V VIN(diff) = ± 0.5V 17.6 10.0 5.0 mA min LMV721-N 0.93 1.2 1.5 LMV722 1.81 2.2 2.6 RL = 2kΩ to V+/2 IO Typ mA max 2.2V AC Electrical Characteristics Unless otherwise specified, all limits specified for TJ = 25°C. V+ = 2.2V, V− = 0V, VCM = V+/2, VO = V+/2 and R L > 1 MΩ.Boldface limits apply at the temperature extremes. Parameter SR Slew Rate GBW Gain-Bandwidth Product Φm Gm en Input-Referred Voltage Noise in THD (1) (2) Test Conditions Typ (2) (1) Units 4.9 V/μs 10 MHz Phase Margin 67.4 Deg Gain Margin −9.8 dB f = 1 kHz 9 nV/√Hz Input-Referred Current Noise f = 1 kHz 0.3 pA/√Hz Total Harmonic Distortion f = 1 kHz AV = 1 RL = 600Ω, VO = 500 mVPP 0.004 % Typical Values represent the most likely parametric norm. Connected as voltage follower with 1V step input. Number specified is the slower of the positive and negative slew rate. 5V DC Electrical Characteristics Unless otherwise specified, all limits specified for TJ = 25°C. V+ = 5V, V− = 0V, VCM = V+/2, VO = V+/2 and RL > 1 MΩ. Boldface limits apply at the temperature extremes. Parameter Test Conditions Typ (1) −0.08 Limit (2) Units VOS Input Offset Voltage TCVOS Input Offset Voltage Average Drift 0.6 μV/°C IB Input Bias Current 260 nA IOS Input Offset Current 25 nA CMRR Common Mode Rejection Ratio 0V ≤ VCM ≤ 4.1V 89 70 64 dB min PSRR Power Supply Rejection Ratio 2.2V ≤ V+ ≤ 5.0V, VO = 0 VCM = 0 90 70 64 dB min VCM Input Common-Mode Voltage Range For CMRR ≥ 50dB (1) (2) 3 3.5 mV max −0.30 V 4.1 V Typical Values represent the most likely parametric norm. All limits are specified by testing or statistical analysis. Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LMV721-N LMV722-N Submit Documentation Feedback 3 LMV721-N, LMV722-N SNOS414I – AUGUST 1999 – REVISED AUGUST 2013 www.ti.com 5V DC Electrical Characteristics (continued) Unless otherwise specified, all limits specified for TJ = 25°C. V+ = 5V, V− = 0V, VCM = V+/2, VO = V+/2 and RL > 1 MΩ. Boldface limits apply at the temperature extremes. Parameter AV Large Signal Voltage Gain VO Output Swing Test Conditions Typ Output Current IS Supply Current Limit (2) Units RL = 600Ω VO = 0.75V to 4.80V 87 80 70 dB min RL = 2kΩ, VO = 0.70V to 4.90V, 94 85 70 dB min 4.882 4.840 4.815 V min 0.134 0.190 0.215 V max 4.952 4.930 4.905 V min 0.076 0.110 0.135 V max Sourcing, VO = 0V VIN(diff) = ±0.5V 52.6 25.0 12.0 mA min Sinking, VO = 5V VIN(diff) = ±0.5V 23.7 15.0 8.5 mA min LMV721-N 1.03 1.4 1.7 LMV722 2.01 2.4 2.8 RL = 600Ω to V+/2 RL = 2kΩ to V+/2 IO (1) mA max 5V AC Electrical Characteristics Unless otherwise specified, all limits specified for TJ = 25°C. V+ = 5V, V− = 0V, VCM = V+/2, VO = V+/2 and R L > 1 MΩ. Boldface limits apply at the temperature extremes. Parameter SR Slew Rate GBW Gain-Bandwidth Product Φm Gm en Input-Related Voltage Noise in THD (1) (2) 4 Test Conditions (2) Typ (1) Units 5.25 V/μs 10.0 MHz Phase Margin 72 Deg Gain Margin −11 dB f = 1 kHz 8.5 nV/√Hz Input-Referred Current Noise f = 1 kHz 0.2 pa/√Hz Total Harmonic Distortion f = 1kHz, AV = 1 RL = 600Ω, VO = 1 VPP 0.001 % Typical Values represent the most likely parametric norm. Connected as voltage follower with 1V step input. Number specified is the slower of the positive and negative slew rate. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LMV721-N LMV722-N LMV721-N, LMV722-N www.ti.com SNOS414I – AUGUST 1999 – REVISED AUGUST 2013 Typical Performance Characteristics Supply Current vs. Supply Voltage (LMV721-N) Sourcing Current vs. Output Voltage (VS = 2.2V) Figure 2. Figure 3. Sourcing Current vs. Output Voltage (VS = 5V) Sinking Current vs. Output Voltage (VS = 2.2V) Figure 4. Figure 5. Sinking Current vs. Output Voltage (VS = 5V) Output Voltage Swing vs. Supply Voltage (RL = 600Ω) Figure 6. Figure 7. Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LMV721-N LMV722-N Submit Documentation Feedback 5 LMV721-N, LMV722-N SNOS414I – AUGUST 1999 – REVISED AUGUST 2013 www.ti.com Typical Performance Characteristics (continued) 6 Output Voltage Swing vs. Suppy Voltage (RL = 2kΩ) Input Offset Voltage vs. Input Common-Mode Voltage Range VS = 2.2V Figure 8. Figure 9. Input Offset Voltage vs. Input Common-Mode Voltage Range VS = 5V Input Offset Voltage vs. Supply Voltage (VCM = V+/2) Figure 10. Figure 11. Input Voltage vs. Output Voltage (VS = 2.2V, RL = 2kΩ) Input Voltage vs. Output Voltage (VS = 5V, RL = 2kΩ) Figure 12. Figure 13. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LMV721-N LMV722-N LMV721-N, LMV722-N www.ti.com SNOS414I – AUGUST 1999 – REVISED AUGUST 2013 Typical Performance Characteristics (continued) Input Voltage Noise vs. Frequency Input Current Noise vs. Frequency Figure 14. Figure 15. +PSRR vs. Frequency −PSRR vs. Frequency Figure 16. Figure 17. CMRR vs. Frequency Gain and Phase Margin vs. Frequency (VS = 2.2V, RL 600Ω) Figure 18. Figure 19. Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LMV721-N LMV722-N Submit Documentation Feedback 7 LMV721-N, LMV722-N SNOS414I – AUGUST 1999 – REVISED AUGUST 2013 www.ti.com Typical Performance Characteristics (continued) Gain and Phase Margin vs. Frequency (VS = 5V, RL 600Ω) Slew Rate vs. Supply Voltage Figure 20. Figure 21. THD vs. Frequency Figure 22. 8 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LMV721-N LMV722-N LMV721-N, LMV722-N www.ti.com SNOS414I – AUGUST 1999 – REVISED AUGUST 2013 APPLICATION NOTES BENEFITS OF THE LMV721-N/722 SIZE The small footprints of the LMV721-N/722 packages save space on printed circuit boards, and enable the design of smaller electronic products, such as cellular phones, pagers, or other portable systems. The low profile of the LMV721-N/722 make them possible to use in PCMCIA type III cards. Signal Integrity Signals can pick up noise between the signal source and the amplifier. By using a physically smaller amplifier package, the LMV721-N/722 can be placed closer to the signal source, reducing noise pickup and increasing signal integrity. Simplified Board Layout These products help you to avoid using long pc traces in your pc board layout. This means that no additional components, such as capacitors and resistors, are needed to filter out the unwanted signals due to the interference between the long pc traces. Low Supply Current These devices will help you to maximize battery life. They are ideal for battery powered systems. Low Supply Voltage TI provides ensured performance at 2.2V and 5V. These specifications ensure operation throughout the battery lifetime. Rail-to-Rail Output Rail-to-rail output swing provides maximum possible dynamic range at the output. This is particularly important when operating on low supply voltages. Input Includes Ground Allows direct sensing near GND in single supply operation. Protection should be provided to prevent the input voltages from going negative more than −0.3V (at 25°C). An input clamp diode with a resistor to the IC input terminal can be used. CAPACITIVE LOAD TOLERANCE The LMV721-N/722 can directly drive 4700pF in unity-gain without oscillation. The unity-gain follower is the most sensitive configuration to capacitive loading. Direct capacitive loading reduces the phase margin of amplifiers. The combination of the amplifier's output impedance and the capacitive load induces phase lag. This results in either an underdamped pulse response or oscillation. To drive a heavier capacitive load, circuit in Figure 23 can be used. Figure 23. Indirectly Driving A capacitive Load Using Resistive Isolation In Figure 23, the isolation resistor RISO and the load capacitor CL form a pole to increase stability by adding more phase margin to the overall system. the desired performance depends on the value of RISO. The bigger the RISO resistor value, the more stable VOUT will be. Figure 24 is an output waveform of Figure 23 using 100kΩ for RISO and 2000µF for CL. Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LMV721-N LMV722-N Submit Documentation Feedback 9 LMV721-N, LMV722-N SNOS414I – AUGUST 1999 – REVISED AUGUST 2013 www.ti.com Figure 24. Pulse Response of the LMV721-N Circuit in Figure 23 The circuit in Figure 25 is an improvement to the one in Figure 23 because it provides DC accuracy as well as AC stability. If there were a load resistor in Figure 23, the output would be voltage divided by RISO and the load resistor. Instead, in Figure 25, RF provides the DC accuracy by using feed-forward techniques to connect VIN to RL. Caution is needed in choosing the value of RF due to the input bias current of the LMV721-N/722. CF and RISO serve to counteract the loss of phase margin by feeding the high frequency component of the output signal back to the amplifier's inverting input, thereby preserving phase margin in the overall feedback loop. Increased capacitive drive is possible by increasing the value of CF. This in turn will slow down the pulse response. Figure 25. Indirectly Driving A Capacitive Load with DC Accuracy INPUT BIAS CURRENT CANCELLATION The LMV721-N/722 family has a bipolar input stage. The typical input bias current of LMV721-N/722 is 260nA with 5V supply. Thus a 100kΩ input resistor will cause 26mV of error voltage. By balancing the resistor values at both inverting and non-inverting inputs, the error caused by the amplifier's input bias current will be reduced. The circuit in Figure 26 shows how to cancel the error caused by input bias current. Figure 26. Cancelling the Error Caused by Input Bias Current 10 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LMV721-N LMV722-N LMV721-N, LMV722-N www.ti.com SNOS414I – AUGUST 1999 – REVISED AUGUST 2013 TYPICAL SINGLE-SUPPLY APPLICATION CIRCUITS Difference Amplifier The difference amplifier allows the subtraction of two voltages or, as a special case, the cancellation of a signal common to two inputs. It is useful as a computational amplifier, in making a differential to single-ended conversion or in rejecting a common mode signal. Figure 27. Difference Application (1) (2) Instrumentation Circuits The input impendance of the previous difference amplifier is set by the resistor R1, R2, R3 and R4. To eliminate the problems of low input impendance, one way is to use a voltage follower ahead of each input as shown in the following two instrumentation amplifiers. Three-op-amp Instrumentation Amplifier The LMV721-N/722 can be used to build a three-op-amp instrumentation amplifier as shown in Figure 28 Figure 28. Three-op-amp Instrumentation Amplifier The first stage of this instrumentation amplifier is a differential-input, differential-output amplifier, with two voltage followers. These two voltage followers assure that the input impedance is over 100MΩ. The gain of this instrumentation amplifier is set by the ratio of R2/R1. R3 should equal R1 and R4 equal R2. Matching of R3 to R1 and R4 to R2 affects the CMRR. For good CMRR over temperature, low drift resistors should be used. Making R4 slightly smaller than R2 and adding a trim pot equal to twice the difference between R2 and R4 will allow the CMRR to be adjusted for optimum. Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LMV721-N LMV722-N Submit Documentation Feedback 11 LMV721-N, LMV722-N SNOS414I – AUGUST 1999 – REVISED AUGUST 2013 www.ti.com Two-op-amp Instrumentation Amplifier A two-op-amp instrumentation amplifier can also be used to make a high-input impedance DC differential amplifier (Figure 29). As in the two-op-amp circuit, this instrumentation amplifier requires precise resistor matching for good CMRR. R4 should equal to R1 and R3 should equal R2. Figure 29. Two-op-amp Instrumentation Amplifier (3) Single-Supply Inverting Amplifier There may be cases where the input signal going into the amplifier is negative. Because the amplifier is operating in single supply voltage, a voltage divider using R3 and R4 is implemented to bias the amplifier so the input signal is within the input common-common voltage range of the amplifier. The capacitor C1 is placed between the inverting input and resistor R1 to block the DC signal going into the AC signal source, VIN. The values of R1 and C1 affect the cutoff frequency, fc = ½π R1C1. As a result, the output signal is centered around mid-supply (if the voltage divider provides V+/2 at the noninverting input). The output can swing to both rails, maximizing the signal-to-noise ratio in a low voltage system. Figure 30. Single-Supply Inverting Amplifier (4) Active Filter Simple Low-Pass Active Filter The simple low-pass filter is shown in Figure 31. Its low-pass frequency gain (ω → o) is defined by −R3/R1. This allows low-frequency gains other than unity to be obtained. The filter has a −20dB/decade roll-off after its corner frequency fc. R2 should be chosen equal to the parallel combination of R1 and R3 to minimize error due to bias current. The frequency response of the filter is shown in Figure 32. 12 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LMV721-N LMV722-N LMV721-N, LMV722-N www.ti.com SNOS414I – AUGUST 1999 – REVISED AUGUST 2013 Figure 31. Simple Low-Pass Active Filter (5) Figure 32. Frequency Response of Simple Low-pass Active Filter in Figure 31 Note that the single-op-amp active filters are used in to the applications that require low quality factor, Q(≤ 10), low frequency (≤ 5KHz), and low gain (≤ 10), or a small value for the product of gain times Q(≤ 100). The op amp should have an open loop voltage gain at the highest frequency of interest at least 50 times larger than the gain of the filter at this frequency. In addition, the selected op amp should have a slew rate that meets the following requirement: Slew Rate ≥ 0.5 x (ωH VOPP) X 10 −6V/µsec where • • ωH is the highest frequency of interest VOPP is the output peak-to-peak voltage Figure 33. A Battery Powered Microphone Preamplifier Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LMV721-N LMV722-N Submit Documentation Feedback 13 LMV721-N, LMV722-N SNOS414I – AUGUST 1999 – REVISED AUGUST 2013 www.ti.com Here is a LMV721-N used as a microphone preamplifier. Since the LMV721-N is a low noise and low power op amp, it makes it an ideal candidate as a battery powered microphone preamplifier. The LMV721-N is connected in an inverting configuration. Resistors, R1 = R2 = 4.7kΩ, sets the reference half way between VCC = 3V and ground. Thus, this configures the op amp for single supply use. The gain of the preamplifier, which is 50 (34dB), is set by resistors R3 = 10kΩ and R4 = 500kΩ. The gain bandwidth product for the LMV721-N is 10 MHz. This is sufficient for most audio application since the audio range is typically from 20 Hz to 20kHz. A resistor R5 = 5kΩ is used to bias the electret microphone. Capacitors C1 = C2 = 4.7µF placed at the input and output of the op amp to block out the DC voltage offset. Connection Diagrams Top View Top View Figure 34. 5-Pin SC70 and SOT-23 Packages See Package Numbers DCK0005A AND DBV0005A 14 Submit Documentation Feedback Figure 35. 8-Pin SOIC and VSSOP Packages See Package Numbers D0008A and DGK0008A Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LMV721-N LMV722-N LMV721-N, LMV722-N www.ti.com SNOS414I – AUGUST 1999 – REVISED AUGUST 2013 REVISION HISTORY Changes from Revision G (March 2013) to Revision H • Page Changed layout of National Data Sheet to TI format .......................................................................................................... 14 Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LMV721-N LMV722-N Submit Documentation Feedback 15 PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LMV721M5 NRND SOT-23 DBV 5 1000 TBD Call TI Call TI -40 to 85 A30A LMV721M5/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 A30A LMV721M5X/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 A30A LMV721M7 NRND SC70 DCK 5 1000 TBD Call TI Call TI -40 to 85 A20 LMV721M7/NOPB ACTIVE SC70 DCK 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 A20 LMV721M7X NRND SC70 DCK 5 3000 TBD Call TI Call TI -40 to 85 A20 LMV721M7X/NOPB ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 A20 LMV722M NRND SOIC D 8 95 TBD Call TI Call TI -40 to 85 LMV 722M LMV722M/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMV 722M LMV722MM NRND VSSOP DGK 8 1000 TBD Call TI Call TI -40 to 85 V722 LMV722MM/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 V722 LMV722MMX NRND VSSOP DGK 8 3500 TBD Call TI Call TI -40 to 85 V722 LMV722MMX/NOPB ACTIVE VSSOP DGK 8 3500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 V722 LMV722MX NRND SOIC D 8 2500 TBD Call TI Call TI -40 to 85 LMV 722M LMV722MX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMV 722M (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) LMV721M5 SOT-23 DBV 5 1000 178.0 8.4 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3.2 3.2 1.4 4.0 8.0 Q3 LMV721M5/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LMV721M5X/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LMV721M7 SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LMV721M7/NOPB SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LMV721M7X SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LMV721M7X/NOPB SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LMV722MM VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LMV722MM/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LMV722MMX VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LMV722MMX/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LMV722MX SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LMV722MX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMV721M5 SOT-23 DBV 5 1000 210.0 185.0 35.0 LMV721M5/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LMV721M5X/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LMV721M7 SC70 DCK 5 1000 210.0 185.0 35.0 LMV721M7/NOPB SC70 DCK 5 1000 210.0 185.0 35.0 LMV721M7X SC70 DCK 5 3000 210.0 185.0 35.0 LMV721M7X/NOPB SC70 DCK 5 3000 210.0 185.0 35.0 LMV722MM VSSOP DGK 8 1000 210.0 185.0 35.0 LMV722MM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LMV722MMX VSSOP DGK 8 3500 367.0 367.0 35.0 LMV722MMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0 LMV722MX SOIC D 8 2500 367.0 367.0 35.0 LMV722MX/NOPB SOIC D 8 2500 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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