OPA211-HT www.ti.com SBOS481C – JULY 2009 – REVISED SEPTEMBER 2012 1.1 nV/√Hz Noise, Low Power, Precision Operational Amplifier Check for Samples: OPA211-HT FEATURES 1 • • 2 • • • • • • • • • • • Low Voltage Noise: 1.1 nV/√Hz at 1 kHz Input Voltage Noise: 80 nVPP (0.1 Hz to 10 Hz) THD+N: –136dB (G = 1, f = 1 kHz) Offset Voltage: 240 μV (max) Offset Voltage Drift: 0.35 μV/°C (typ) Low Supply Current: 6 mA/Ch (typ) Unity-Gain Stable Gain Bandwidth Product: 80 MHz (G = 100) 45 MHz (G = 1) Slew Rate: 27 V/μs 16-Bit Settling: 700 ns Wide Supply Range: ±2.25 V to ±18 V, 4.5 V to 36 V Rail-to-rail output Output current: 30 mA SUPPORTS EXTREME TEMPERATURE APPLICATIONS • • • • • • • • Controlled Baseline One Assembly/Test Site One Fabrication Site Available in Extreme (–55°C/210°C) Temperature Range (1) Extended Product Life Cycle Extended Product-Change Notification Product Traceability Texas Instruments high temperature products utilize highly optimized silicon (die) solutions with design and process enhancements to maximize performance over extended temperatures. HKJ PACKAGE (TOP VIEW) NC -IN +IN V- APPLICATIONS • • Down-Hole Drilling High Temperature Environments 1 8 2 7 3 6 4 5 NC V+ OUT NC NC denotes no internal connection HKQ PACKAGE (TOP VIEW) NC 8 1 NC V+ -IN OUT +IN NC 5 4 V- HKQ as formed or HKJ mounted dead bug (1) Custom temperature ranges available DESCRIPTION The OPA211 series of precision operational amplifiers achieves very low 1.1 nV/√Hz noise density with a supply current of only 3.6 mA. This series also offers rail-to-rail output swing, which maximizes dynamic range. The extremely low voltage and low current noise, high speed, and wide output swing of the OPA211 series make these devices an excellent choice as a loop filter amplifier in PLL applications. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2009–2012, Texas Instruments Incorporated OPA211-HT SBOS481C – JULY 2009 – REVISED SEPTEMBER 2012 www.ti.com In precision data acquisition applications, the OPA211 series of op amps provides 700-ns settling time to 16-bit accuracy throughout 10-V output swings. This ac performance, combined with only 240-μV of offset and 0.35μV/°C of drift over temperature, makes the OPA211 ideal for driving high-precision 16-bit analog-to-digital converters (ADCs) or buffering the output of high-resolution digital-to-analog converters (DACs). The OPA211 series is specified over a wide dual-power supply range of ±2.25 V to ±18 V, or for single-supply operation from 4.5 V to 36 V. This series of op amps is specified from TA = –55°C to 210°C. INPUT VOLTAGE NOISE DENSITY vs FREQUENCY Voltage Noise Density (nV/ÖHz) 100 10 1 0.1 1 10 100 1k 10k 100k Frequency (Hz) Table 1. ORDERING INFORMATION (1) TA –55°C to 210°C (1) PACKAGE ORDERABLE PART NUMBER TOP-SIDE MARKING HKJ OPA211SHKJ OPA211SHKJ HKQ OPA211SHKQ OPA211SHKQ KGD OPA211SKGD1 NA For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI Web site at www.ti.com. This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 2 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Links: OPA211-HT OPA211-HT www.ti.com SBOS481C – JULY 2009 – REVISED SEPTEMBER 2012 BARE DIE INFORMATION DIE THICKNESS BACKSIDE FINISH BACKSIDE POTENTIAL BOND PAD METALLIZATION COMPOSITION 15 mils. Silicon with backgrind V- Al-Si-Cu (0.5%) Origin a c b d Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Links: OPA211-HT 3 OPA211-HT SBOS481C – JULY 2009 – REVISED SEPTEMBER 2012 www.ti.com Table 2. BOND PAD COORDINATES DESCRIPTION PAD NUMBER a b c d -IN 1 34.4000 792.000 109.400 867.000 +IN 2 34.4000 33.000 109.400 108.000 NC 3 461.850 33.000 536.850 108.000 V- 4 692.650 54.600 767.650 129.600 OUT 5 920.400 33.000 995.400 108.000 V+ 6 920.400 720.150 995.400 795.150 NC 7 388.050 792.000 463.050 795.150 900 mm | | | | 38 mm 1184 mm | | 38 mm 4 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Links: OPA211-HT OPA211-HT www.ti.com SBOS481C – JULY 2009 – REVISED SEPTEMBER 2012 ABSOLUTE MAXIMUM RATINGS (1) Over operating free-air temperature range (unless otherwise noted). VS = (V=) – (V-) Supply Voltage VIN Input Voltage IIN Input Current (Any pin except power-supply pins) VALUE UNIT 40 V (V–) – 0.5 to (V+) + 0.5 V ±10 mA Output Short-Circuit (2) Continuous TA Operating Temperature –55 to 210 °C TSTG Storage Temperature –65 to 210 °C TJ Junction Temperature 210 °C Human Body Model (HBM) 3000 V Charged Device Model (CDM) 1000 V ESD Ratings (1) (2) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not supported. Short-circuit to VS/2 (ground in symmetrical dual supply setups), one amplifier per package. THERMAL CHARACTERISTICS FOR HKJ OR HKQ PACKAGE over operating free-air temperature range (unless otherwise noted) PARAMETER θJC Junction-to-case thermal resistance to ceramic side of case to top of case lid (metal side of case) MIN TYP MAX 5.7 13.7 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Links: OPA211-HT UNIT °C/W 5 OPA211-HT SBOS481C – JULY 2009 – REVISED SEPTEMBER 2012 www.ti.com ELECTRICAL CHARACTERISTICS: VS = ±2.25 V to ±18 V At TA = 25°C, RL = 10 kΩ connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted. TA = –55 to 125°C PARAMETER CONDITIONS MIN TA = 210°C TYP MAX MIN TYP MAX UNIT OFFSET VOLTAGE Input Offset Voltage Drift VOS ±30 ±180 ±70 ±260 μV 0.35 1.5 0.35 2.0 μV/°C VS = ±2.25V to ±18V 0.1 3 0.1 3 μV/V VS = ±15V dVOS/dT vs Power Supply PSRR INPUT BIAS CURRENT Input Bias Current Offset Current IB VCM = 0V ±60 ±200 ±60 ±250 nA IOS VCM = 0V ±25 ±150 ±25 ±150 nA en f = 0.1Hz to 10Hz 80 80 nVPP f = 10Hz 2 2 nV/√Hz f = 100Hz 1.4 1.4 nV/√Hz f = 1kHz 1.1 1.1 nV/√Hz f = 10Hz 3.2 3.2 pA/√Hz f = 1kHz 1.7 1.7 pA/√Hz NOISE Input Voltage Noise Input Voltage Noise Density Input Current Noise Density In INPUT VOLTAGE RANGE (1) Common-Mode Voltage Range Common-Mode Rejection Ratio VCM CMRR VS ≥ ±5V (V–) + 1.8 (V+) – 1.4 (V–) + 1.8 (V+) – 1.4 (V–) + 2 (V+) – 1.4 (V+) – 1.4 V VS < ±5V (V–) + 2 VS ≥ ±5V, (V–) + 2V ≤ VCM ≤ (V+) – 2V 114 120 113 120 dB V VS < ±5V, (V–) + 2V ≤ VCM ≤ (V+) – 2V 108 120 93 100 dB INPUT IMPEDANCE Differential 20k || 8 20k || 8 Ω || pF Common-Mode 109 || 2 109 || 2 Ω || pF OPEN-LOOP GAIN Open-Loop Voltage Gain AOL (V–) + 0.2V ≤ VO ≤ (V+) – 0.2V, RL = 10kΩ 114 130 112 118 dB AOL (V–) + 0.6V ≤ VO ≤ (V+) – 0.6V, RL = 600Ω 110 114 90 93 dB FREQUENCY RESPONSE Gain-Bandwidth Product Slew Rate Settling Time, 0.01% GBW G = 100 80 80 MHz G=1 45 45 MHz 27 27 V/μs VS = ±15V, G = –1, 10V Step, CL = 100pF 490 580 ns VS = ±15V, G = –1, 10V Step, CL = 100pF 700 750 ns G = –10 500 500 ns G = 1, f = 1kHz, VO = 3VRMS, RL = 600Ω 0.00001 5 0.000015 % –136 –136 dB SR tS 0.0015% (16-bit) Overload Recovery Time Total Harmonic Distortion + Noise (1) 6 THD+N The OPA211-HT is not intended to be used as a comparator due to its limited differential input range capability. Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Links: OPA211-HT OPA211-HT www.ti.com SBOS481C – JULY 2009 – REVISED SEPTEMBER 2012 ELECTRICAL CHARACTERISTICS: VS = ±2.25 V to ±18 V (continued) At TA = 25°C, RL = 10 kΩ connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted. TA = –55 to 125°C PARAMETER CONDITIONS MIN RL = 10kΩ, AOL ≥ 114dB RL = 600Ω, AOL ≥ 110dB, ±18V TYP TA = 210°C MAX MIN (V–) + 0.2 (V+) – 0.2 (V–) + 0.6 (V+) – 0.6 TYP MAX UNIT (V–) + 0.2 (V+) – 0.2 V (V–) + 1.2 (V+) – 0.6 OUTPUT Voltage Output VOUT Short-Circuit Current ISC Capacitive Load Drive +35/–50 CLOAD Open-Loop Output Impedance +30/–45 V mA See Typical Characteristics ZO f = 1MHz Ω 5 POWER SUPPLY Specified Voltage VS Quiescent Current (per channel) IQ ±2.25 IOUT = 0A ±18 3.6 ±2.25 6 6.0 ±18 V 7.5 mA TEMPERATURE RANGE Specified range –55°C to 210°C Operating range –55°C to 210°C 1000000 100000 Estimated Life (Hours) 10000 1000 Electromigration Fail Mode 100 10 1 110 130 150 170 190 210 230 250 Continous T J (°C) Figure 1. OPA211SKGD1 Operating Life Derating Chart Notes: 1. See datasheet for absolute maximum and minimum recommended operating conditions. 2. Silicon operating life design goal is 10 years at 105°C junction temperature (does not include package interconnect life). Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Links: OPA211-HT 7 OPA211-HT SBOS481C – JULY 2009 – REVISED SEPTEMBER 2012 www.ti.com TYPICAL CHARACTERISTICS At TA = 25°C, VS = ±18 V, and RL = 10 kΩ, unless otherwise noted. INPUT VOLTAGE NOISE DENSITY vs FREQUENCY INPUT CURRENT NOISE DENSITY vs FREQUENCY 100 Current Noise Density (pA/ÖHz) Voltage Noise Density (nV/ÖHz) 100 10 10 1 1 0.1 1 10 100 1k 10k 0.1 100k 1 10 100 Frequency (Hz) Figure 2. -140 0.00001 100 1k 10k 20k Total Harmonic Distortion + Noise (%) Total Harmonic Distortion + Noise (%) G=1 VOUT = 3VRMS 0.1 -60 0.01 -80 G = 11 -100 0.001 -120 0.0001 G=1 0.00001 VS = ±15V RL = 600W 1kHz Signal 0.000001 0.01 -140 G = -1 0.1 1 10 Total Harmonic Distortion + Noise (dB) -120 0.0001 Total Harmonic Distortion + Noise (dB) G = 11 VOUT = 3VRMS 10 100k THD+N RATIO vs OUTPUT VOLTAGE AMPLITUDE -100 VS = ±15V RL = 600W G = -1 VOUT = 3VRMS 10k Figure 3. THD+N RATIO vs FREQUENCY 0.001 1k Frequency (Hz) -160 100 Output Voltage Amplitude (VRMS) Frequency (Hz) Figure 4. Figure 5. 20nV/div 0.1-Hz TO 10-Hz NOISE Time (1s/div) Figure 6. 8 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Links: OPA211-HT OPA211-HT www.ti.com SBOS481C – JULY 2009 – REVISED SEPTEMBER 2012 TYPICAL CHARACTERISTICS (continued) At TA = 25°C, VS = ±18 V, and RL = 10 kΩ, unless otherwise noted. POWER-SUPPLY REJECTION RATIO vs FREQUENCY (Referred to Input) COMMON-MODE REJECTION RATIO vs FREQUENCY 160 140 140 120 100 100 CMRR (dB) PSRR (dB) 120 -PSRR 80 +PSRR 60 80 60 40 40 20 20 0 0 1 10 100 1k 10k 1M 100k 10M 10k 100M 100k 10M 1M 100M Frequency (Hz) Frequency (Hz) Figure 7. Figure 8. OPEN-LOOP OUTPUT IMPEDANCE vs FREQUENCY GAIN AND PHASE vs FREQUENCY 180 140 10k 120 Gain (dB) 100 100 10 80 90 60 40 Gain 20 1 135 Phase Phase (°) ZO (W) 1k 45 0 0.1 -20 10 100 1k 10k 1M 100k 10M 100 100M 1k 10k 100k 1M 10M 0 100M Frequency (Hz) Frequency (Hz) Figure 9. Figure 10. OPEN-LOOP GAIN vs TEMPERATURE 5 Open-Loop Gain (mV/V) 4 RL = 10kW 3 2 300mV Swing From Rails 1 0 -1 200mV Swing From Rails -2 -3 -4 -5 -75 -50 -25 0 25 50 75 100 125 150 175 200 Temperature (°C) Figure 11. Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Links: OPA211-HT 9 OPA211-HT SBOS481C – JULY 2009 – REVISED SEPTEMBER 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = 25°C, VS = ±18 V, and RL = 10 kΩ, unless otherwise noted. OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION 112.5 125.0 87.5 100.0 62.5 75.0 37.5 50.0 25.0 0 12.5 -12.5 -37.5 -25.0 -62.5 -50.0 -87.5 -75.0 -112.5 -100.0 -125.0 Population Population OFFSET VOLTAGE PRODUCTION DISTRIBUTION 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 Offset Voltage Drift (mV/°C) Offset Voltage (mV) Figure 12. Figure 13. OFFSET VOLTAGE vs COMMON-MODE VOLTAGE 200 2000 150 1500 100 1000 +IB 50 IOS 500 VOS (mV) IB and IOS Bias Current (nA) IB AND IOS CURRENT vs TEMPERATURE 0 -50 0 -500 -IB -100 -1000 -150 -1500 -200 -2000 -50 -25 0 25 50 75 100 125 150 (V-)+1.0 (V-)+1.5 (V-)+2.0 (V+)-1.5 (V+)-1.0 (V+)-0.5 Ambient Temperature (°C) VCM (V) Figure 14. Figure 15. VOS WARMUP 12 10 INPUT OFFSET CURRENT vs SUPPLY VOLTAGE 100 20 Typical Units Shown 80 40 2 0 -2 -4 -6 20 0 -20 -40 -60 -8 -80 -10 -12 0 10 5 Typical Units Shown 60 6 4 IOS (nA) VOS Shift (mV) 8 10 20 30 40 50 60 -100 2.25 4 6 8 10 Time (s) VS (±V) Figure 16. Figure 17. Submit Documentation Feedback 12 14 16 18 Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Links: OPA211-HT OPA211-HT www.ti.com SBOS481C – JULY 2009 – REVISED SEPTEMBER 2012 TYPICAL CHARACTERISTICS (continued) At TA = 25°C, VS = ±18 V, and RL = 10 kΩ, unless otherwise noted. INPUT OFFSET CURRENT vs COMMON-MODE VOLTAGE INPUT BIAS CURRENT vs SUPPLY VOLTAGE 100 150 VS = 36V 3 Typical Units Shown 75 3 Typical Units Shown 100 Unit 1 Unit 2 50 25 IB (nA) IOS (nA) 50 0 0 Unit 3 -25 -50 Common-Mode Range -50 -100 -75 -IB +IB -100 1 5 10 15 20 25 30 -150 2.25 35 6 8 10 12 VS (±V) Figure 18. Figure 19. INPUT BIAS CURRENT vs COMMON-MODE VOLTAGE 14 16 18 QUIESCENT CURRENT vs TEMPERATURE 6 150 -IB VS = 36V 3 Typical Units Shown 50 +IB 5 4 Unit 2 Unit 1 IQ (mA) 100 IB (nA) 4 VCM (V) 0 3 2 -50 Unit 3 -100 1 Common-Mode Range 0 -150 1 5 10 15 20 25 30 -75 -50 -25 35 25 50 75 100 125 150 175 200 Figure 20. Figure 21. QUIESCENT CURRENT vs SUPPLY VOLTAGE NORMALIZED QUIESCENT CURRENT vs TIME 4.0 0.05 3.5 0 3.0 IQ Shift (mA) -0.05 2.5 IQ (mA) 0 Temperature (°C) VCM (V) 2.0 1.5 -0.10 -0.15 -0.20 1.0 0.5 -0.25 0 -0.30 Average of 10 Typical Units 0 4 8 12 16 20 24 28 32 36 0 60 120 180 240 300 360 420 480 540 600 Time (s) VS (V) Figure 22. Figure 23. Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Links: OPA211-HT 11 OPA211-HT SBOS481C – JULY 2009 – REVISED SEPTEMBER 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = 25°C, VS = ±18 V, and RL = 10 kΩ, unless otherwise noted. 60 50 40 30 20 10 0 -10 -20 -30 -40 -50 SMALL-SIGNAL STEP RESPONSE (100 mV) G = -1 CL = 10pF Sourcing CF 5.6pF 20mV/div ISC (mA) SHORT-CIRCUIT CURRENT vs TEMPERATURE RI 604W RF 604W +18V OPA211 CL Sinking -18V -60 -75 -50 -25 0 25 50 75 Time (0.1ms/div) 100 125 150 175 200 Temperature (°C) Figure 24. Figure 25. SMALL-SIGNAL STEP RESPONSE (100 mV) SMALL-SIGNAL STEP RESPONSE (100 mV) G = +1 RL = 600W CL = 10pF G = -1 CL = 100pF RI 604W 20mV/div 20mV/div CF 5.6pF RF 604W +18V OPA211 +18V OPA211 -18V RL CL CL -18V Time (0.1ms/div) Time (0.1ms/div) Figure 26. Figure 27. SMALL-SIGNAL STEP RESPONSE (100 mV) SMALL-SIGNAL OVERSHOOT vs CAPACITIVE LOAD (100-mV Output Step) 60 +18V OPA211 -18V G = +1 50 Overshoot (%) 20mV/div G = +1 RL = 600W CL = 100pF RL 40 G = -1 30 G = 10 20 CL 10 0 Time (0.1ms/div) 0 200 400 600 800 1000 1200 1400 Capacitive Load (pF) Figure 28. 12 Figure 29. Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Links: OPA211-HT OPA211-HT www.ti.com SBOS481C – JULY 2009 – REVISED SEPTEMBER 2012 TYPICAL CHARACTERISTICS (continued) At TA = 25°C, VS = ±18 V, and RL = 10 kΩ, unless otherwise noted. LARGE-SIGNAL STEP RESPONSE LARGE-SIGNAL STEP RESPONSE G = -1 CL = 100pF RL = 600W G = +1 CL = 100pF RL = 600W RF = 100W 2V/div 2V/div RF = 0W Note: See the Applications Information section, Input Protection. Time (0.5ms/div) LARGE-SIGNAL POSITIVE SETTLING TIME (10 VPP, CL = 100 pF) LARGE-SIGNAL POSITIVE SETTLING TIME (10 VPP, CL = 10 pF) 1.0 0.008 0.8 0.008 0.6 0.006 0.6 0.006 0.4 0.004 0.002 0 0 -0.002 -0.2 (±1/2 LSB = ±0.00075%) -0.4 -0.004 0.4 0 -0.002 -0.004 -0.006 -0.008 -0.8 -1.0 -0.010 700 800 900 1000 -1.0 1.0 (±1/2 LSB = ±0.00075%) -0.6 -0.008 400 500 600 Time (ns) 0.002 -0.4 -0.8 200 300 0.004 0 -0.2 -0.006 100 16-Bit Settling 0.2 -0.6 0 0.010 0 100 200 300 400 500 600 Time (ns) -0.010 700 800 900 1000 Figure 32. Figure 33. LARGE-SIGNAL NEGATIVE SETTLING TIME (10 VPP, CL = 100 pF) LARGE-SIGNAL NEGATIVE SETTLING TIME (10 VPP, CL = 10 pF) 0.008 0.8 0.008 0.6 0.006 0.6 0.006 0.4 0.004 0.002 0 0 -0.2 (±1/2 LSB = ±0.00075%) -0.4 -0.002 -0.004 -0.6 -0.006 -0.8 -1.0 0 100 200 300 400 500 600 Time (ns) 0.010 0.4 16-Bit Settling 0.2 0 0.004 0.002 0 -0.2 (±1/2 LSB = ±0.00075%) -0.4 -0.002 -0.004 -0.6 -0.006 -0.008 -0.8 -0.008 -0.010 700 800 900 1000 -1.0 0 100 Figure 34. 200 300 400 500 600 Time (ns) D From Final Value (%) 16-Bit Settling D From Final Value (mV) 1.0 D From Final Value (%) 0.010 0.8 0.2 D From Final Value (%) 16-Bit Settling 0.2 D From Final Value (mV) 0.010 D From Final Value (%) D From Final Value (mV) Figure 31. 0.8 1.0 D From Final Value (mV) Time (0.5ms/div) Figure 30. -0.010 700 800 900 1000 Figure 35. Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Links: OPA211-HT 13 OPA211-HT SBOS481C – JULY 2009 – REVISED SEPTEMBER 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = 25°C, VS = ±18 V, and RL = 10 kΩ, unless otherwise noted. NEGATIVE OVERLOAD RECOVERY POSITIVE OVERLOAD RECOVERY G = -10 VIN G = -10 10kW VOUT 1kW 0V VOUT OPA211 VIN 5V/div 5V/div 10kW 1kW OPA211 VOUT VIN 0V VOUT VIN Time (0.5ms/div) Time (0.5ms/div) Figure 36. Figure 37. OUTPUT VOLTAGE vs OUTPUT CURRENT NO PHASE REVERSAL 20 0°C 15 5 5V/div VOUT (V) Output +85°C +125°C 10 +125°C 0 -55°C 0°C +150°C -5 +18V -10 37VPP (±18.5V) -15 -20 0 10 20 30 40 IOUT (mA) 50 60 -18V 0.5ms/div 70 Figure 38. Figure 39. TURN-OFF TRANSIENT TURN-ON TRANSIENT 20 20 15 15 10 10 Output Signal Shutdown Signal 5 5V/div 5 5V/div OPA211 Output +85°C 0 -5 0 Output Signal -5 -10 -10 Shutdown Signal -15 VS = ±15V -20 -15 VS = ±15V -20 Time (2ms/div) Time (2ms/div) Figure 40. 14 Figure 41. Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Links: OPA211-HT OPA211-HT www.ti.com SBOS481C – JULY 2009 – REVISED SEPTEMBER 2012 TYPICAL CHARACTERISTICS (continued) At TA = 25°C, VS = ±18 V, and RL = 10 kΩ, unless otherwise noted. TURN-ON/TURN-OFF TRANSIENT 20 1.6 15 1.2 10 0.8 5 0.4 0 -5 0 Output -0.4 -10 -0.8 -15 Output Voltage (V) Shutdown Pin Voltage (V) Shutdown Signal -1.2 VS = ±15V -20 -1.6 Time (100ms/div) Figure 42. Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Links: OPA211-HT 15 OPA211-HT SBOS481C – JULY 2009 – REVISED SEPTEMBER 2012 www.ti.com APPLICATION INFORMATION The OPA211 is a unity-gain stable, precision op amp with very low noise. Applications with noisy or highimpedance power supplies require decoupling capacitors close to the device pins. In most cases, 0.1-μF capacitors are adequate. Figure 43 shows a simplified schematic of the OPA211. This die uses a SiGe bipolar process and contains 180 transistors. OPERATING VOLTAGE OPA211 series op amps operate from ±2.25-V to ±18-V supplies while maintaining excellent performance. The OPA211 series can operate with as little as 4.5 V between the supplies and with up to 36 V between the supplies. However, some applications do not require equal positive and negative output voltage swing. With the OPA211 series, power-supply voltages do not need to be equal. For example, the positive supply could be set to 25 V with the negative supply at –5 V or vice-versa. The common-mode voltage must be maintained within the specified range. In addition, key parameters are assured over the specified temperature range, TA = –55°C to 210°C. Parameters that vary significantly with operating voltage or temperature are shown in the Typical Characteristics. V+ Pre-Output Driver IN- OUT IN+ V- Figure 43. OPA211 Simplified Schematic 16 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Links: OPA211-HT OPA211-HT www.ti.com SBOS481C – JULY 2009 – REVISED SEPTEMBER 2012 INPUT PROTECTION - OPA211 Input Output + (1) Figure 45 shows total circuit noise for varying source impedances with the op amp in a unity-gain configuration (no feedback resistor network, and therefore no additional noise contributions). Two different op amps are shown with total circuit noise calculated. The OPA211 has very low voltage noise, making it ideal for low source impedances (less than 2 kΩ). A similar precision op amp, the OPA227, has somewhat higher voltage noise but lower current noise. It provides excellent noise performance at moderate source impedance (10 kΩ to 100 kΩ). Above 100 kΩ, a FET-input op amp such as the OPA132 (very low current noise) may provide improved performance. The equation in Figure 45 is shown for the calculation of the total circuit noise. Note that en = voltage noise, In = current noise, RS = source impedance, k = Boltzmann’s constant = 1.38 × 10–23 J/K, and T is temperature in K. (1) RS OPA227 OPA211 100 Resistor Noise 10 2 2 2 EO = en + (in RS) + 4kTRS 1 100 1k 10k 100k 1M Source Resistance, RS (W) Figure 45. Noise Performance of the OPA211 and OPA227 in Unity-Gain Buffer Configuration Design of low-noise op amp circuits requires careful consideration of a variety of possible noise contributors: noise from the signal source, noise generated in the op amp, and noise from the feedback network resistors. The total noise of the circuit is the root-sum-square combination of all noise components. The resistive portion of the source impedance produces thermal noise proportional to the square root of the resistance. This function is plotted in Figure 45. The source impedance is usually fixed; consequently, select the op amp and the feedback resistors to minimize the respective contributions to the total noise. Figure 44. Pulsed Operation NOISE PERFORMANCE EO 1k BASIC NOISE CALCULATIONS RF RI 10k Votlage Noise Spectral Density, EO The input terminals of the OPA211 are protected from excessive differential voltage with back-to-back diodes, as shown in Figure 44. In most circuit applications, the input protection circuitry has no consequence. However, in low-gain or G = 1 circuits, fast ramping input signals can forward bias these diodes because the output of the amplifier cannot respond rapidly enough to the input ramp. This effect is illustrated in Figure 31 of the Typical Characteristics. If the input signal is fast enough to create this forward bias condition, the input signal current must be limited to 10mA or less. If the input signal current is not inherently limited, an input series resistor can be used to limit the signal input current. This input series resistor degrades the low-noise performance of the OPA211, and is discussed in the Noise Performance section of this data sheet. Figure 44 shows an example implementing a currentlimiting feedback resistor. VOLTAGE NOISE SPECTRAL DENSITY vs SOURCE RESISTANCE Figure 45 depicts total noise for varying source impedances with the op amp in a unity-gain configuration (no feedback resistor network, and therefore no additional noise contributions). The operational amplifier itself contributes both a voltage noise component and a current noise component. The voltage noise is commonly modeled as a timevarying component of the offset voltage. The current noise is modeled as the time-varying component of the input bias current and reacts with the source resistance to create a voltage component of noise. Therefore, the lowest noise op amp for a given application depends on the source impedance. For low source impedance, current noise is negligible and voltage noise generally dominates. For high source impedance, current noise may dominate. OPA227 and OPA132 have not been characterized or tested at 210°C. Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Links: OPA211-HT 17 OPA211-HT SBOS481C – JULY 2009 – REVISED SEPTEMBER 2012 www.ti.com Figure 46 illustrates both inverting and noninverting op amp circuit configurations with gain. In circuit configurations with gain, the feedback network resistors also contribute noise. The current noise of the op amp reacts with the feedback resistors to create additional noise components. The feedback resistor values can generally be chosen to make these noise sources negligible. The equations for total noise are shown for both configurations. TOTAL HARMONIC DISTORTION MEASUREMENTS OPA211 series op amps have excellent distortion characteristics. THD + Noise is below 0.0001% (G = 1, VO = 3 VRMS) throughout the audio frequency range, 20 Hz to 20 kHz, with a 600-Ω load. The distortion produced by OPA211 series op amps is below the measurement limit of many commercially available distortion analyzers. However, a special test circuit illustrated in Figure 47 can be used to extend the measurement capabilities. Op amp distortion can be considered an internal error source that can be referred to the input. Figure 47 shows a circuit that causes the op amp distortion to be 101 times greater than that normally produced by the op amp. The addition of R3 to the otherwise standard noninverting amplifier configuration alters the feedback factor or noise gain of the circuit. The closed-loop gain is unchanged, but the feedback available for error correction is reduced by a factor of 18 101, thus extending the resolution by 101. Note that the input signal and load applied to the op amp are the same as with conventional feedback without R3. The value of R3 should be kept small to minimize its effect on the distortion measurements. Validity of this technique can be verified by duplicating measurements at high gain and/or high frequency where the distortion is within the measurement capability of the test equipment. Measurements for this data sheet were made with an Audio Precision System Two distortion/noise analyzer, which greatly simplifies such repetitive measurements. The measurement technique can, however, be performed with manual distortion measurement instruments. SHUTDOWN The shutdown (enable) function of the OPA211 is referenced to the positive supply voltage of the operational amplifier. A valid high disables the op amp. A valid high is defined as (V+) – 0.35 V of the positive supply applied to the shutdown pin. A valid low is defined as (V+) – 3 V below the positive supply pin. For example, with VCC at ±15 V, the device is enabled at or below 12 V. The device is disabled at or above 14.65 V. If dual or split power supplies are used, care should be taken to ensure the valid high or valid low input signals are properly referred to the positive supply voltage. This pin must be connected to a valid high or low voltage or driven, and not left open-circuit. The enable and disable times are provided in the Typical Characteristics section (see Figure 40 through Figure 42). When disabled, the output assumes a high-impedance state. Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Links: OPA211-HT OPA211-HT www.ti.com SBOS481C – JULY 2009 – REVISED SEPTEMBER 2012 Noise in Noninverting Gain Configuration Noise at the output: R2 2 2 EO R1 = 1+ R2 R1 2 2 2 2 2 2 en + e1 + e2 + (inR2) + eS + (inRS) EO R2 Where eS = Ö4kTRS ´ 1 + R1 2 1+ R2 R1 = thermal noise of RS RS e1 = Ö4kTR1 ´ VS R2 R1 = thermal noise of R1 e2 = Ö4kTR2 = thermal noise of R2 Noise in Inverting Gain Configuration Noise at the output: R2 2 2 EO = 1 + R1 R2 R1 + RS 2 EO RS Where eS = Ö4kTRS ´ 2 2 2 2 en + e1 + e2 + (inR2) + eS R2 R1 + RS = thermal noise of RS VS e1 = Ö4kTR1 ´ R2 R1 + RS = thermal noise of R1 e2 = Ö4kTR2 = thermal noise of R2 For the OPA211 series op amps at 1kHz, en = 1.1nV/ÖHz and in = 1.7pA/ÖHz. Figure 46. Noise Calculation in Gain Configurations R1 R2 SIG. DIST. GAIN GAIN R3 Signal Gain = 1+ OPA211 VOUT R2 R1 Distortion Gain = 1+ R2 R1 II R3 Generator Output R1 R2 R3 1 101 ¥ 1kW 10W 11 101 100W 1kW 11W Analyzer Input Audio Precision System Two(1) with PC Controller Load Figure 47. Distortion Test Circuit Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Links: OPA211-HT 19 OPA211-HT SBOS481C – JULY 2009 – REVISED SEPTEMBER 2012 www.ti.com ELECTRICAL OVERSTRESS An ESD event produces a short duration, highvoltage pulse that is transformed into a short duration, high-current pulse as it discharges through a semiconductor device. The ESD protection circuits are designed to provide a current path around the operational amplifier core to prevent it from being damaged. The energy absorbed by the protection circuitry is then dissipated as heat. Designers often ask questions about the capability of an operational amplifier to withstand electrical overstress. These questions tend to focus on the device inputs, but may involve the supply voltage pins or even the output pin. Each of these different pin functions have electrical stress limits determined by the voltage breakdown characteristics of the particular semiconductor fabrication process and specific circuits connected to the pin. Additionally, internal electrostatic discharge (ESD) protection is built into these circuits to protect them from accidental ESD events both before and during product assembly. When an ESD voltage develops across two or more of the amplifier device pins, current flows through one or more of the steering diodes. Depending on the path that the current takes, the absorption device may activate. The absorption device has a trigger, or threshold voltage, that is above the normal operating voltage of the OPA211 but below the device breakdown voltage level. Once this threshold is exceeded, the absorption device quickly activates and clamps the voltage across the supply rails to a safe level. It is helpful to have a good understanding of this basic ESD circuitry and its relevance to an electrical overstress event. Figure 48 illustrates the ESD circuits contained in the OPA211 (indicated by the dashed line area). The ESD protection circuitry involves several current-steering diodes connected from the input and output pins and routed back to the internal power-supply lines, where they meet at an absorption device internal to the operational amplifier. This protection circuitry is intended to remain inactive during normal circuit operation. When the operational amplifier connects into a circuit such as that illustrated in Figure 48, the ESD protection components are intended to remain inactive and not become involved in the application circuit operation. However, circumstances may arise where an applied voltage exceeds the operating voltage range of a given pin. Should this condition occur, there is a risk that some of the internal ESD protection circuits may be biased on, and conduct current. Any such current flow occurs through steering diode paths and rarely involves the absorption device. RF +V +VS OPA211 RI ESD CurrentSteering Diodes -In +In Op-Amp Core Edge-Triggered ESD Absorption Circuit ID VIN Out RL (1) -V -VS (1) VIN = +VS + 500mV. Figure 48. Equivalent Internal ESD Circuitry and Its Relation to a Typical Circuit Application 20 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Links: OPA211-HT OPA211-HT www.ti.com SBOS481C – JULY 2009 – REVISED SEPTEMBER 2012 Figure 48 depicts a specific example where the input voltage, VIN, exceeds the positive supply voltage (+VS) by 500 mV or more. Much of what happens in the circuit depends on the supply characteristics. If VS can sink the current, one of the upper input steering diodes conducts and directs current to VS. Excessively high current levels can flow with increasingly higher VIN. As a result, the datasheet specifications recommend that applications limit the input current to 10 mA. If the supply is not capable of sinking the current, VIN may begin sourcing current to the operational amplifier, and then take over as the source of positive supply voltage. The danger in this case is that the voltage can rise to levels that exceed the operational amplifier absolute maximum ratings. In extreme but rare cases, the absorption device triggers on while VS and –VS are applied. If this event happens, a direct current path is established between the VS and –VS supplies. The power dissipation of the absorption device is quickly exceeded, and the extreme internal heating destroys the operational amplifier. Another common question involves what happens to the amplifier if an input signal is applied to the input while the power supplies VS and/or –VS are at 0 V. Again, it depends on the supply characteristic while at 0 V, or at a level below the input signal amplitude. If the supplies appear as high impedance, then the operational amplifier supply current may be supplied by the input source via the current steering diodes. This state is not a normal bias condition; the amplifier most likely will not operate normally. If the supplies are low impedance, then the current through the steering diodes can become quite high. The current level depends on the ability of the input source to deliver current, and any resistance in the input path. DFN PACKAGE The OPA211 is offered in an DFN-8 package (also known as SON). The DFN package is a QFN package with lead contacts on only two sides of the bottom of the package. This leadless package maximizes board space and enhances thermal and electrical characteristics through an exposed pad. DFN packages are physically small, and have a smaller routing area, improved thermal performance, and improved electrical parasitics. Additionally, the absence of external leads eliminates bent-lead issues. The DFN package can be easily mounted using standard printed circuit board (PCB) assembly techniques. See Application Note QFN/SON PCB Attachment (SLUA271) and Application Report Quad Flatpack No-Lead Logic Packages (SCBA017), both available for download at www.ti.com. The exposed leadframe die pad on the bottom of the package must be connected to V–. Soldering the thermal pad improves heat dissipation and enables specified device performance. DFN LAYOUT GUIDELINES The exposed leadframe die pad on the DFN package should be soldered to a thermal pad on the PCB. A mechanical drawing showing an example layout is attached at the end of this data sheet. Refinements to this layout may be necessary based on assembly process requirements. Mechanical drawings located at the end of this data sheet list the physical dimensions for the package and pad. The five holes in the landing pattern are optional, and are intended for use with thermal vias that connect the leadframe die pad to the heatsink area on the PCB. Soldering the exposed pad significantly improves board-level reliability during temperature cycling, key push, package shear, and similar board-level tests. Even with applications that have low-power dissipation, the exposed pad must be soldered to the PCB to provide structural integrity and long-term reliability. Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated Product Folder Links: OPA211-HT 21 PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) OPA211SHKJ ACTIVE CFP HKJ 8 1 TBD Call TI N / A for Pkg Type -55 to 210 OPA211S HKJ OPA211SHKQ ACTIVE CFP HKQ 8 1 TBD AU N / A for Pkg Type -55 to 210 OPA211S HKQ OPA211SKGD1 ACTIVE XCEPT KGD 0 400 TBD Call TI N / A for Pkg Type -55 to 210 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. 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OTHER QUALIFIED VERSIONS OF OPA211-HT : Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 • Catalog: OPA211 • Enhanced Product: OPA211-EP NOTE: Qualified Version Definitions: • Catalog - TI's standard catalog product • Enhanced Product - Supports Defense, Aerospace and Medical Applications Addendum-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. 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