SDAS222A − APRIL 1982 − REVISED DECEMBER 1994 • • • • Inverting Version of ′AS253 Permits Multiplexing From n Lines to One Line Performs Parallel-to-Serial Conversion Package Options Include Plastic Small-Outline (D) Packages and Standard Plastic (N) 300-mil DIPs D OR N PACKAGE (TOP VIEW) 1OE B 1C3 1C2 1C1 1C0 1Y GND description This data selector/multiplexer contains inverters and drivers to supply full binary decoding data selection to the AND-OR-invert gates. Separate output-enable (OE) inputs are provided for each of the two 4-line sections. 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC 2OE A 2C3 2C2 2C1 2C0 2Y The 3-state outputs can interface with and drive data lines of bus-organized systems. With all but one of the common outputs disabled (at the high-impedance state), the low impedance of the single enabled output drives the bus line to a high or low logic level. Each section has its own output enable. The output is disabled when OE is high. The SN74ALS353B is characterized for operation from 0°C to 70°C. FUNCTION TABLE INPUTS SELECT DATA C3 OE OUTPUT Y B A C0 C1 C2 X X X X X X H Z L L L X X X L H L L H X X X L L L H X L X X L H L H X H X X L L H L X X L X L H H L X X H X L L H H X X X L L H H H X X X H L L Select inputs A and B are common to both sections. Copyright 1994, Texas Instruments Incorporated !"#$ % &'!!($ #% )'*+&#$ ,#$(!,'&$% &!" $ %)(&&#$% )(! $.( $(!"% (/#% %$!'"($% %$#,#!, 0#!!#$1- !,'&$ )!&(%%2 ,(% $ (&(%%#!+1 &+',( $(%$2 #++ )#!#"($(!%- • DALLAS, TEXAS 75265 • HOUSTON, TEXAS 77251−1443 POST OFFICE BOX 655303 POST OFFICE BOX 1443 1 SDAS222A − APRIL 1982 − REVISED DECEMBER 1994 logic symbol† A B 1OE 1C0 1C1 1C2 1C3 2OE 2C0 2C1 2C2 2C3 14 2 1 6 5 4 3 0 1 G0 3 MUX EN 0 7 1 1Y 2 3 15 10 9 11 2Y 12 13 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. logic diagram (positive logic) 1OE 1C0 1C1 1 6 5 7 Data 1 1C2 1C3 B Select A 2C0 2C1 Data 2 2C2 2C3 2OE 2 1Y 4 3 2 14 10 11 9 12 13 15 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 2Y SDAS222A − APRIL 1982 − REVISED DECEMBER 1994 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions MIN NOM MAX 4.5 5 5.5 UNIT VCC VIH Supply voltage VIL IOH Low-level input voltage 0.8 V High-level output current −15 mA IOL TA Low-level output current 48 mA 70 °C High-level input voltage 2 Operating free-air temperature V V 0 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH VOL IOZH IOZL TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = − 18 mA IOH = − 2 mA VCC = 4.5 V, VCC = 4.5 V, IOH = − 15 mA IOL = 48 mA VCC = 5.5 V, VCC = 5.5 V, VO = 2.7 V VO = 0.4 V MIN VCC − 2 2.4 TYP‡ UNIT −1.2 V V 3.3 0.35 A, B II MAX 0.5 V 50 µA −50 µA 0.2 VCC = 5.5 V, VI = 7 V VCC = 5.5 V, VI = 2.7 V 20 VCC = 5.5 V, VI = 0.4 V −0.5 IO§ VCC = 5.5 V, VO = 2.25 V Outputs high 15 24 ICC VCC = 5.5 V Outputs low 19 31 Outputs disabled 18 30 All others 0.1 A, B IIH All others 40 A, B IIL All others mA A µA −1 −30 −112 mA mA mA ‡ All typical values are at VCC = 5 V, TA = 25°C. § The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 3 SDAS222A − APRIL 1982 − REVISED DECEMBER 1994 switching characteristics (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL A or B Y tPLH tPHL Data (any C) Y tPZH tPZL OE Y tPHZ tPLZ OE Y VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 =500 Ω, R2 = 500 Ω, TA = MIN to MAX† MIN MAX 3 10 2.5 9 2 7 1 6 1 5 2 9 1 6 1 5 † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. 4 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • UNIT ns ns ns ns SDAS222A − APRIL 1982 − REVISED DECEMBER 1994 PARAMETER MEASUREMENT INFORMATION SERIES 54ALS/74ALS AND 54AS/74AS DEVICES 7V RL = R1 = R2 VCC S1 RL R1 Test Point From Output Under Test CL (see Note A) From Output Under Test RL Test Point CL (see Note A) CL (see Note A) LOAD CIRCUIT FOR BI-STATE TOTEM-POLE OUTPUTS 3.5 V High-Level Pulse 1.3 V R2 LOAD CIRCUIT FOR 3-STATE OUTPUTS LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS 3.5 V Timing Input Test Point From Output Under Test 1.3 V 1.3 V 0.3 V 0.3 V tsu Data Input tw th 3.5 V 1.3 V 3.5 V Low-Level Pulse 1.3 V 0.3 V 1.3 V 0.3 V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATIONS 3.5 V Output Control (low-level enabling) 1.3 V 1.3 V 0.3 V tPZL Waveform 1 S1 Closed (see Note B) tPLZ 3.5 V Input tPHZ 1.3 V 0.3 V tPHL tPLH VOH In-Phase Output VOL 0.3 V 1.3 V 1.3 V VOL tPLH tPHL VOH 1.3 V 1.3 V [3.5 V 1.3 V tPZH Waveform 2 S1 Open (see Note B) 1.3 V VOH Out-of-Phase Output (see Note C) 0.3 V [0 V 1.3 V 1.3 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. When measuring propagation delay items of 3-state outputs, switch S1 is open. D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%. E. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuits and Voltage Waveforms • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 5 PACKAGE OPTION ADDENDUM www.ti.com 18-Sep-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty Lead/Ball Finish MSL Peak Temp (3) SN74AS353BD OBSOLETE SOIC D 16 TBD Call TI Call TI SN74AS353BDR OBSOLETE SOIC D 16 TBD Call TI Call TI SN74AS353BN OBSOLETE PDIP N 16 TBD Call TI Call TI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. 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