TI SN74BCT533

SCBS055A − JULY 1990 − REVISED NOVEMBER 1993
•
•
•
•
•
DW OR N PACKAGE
(TOP VIEW)
State-of-the-Art BiCMOS Design
Significantly Reduces ICCZ
Full Parallel Access for Loading
3-State Inverting Outputs Drive Bus Lines
or Buffer Memory Address Registers
ESD Protection Exceeds 2000 V
Per MIL-Std-883C, Method 3015
Package Options Include Plastic
Small-Outline (DW) Packages and Standard
Plastic 300-mil DIPs (N)
OE
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
description
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
LE
The SN74BCT533 is an 8-bit transparent D-type
latch with 3-state outputs designed specifically for
driving highly capacitive or relatively low-impedance loads. It is particularly suitable for
implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
When the latch-enable (LE) input is high, the Q outputs follow the complements of the data (D) inputs. When
LE is taken low, the Q outputs are latched at the inverse of the levels set up at the D inputs. The SN74BCT533
provides inverted data at its outputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus
lines without need for interface or pullup components.
The output-enable (OE) input does not affect the internal operations of the latch. Previously stored data can be
retained or new data can be entered while the outputs are in the high-impedance state.
The SN74BCT533 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each latch)
INPUTS
OUTPUT
Q
OE
LE
D
L
H
H
L
L
H
L
H
L
L
X
Q0
H
X
X
Z
Copyright  1993, Texas Instruments Incorporated
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1
SCBS055A − JULY 1990 − REVISED NOVEMBER 1993
logic symbol†
1
OE
LE
1D
2D
3D
4D
5D
6D
7D
8D
11
3
4
logic diagram (positive logic)
OE
EN
LE
C1
1D
1
5
6
8
9
13
12
14
15
17
16
19
11
C1
2
7
18
1
1Q
1D
3
1Q
1D
2Q
3Q
C1
4Q
2D
5Q
4
C1
7Q
3D
8Q
7
4D
13
6D
7D
8D
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•
4Q
12
5Q
15
6Q
16
7Q
1D
C1
18
9
1D
C1
17
3Q
1D
C1
14
6
1D
C1
5D
2Q
1D
C1
8
5
1D
6Q
† This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
2
2
1D
19
8Q
SCBS055A − JULY 1990 − REVISED NOVEMBER 1993
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 0.5 V to 7 V
Voltage range applied to any output in the disabled or power-off state, VO . . . . . . . . . . . . . . . . . − 0.5 V to 7 V
Voltage range applied to any output in the high state, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 0.5 V to VCC
Input clamp current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −30 mA
Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
recommended operating conditions
MIN
NOM
MAX
4.5
5
5.5
UNIT
VCC
VIH
Supply voltage
VIL
IIK
Low-level input voltage
0.8
V
Input clamp current
−18
mA
IOH
IOL
High-level output current
−15
mA
Low-level output current
64
mA
TA
Operating free-air temperature
70
°C
High-level input voltage
2
0
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•
V
V
3
SCBS055A − JULY 1990 − REVISED NOVEMBER 1993
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
VOL
II
IIH
IIL
IOS‡
IOZH
IOZL
ICCL
ICCH
ICCZ
Ci
TEST CONDITIONS
VCC = 4.5 V,
MIN
II = −18 mA
IOH = − 3 mA
VCC = 4.5 V
IOH = −15 mA
IOH = − 3 mA
VCC = 4.75 V,
VCC = 4.5 V,
2.4
3.3
2
3.1
0.42
VI = 2.7 V
VI = 0.5 V
VCC = 5.5 V,
VCC = 5.5 V,
VO = 0
VO = 2.7 V
VCC = 5.5 V,
VCC = 5.5 V,
MAX
UNIT
−1.2
V
V
2.7
IOL = 64 mA
VI = 5.5 V
VCC = 5.5 V,
VCC = 5.5 V,
TYP†
−100
VO = 0.5 V
0.55
V
0.4
mA
20
µA
−0.6
mA
−225
mA
50
µA
−50
µA
VCC = 5.5 V
VCC = 5.5 V
40
63
mA
5
8
mA
VCC = 5.5 V
VCC = 5 V,
5
8
mA
VI = 2.5 V or 0.5 V
VCC = 5 V,
VO = 2.5 V or 0.5 V
† All typical values are at VCC = 5 V, TA = 25°C.
‡ Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
Co
6
pF
11
pF
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
VCC = 5 V,
TA = 25°C
MIN
tw
tsu
Pulse duration, LE high
Setup time, data before LE↓
th
Hold time, data after LE↓
4
•
MAX
UNIT
4
4
ns
High or low
2.5
2.5
ns
High or low
3
3
ns
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•
MIN
MAX
SCBS055A − JULY 1990 − REVISED NOVEMBER 1993
switching characteristics (see Note 2)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
D
Q
tPLH
tPHL
LE
Q
tPZH
tPZL
OE
Q
tPHZ
tPLZ
OE
Q
VCC = 5 V,
CL = 50 pF,
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500 Ω,
R1 = 500 Ω,
R2 = 500 Ω,
R2 = 500 Ω,
TA = 25°C
TA = MIN to MAX†
UNIT
MIN
TYP
MAX
MIN
MAX
2.8
6.1
9.1
2.8
11.2
2.7
5.3
8.2
2.7
9.3
2.3
5
7.7
2.3
8.6
2.5
4.9
7.6
2.5
8.1
3.1
6.1
8.8
3.1
10.8
3.7
6.9
10
3.7
12
1.8
3.9
5.9
1.8
6.9
1.3
3.5
6.1
1.3
7.2
ns
ns
ns
ns
† For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
NOTE 2: Load circuits and voltage waveforms are shown in Section 1.
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•
5
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
Lead/Ball Finish
MSL Peak Temp (3)
SN74BCT533DW
OBSOLETE
SOIC
DW
20
TBD
Call TI
Call TI
SN74BCT533DWR
OBSOLETE
SOIC
DW
20
TBD
Call TI
Call TI
SN74BCT533N
OBSOLETE
PDIP
N
20
TBD
Call TI
Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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Addendum-Page 1
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