FEDL7012-04-01 1Semiconductor ML7012-04 This version: Sep. 2000 2400 bps Single Chip Full Duplex Data Modem with Protocol GENERAL DESCRIPTION The ML7012-04 is a single chip modem LSI device that enables data communication conforming to ITU-T recommendations V.22bis, V.22, and V.21. This device is equipped with the error correction protocol function conforming to MNP Class 4. (The MNP Class 4 can be used for V.22bis or V.22.) The ML7012-04 consists of high speed DSP, analog front end, and digital logic circuit. In addition, this device provides local analog loop testing, synchronous/asynchronous switching, dialing, and auto answering functions. The ML7012-04 has a serial interface as an external interface. When integrated into the system, it is controlled from a control CPU through a serial interface (e.g. UART). By connecting a level converter, the ML7012-04 can easily implement a modem that can be controlled through the RS-232C interface. FEATURES • Conforming to ITU-T Recommendations V.22 bis, V.22, and V.21: Asynchronous • Error correction function conforming to MNP Class 4 • Serial interface: V.24 interface • AT commands (excluding automatic command speed detection) • Terminal data speed between DTE and DCE: 9600 bps, 2400 bps, 1200 bps, 300 bps • Character format: 10 bit/character • DTMF sending function • Pulse-dial control signal output • Call progress tone • Auto answering function • Built-in electronic HYB circuit (a line transformer can be directly coupled) • Single +3 V power supply • Power consumption: Typ. = 35 mA (VDD = 3.3 V) • Package: 64-pin plastic QFP (QFP64-P-1414-0.80-BK) (Product name: ML7012-04GA) * MNP is a registered trademark of Microcom Inc. 1/22 FEDL 7012-04-01 1Semiconductor ML7012-04 BLOCK DIAGRAM RLY2 RLY1 RTS AOUT CTS Modulation/ DCD demodulation AFE RCI – + RCAO DSR TXAI CI STD UART SRD SPEED1, 0 Control section DTR Tone generation TI8 to 0 TO10 to 0 – + TXAP – + AIN Clock generation OSC1 TST2 to 0 TXAN Tone detection PDN/RST OSC0 – + GSR To each section SG Gen. SG SPK RII VDD2, 1 VDDA GND2, 1 GNDA 2/22 FEDL 7012-04-01 1Semiconductor ML7012-04 TO8 CTS GND2 RTS SRD STD RLY2 NC RLY1 RII VDD2 GSR AIN SG GNDA NC 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 PIN CONFIGURATION (TOP VIEW) TO10 5 44 RCI DTR 6 43 AOUT CI 7 42 VDDA TI8 8 41 OSC1 TO0 9 40 OSC0 TO1 10 39 TI7 TO2 11 38 TI6 SPEED1 12 34 TI5 SPEED0 13 36 NC TI0 14 35 PDN/RST TI1 15 34 TST0 NC 16 33 NC NC 32 RCAO GND1 31 45 TST1 30 4 TST2 29 TO9 TO7 28 TXAI TO6 27 46 TO5 26 3 NC 25 DCD TO4 24 TXAN TO3 23 47 SPK 22 2 TI4 21 DSR VDD1 20 TXAP TI3 19 48 TI2 18 1 NC 17 NC 64-Pin Plastic QFP Note: Pins marked (NC) are no-connection pins which are left open. 3/22 FEDL 7012-04-01 1Semiconductor ML7012-04 PIN DESCRIPTIONS System & Clock Symbol I/O OSCO I OSC1 O Description Pins to connect crystal, resistors and capacitors for the master clock oscillation. When supplying the master clock from an external source, use OSC0 and leave OSC1 open. Master clock frequency = 11.0592 MHz. When PDN/RST = “0”, OSC1 = “1”. Power-down and reset control input pin. When PDN/RST = “0”, this device is in the power-down state and internal circuits are reset. “0”: Power-down state, “1”: Normal operation PDN/RST I After power-on, use this pin after setting it to “0” for 1 µs or more to reset internal circuits. Waiting for 230 ms or more is required until restarting a normal operation after reset release. If this pin remains at “0” after power-on, the internal circuits become undefined and the power-down current may increase. To avoid this, input “1” to this pin and start oscillation or input the master clock to operate the internal circuits, and then set it to “0” V.24 Serial Interface Symbol STD I/O I SRD O RTS I CTS O DCD O DSR O DTR I CI O Description Send data input pin Receive data output pin When PDN/RST = “0”, SRD outputs “1”. RTS (Request to Send) signal input pin CTS (Clear to Send) signal output pin When PDN/RST = “0”, CTS outputs “1”. DCD (Data Carrier Detect) signal output pin When PDN/RST = “0”, DCD outputs “1”. DSR (Data Set Ready) signal output pin When PDN/RST = “0”, DSR outputs “1”. DTR (Data Terminal Ready) signal input pin CI (Calling Indicator) signal output pin (*2) When PDN/RST = “0”, CI outputs “1”. 0: Space, 1: Mark 0: Space, 1: Mark 0: On, 1: Off 0: On, 1: Off 0: On, 1: Off 0: On, 1: Off 0: On, 1: Off 0: On, 1: Off 4/22 FEDL 7012-04-01 1Semiconductor ML7012-04 Analog Interface Symbol I/O AOUT O RCI I RCAO O TXAI I TXAN O TXAP O AIN I GSR O SG O Description Transmit analog output pin When PDN/RST = “0”, AOUT is in a high impedance state. Operational amplifier input pin constituting transmit RC active Operational amplifier output pin constituting transmit RC active When PDN/RST = “0”, RCAO is in a high impedance state. Input pin of the line transformer drive amplifier Output pin of the line transformer drive amplifier (1) When PDN/RST = “0”, TXAN is in a high impedance state. Output pin of the line transformer drive amplifier (2) When PDN/RST = “0”, TXAP is in a high impedance state. Input pin of the receive input amplifier Output pin of the receive input amplifier When PDN/RST = “0”, GSR is in a high impedance state. Pin to connect capacitors for the SG circuit When PDN/RST = “0”, SG is in a high impedance state. PSTN Line Control Interface Symbol I/O Description Off-hook and pulse dial control signal output pin (*1) RLY1 O 0: On-hook or break state of pulse dial 1: Off-hook or make state of pulse dial When PDN/RST = “0”, RLY1 outputs “0”. The control signal output pin to disconnect interlinked telephones (*1) RLY2 O 0: PSTN is connected with interlinked telephones 1: PSTN is disconnected with interlinked telephones but connected with modem When PDN/RST = “0”, RLY2 outputs “0”. Incoming signal input pin (*2) RII I Input “0” while detecting an incoming signal Input “1” while not detecting an incoming signal Fix this pin to "1" when a ring detector is not used. Speaker control signal output pin SPK O 0: speaker On 1: speaker Off When PDN/RST = “0”, SPK outputs “1”. 5/22 FEDL 7012-04-01 1Semiconductor ML7012-04 Other Interface Symbol I/O Description Data Transmission Speed between DTE and DCE Speed 1 Speed 0 I Speed 1 Speed 0 Speed 0 0 300 bps I 0 1 1200 bps 1 0 2400 bps 1 1 9600 bps Test Interface Symbol I/O Description TST2 to 0 I Input “0”. TI8 to 0 I Input “0”. TO10 to 0 O Leave open. Power Supply Symbol I/O VDDA I Analog VDD pin Description GNDA I Analog GND pin VDD2 to 1 I Digital VDD pin GND2 to 1 I Digital GND pin (*1) Pre-pause Dialing Communicating Command RLY1 RLY2 Line Connection (*2) RII 150 ms 400 ms CI One incoming signal 6/22 FEDL 7012-04-01 1Semiconductor ML7012-04 Absolute Maximum Ratings Parameter Symbol Rating Unit VDD –0.3 to +5.0 V Analog Input Voltage VAIN –0.3 to VDD +0.3 V Digital Input Voltage VDIN –0.3 to VDD +0.3 V Power Supply Voltage Power dissipation PD to 500 mW Output short-circuit current VOUT to 90 mA Storage Temperature TSTG –55 to +150 °C Recommended Operating Conditions Parameter Symbol Condition Power Supply Voltage VDD — 2.7 — 3.6 V Operating Temperature TOP — –20 +25 +70 °C High Level Input Voltage VIH — VDD V VIL All digital input pins excluding OSC0 0.7 × VDD Low Level Input Voltage 0 — 0.16 × VDD V Digital Input Rise time tir — — 20 ns Digital Input Fall Time tif — — 20 ns Input Clock Frequency Deviation FMCK 11.0592 MHz –100 — +100 ppm Master CLK Duty DMCK Input to OSC0 40 50 60 % CDL Digital output pin — — 50 pF Rrat1 — — 1 1.05 — Digital Output Load R1 to R3 Resistance Ratio (R3/R1) All digital input pins Min. Typ. Max. Unit Rrat2 VDD ≥ 3 V — — 2 — Rrat3 VDD ≥ 2.7 V — — 1.6 — SG Bypass Capacitor CSG SG pin 1 — — µF Oscillator Feedback Resistance ROSC Between OSC0 and OSC1 800 1000 1200 kΩ C01, C02 OSC0 and OSC1 pins — 15 — pF Oscillation Frequency — — — 11.0592 — MHz Frequency Deviation — Including temperature characteristics –80 — +80 ppm Equivalent Series Resistance *1 — — — — 90 Ω Load Capacitance *1 — — — 12 — pF R4 to R5 Resistance Ratio (R5/R4) OSC0 and OSC1 Load Capacitance Crystal *1: If the crystal manufacturer’s evaluation is sufficiently verified, the values of equivalent series resistance and load capacitance may be changeable so long as the frequency deviation is within the range specified above. 7/22 FEDL 7012-04-01 1Semiconductor ML7012-04 ELECTRICAL CHARACTERISTICS DC Characteristics Parameter Symbol Condition (VDD = 2.7 to 3.6 V, Ta = –20 to +70°C) Min. Typ. Max. Unit IDO — — 35 65 mA IDDS Power-down mode *1 — 1 1000 µA IIH VI = VDD — 0 20 µA IIL VI = 0 V — 0 20 µA High Level Digital Output Voltage V0H I0H = –0.4 mA — V Low Level Digital Output Voltage V0L I0L = 3.2 mA — 0.1 0.4 V Input Capacitance CIN — — 5 — pF Power Supply Current Input Leakage Current 0.8 × VDD 0.99 × VDD *1: In the case where the device is powered down after once activated. 8/22 FEDL 7012-04-01 1Semiconductor ML7012-04 Analog Interface Parameter (VDD = 2.7 to 3.6 V, Ta = –20 to +70°C) Min. Typ. Max. Unit Symbol Condition RIN RCI, TXAI, AIN — 10 — MΩ RL1 AOUT, RCAO, GSR 20 — — kΩ RL2 Between TXAN and TXAP 1080 — — Ω CL Analog output — — 100 pF SG Output Voltage VSG SG 1.3 1.4 1.65 V SG Output Impedance RSG SG — 30 — kΩ VAOM AOUT, S34 = 0 dm –19.5 –18.0 –16.0 dBm Input Resistance Output Load Resistance Output Load Capacitance Carrier Output Level DTMF Low Group Output Level VDTL AOUT, S35 = 0 dm –17.0 –15.5 –13.5 dBm DTMF High Group Output Level VDTH AOUT, S35 = 0 dm –16.0 –14.5 –12.5 dBm DTMF Output Frequency Precision TSDF Against a nominal frequency –1.5 — +1.5 % VAOAT AOUT, S34 = 0 dB –20 –18.0 –15.5 dBm TSAF Against 2100 Hz –10 — +10 Hz Answer Tone Output Level Answer Tone Output Frequency Precision VS1 4 to 8 kHz — — –20 dBm VS2 8 to 12 kHz — — –40 dBm 12 kHz or more (each 4 kHz band) — — –60 dBm Undesired Sending Level TXAN, TXAP VS3 Carrier Receive Input Level Carrier Detection Level VGSR VON VOFF GSR level GSR level *2 –46 — –15 dBm OFF→ ON –46 — — dBm ON→ OFF — — –54 dBm Carrier Detection Delay Time tCDD — OFF→ ON 25 — ms Carrier Detection Hold Time tCDH — ON→ OFF 15 — ms Answer Tone Detection/Nondetection Level ATDL — dBm — dBm — dBm — dBm Call Progress Tone Detection/Non-detection Level CPDL GSR level GSR level — — –50 –50 *1: The unit of the signal level (dBm) is 0 dBm = 0.775 Vrms. *2: The values of the carrier detection level are those for QAM, PSK and FSK modulation signals. 9/22 FEDL 7012-04-01 1Semiconductor ML7012-04 COMMAND DESCRIPTIONS AT Commands (1) Command format AT commands begin with <AT> or <at>. Character strings to a carriage return code are interpreted as commands to be executed successively. A result code is returned to DTE after the completion of interpretations. AT Characters CR LF However, the commands of A, D, Dc, On, Zn, Ax, &Tn and &Zn must be set at the end of the sequence of commands. Any commands set after those commands are ignored. The maximum command character string is 40 characters (space <20h> is ignored). Input characters can be deleted by a backspace function (a cord is changeable). <CR> is a Carriage Return code (changeable). <LF> is a Line Feed code (not mandatory and changeable). Both capital and small letters can be recognized with the exception of At and aT. The communication with the terminal when inputting commands is handled as an asynchronous mode, and the character format is checked automatically as soon as <AT> or <at> is input. This device cannot be guaranteed for normal operation when character strings or parameters not listed below are input. (2) Terminal data speed and character format The communication mode to DTE with the V.24 interface is as follows: Terminal data speed: 9600/2400/1200/300 bps Character format: Listed below Start Bit Data Bit Parity Stop Bit Character Length 1 7 None 2 10 1 7 Odd number 1 10 1 7 Even number 1 10 1 8 None 1 10 10/22 FEDL 7012-04-01 1Semiconductor ML7012-04 (3) AT command list It is regarded that n = 0 when the parameter is not specified to the command with parameter (n). CMD Style +++AT <CR> — A ATA ATD Function Initial Value Goes to on-line command mode from data mode. Inputs +++AT <CR> in data mode. — Does not move to on-line command mode until <CR>is input. Starts line connection in answer mode — Starts line connection in originate mode — Connects lines in originate mode after dialing. c: Dial control character Pulse: 0, 1, 2, 3 ,4, 5, 6, 7, 8, 9 Tone: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, *, # Note @ Silence Detection Next dialing is executed when continuous silence of 5 sec is detected after ring back tone within the period specified in S7 register. Sends back ‘BUSY’ when busy tone is detected and sends back ‘NO ANSWER’ when no silence is detected after ring back tone. D ATDc ! Flash Dialing is put on hold for the period specified in the S8 register for pause settings. — ,Comma The line is put on-hook for 0.5 sec. Dialing is put on hold for the period specified in the S8 register for pause settings. ; Moves to command mode without disconnecting lines after dialing is completed. E ATEn H ATH I ATI M ATMn O ATO P: Dials the number in pulse mode thereafter. T: Dials the number in tone mode thereafter. W: Detects a dial tone. Detects the next dial string process when dial tone is detected during the period specified in S7 register regardless of ATXn command settings. When it is not detected, ‘NO DIALTONE’ is returned. Selects the answer-back function for the commands. N = 0: No answer back for command input characters. N = 1: Answer back for command input characters. Controls the line connection. N = 0: On-hook N = 1: Off-hook Displays the modem manufacturer’s code '24A' as a result code is returned to DTE after ATI0<CR> is executed. Selects the monitor speaker operation. N = 0: Always OFF N = 1: ON from dialing to line connection N = 2: Always ON N = 3: ON when connected with a remote modem Goes to data mode from on-line command mode. 1 — — 1 — 11/22 FEDL 7012-04-01 1Semiconductor CMD P Style ATP Q ATQn T ATSr ATSr? ATSr = d ATT V ATVn S ML7012-04 Function Initial Value Sets dialing mode to pulse. — Selects the result code transmission. n = 0: Result code is transmitted. 0 n = 1: Result code is not transmitted. Sets the pointer value for S resistor to “r”. — Echoes back the content of S resistor specified by “r”. — Sets the content of S resistor specified by “r” to “d’. — Sets dialing mode to DTMF. — Selects the type of result code. n = 0: Number 1 n = 1: Characters Selects the extended result code and call progress tone detection. Note n X 0 1 2 3 4 Function Result Code o o o o o Line connection 300 bps CONNECT — o o o o — o o o o — — o — o — — — o o ATXn Z ATZ &C AT&Cn &D AT&Dn &G AT&Gn &P AT&Pn Line connection CONNECT 1200 1200 bps Line connection CONNECT 2400 2400 bps Dial tone detection NO DIAL TONE Busy tone detection 4 BUSY Reset in the same way the PDN/RST pin is set to “0”. Controls data carrier detection signals (DCD). n = 0: Always sets DCD to ON. n = 1: Controls DCD by detecting reception carriers. Controls the modem in DTR signal state. n = 0: Ignores DTR signals. n = 1: Ignores DTR signals. In data mode, however, moves to on-line command mode when DTR signals change from ON to OFF n = 2, 3: Goes to command mode after disconnecting lines when the change of DTR from ON to OFF is detected during communication. Sets the guard tone transmission. n = 0: No guard tone n = 1: With guard tone of 550 Hz n = 2: With guard tone of 1800 Hz Selects the make rates of pulse dialing. n = 0: 39% (10 pps) n = 1: 33% (10 pps) n = 2: 33% (20 pps) — 0 2 0 1 12/22 FEDL 7012-04-01 1Semiconductor CMD Style &T AT&Tn %E AT%En \L AT\Ln \N AT\Nn \Q AT\Qn \V AT\Vn ML7012-04 Function Initial Value Controls the loop back test mode. n = 0: None n = 1: Starts local analog loop back test (ALB) n = 2, 3: None n = 4: Responds to the RDL test requirement — n = 5: Does not respond to the RDL test requirement n = 6: Starts remote digital loop back test (RDL) n = 7: Starts RDL self-diagnostic test. n = 8: Starts ALB self-diagnostic test. Selects automatic re-training function due to poor incoming conditions of the receive section. 1 n = 0: Automatic re-training is invalid. n = 1: Automatic re-training is valid. Checks the line type and displays the result. n = 0: Checks PBX or direct line. — n = 1: Checks pulse or tone line. Selects data control mode. n = 0,1: Selects normal mode (without error correction). n = 2-5: None n = 6: Selects reliable mode. Disconnects the line when 7 MNP connection is not available. n = 7: Selects auto-reliable mode. Connects in normal mode when MNP connection is not available. Selects the flow control between DTE and modem. n = 0: No flow control n = 1: None 3 n = 2: None n = 3: Bi-directional control by CTS/RTS Selects extended result code. n = 0: Displays the normal result code. n = 1: Displays the result code with the mode of the MNP 0 connection. n = 2, 3: None Note 13/22 FEDL 7012-04-01 1Semiconductor ML7012-04 Result Code The result code is returned to DTE after AT command is executed. Two types of result codes are available and can be selected by the Vn command. It is possible to select whether the result code is returned or not by using the Qn command. The format of 2 types of result codes is as follows: In the case of number number CR In the case of characters CR LF Characters CR LF Result Code List Number Character String Meaning 0 OK Command is correctly executed. 1 CONNECT Connected 2 RING Incoming signal is detected. 3 NO CARRIER Aborted the connection or on-hook 4 ERROR Found the error in the command 5 CONNECT 1200 Connected at 1200 bps 6 NO DIAL TONE Dial tone cannot be detected. 7 BUSY Busy tone is detected. 8 NO ANSWER Silence state cannot be detected. 10 CONNECT 2400 Connected at 2400 bps 12 CONNECT 9600 Connected at 9600 bps in normal mode 22 CONNECT 1200/REL Connected at 1200 bps in MNP mode 23 CONNECT 2400/REL Connected at 2400 bps in MNP mode 90 EXT Judged as PBX line 91 DIRECT Judged as a direct line 92 DTMF Judged as a tone line 93 PULSE Judged as a pulse line 14/22 FEDL 7012-04-01 1Semiconductor ML7012-04 REGISTERS S Register Setting In this modem, memory used as S Registers is provided in RAM to set variables used for modem environment settings or to read modem status. Normal operation is not guaranteed when register numbers not specified in this data sheet or parameters outside the specification are input. (1) S register setting The format to set S registers is as follows: AT<Sn> = <d> <n> specifies the register No. from decimal 0 to 27, 34, and 35. <d> specifies the number to be set from decimal 0 to 255. If no number is specified at <n> and <d>, it is regarded as “0”. (2) S register reading The format to read S registers is as follows: ATS<n>? <n> specifies the register No. from decimal 0 to 27, 34, and 35. If no number is specified at <n>, it is regarded as “0”. 15/22 FEDL 7012-04-01 1Semiconductor ML7012-04 S Register List Refer to the “Bit map S register list” if the function is specified as “Bit map register”. Register No. Set Range Unit Initial Value Function 0 0-255 time 0 Setting of the number to receive the ring signal at automatic receive mode. When set to “0”, automatic receive function is disabled. 1 0-255 time 0 The number of receiving rings 2 — — — Not used 3 0-127 ASCII code 13 Carriage return code 4 0-127 ASCII code 10 Line feed code 5 0-127 ASCII code 8 Back space code 6 4-255 sec 4 Pause time from off-hook to start dialing (Only when setting ATX0, X1, and X3) 7 1-115 sec 60 Waiting time for carrier from the far end modem. It is set to on-hook when no carrier is detected after the time specified. 8 0-255 sec 2 Pause time for dialing. It is referred when dial character < , > is used. 9 — — — Not used Carrier lost detection time 10 1-255 1/10 sec 14 It is set to on-hook automatically when the lost of carrier signal is longer than the specified time. Carrier lost detection is invalid when 255 is set. DTMF tone transmit time 11 1-255 1/100 sec 9 Sets DTMF transmit time. DTMF tone is continuously transmitted when set at 255. 12 — — — Not used 13 — — — Not used 14 — — 170 15 — — — Bit map register Not used 16 — — 0 Bit map register 17 — — — Not used 18 0-255 sec 0 Timer for loop back test 19 — — — Not used 20 — — — Not used 21 — — 18 Bit map register 22 — — 244 Bit map register 23 — — 23 Bit map register 24 to 27 — — — Not used 34* 0-255 dB 2 35* 0-255 dB 0 Sets the level attenuator of transmit carrier. When 15 to 255 is input, value is fixed to 15. Sets the sending level attenuator of DTMF signal. When 15 to 255 is input, value is fixed to 15. *Refer to the “Analog Interface Characteristics” for the analog transmit level for S34 and S35. 16/22 FEDL 7012-04-01 1Semiconductor ML7012-04 Bit Map Register List S14 Bit Initial value 7 1 Answer mode Function in 0 setting Originate mode Function in 1 setting Command 6 0 Not used Not used 5 1 Tone dial Pulse dial T, P 4 0 Pulse speed 10 pps Pulse speed 20 pps &P 3 1 Makes the result code the number. Makes the result code the character string. V 2 0 With the result code No result code Q 1 1 No echo back With echo back E 0 0 Not used Not used A, D S16 Bit Initial value 7 0 Not used Function in 0 setting Function in 1 setting 6 0 Stops analog diagnostic. 5 0 Stops remote digital loop back self- Remote digital diagnostic. diagnostic test 4 0 Stops remote digital loop back test. Remote digital loop back test 3 0 Not used Not used 2 0 Not used Not used 1 0 Not used Not used 0 0 Stops analog loop back test. Analog loop back test Command Not used loop back self- Analog loop back self-diagnostic test loop back self- &T8 &T7 &T6 &T1 S21 Bit First value 7 0 Does not break Function in 0 setting Breaks 6 0 DSR signal is always ON. DSR signal operates by ITU-T. &S 5 0 CD signal is always ON. CD signal is ON by carrier detection. &C 4 1 0 1 &D 3 0 0 2 0 Not used Not used 1 1 Auto re-train disabled Auto re-train enabled 0 0 Not used Not used &D0 0 1 &D1 Function in 1 setting 0 command Y &D2 1 1 &D3 DTR Control %E 17/22 FEDL 7012-04-01 1Semiconductor ML7012-04 S22 Bit Initial value 7 1 Pulse dial make rate 39% Function in 0 setting 6 1 0 5 1 0 4 1 0 3 0 0 2 1 0 1 0 Not used Not used 0 0 Not used Not used 1 X0 1 0 X1 0 0 M0 Function in 1 setting 1 X2 1 0 1 M1 1 Command Pulse dial make rate 33% 0 1 1 X3 1 1 X 1 0 M2 &P X4 1 Extended command M3 M S23 Bit Initial value 7 0 0 Function in 0 setting 6 0 0 5 0 0 Parity 0 Parity 1 Parity 1 Parity 4 1 0 Even No. 1 Mark 0 Odd No. 1 None 3 0 Not used Not used 2 1 Not used Not used 1 1 Not used Not used 0 1 Ignores the remote digital loop back Responds to the remote digital loop request. back request. &G0 0 1 &G1 Function in 1 setting 1 0 &G2 1 1 &G3 Command &G &T4, &T5 18/22 FEDL 7012-04-01 1Semiconductor ML7012-04 APPLICATION CIRCUITS Analog Interface ML7012 AOUT – + R1 R3 C2 RCI C1 R2 RCAO – + R4 TXAI R5 – + TXAN RA 600 Ω: 600 Ω RB ( = RA) R6 600 Ω – + C3 0.022 µF LINE TXAP R7 AIN – + R8 GSR • SG SG Gen. C4 1 µF • • The 2nd order LPF should be built to make fc approximately 5 kHz using the built-in amplifier, R1 to R3, and C1 and C2. Numeric examples: R1 = R2 = R3 = 68 k Ω C1 = 1000 pF, C2 = 220 pF When VDD ≥ 3 V, R5/R4 ≤ 2. When VDD < 3 V, R5/R4 ≤ 1.6. 19/22 FEDL 7012-04-01 1Semiconductor ML7012-04 Examples of Level Diagram (1) Modem transmit: VDD ≥ 3 V AOUT = –20 dBm, RCAO = –20 dBm, TXAN = –14 dBm, TXAP = –14 dBm, LINE = –16 dBm (S34 = 2 dB (initial value), R5/R4 = 2, transformer loss = 2 dB) (2) DTMF transmit: VDD ≥ 3 V: high group level The low group levels are approximately 1 dB smaller than the values below. AOUT = –14.5 dBm, RCAO = –14.5dBm, TXAN = –8.5 dBm, TXAP = –8.5 dBm, LINE = –10.5 dBm (S35 = 0 dB (initial value), R5/R4 = 2, transformer loss = 2 dB) (3) Modem transmit: VDD ≥ 2.7 V AOUT = –20 dBm, RCAO = –20 dBm, TXAN = –15.9 dBm, TXAP = –15.9 dBm, LINE = –17.9 dBm (S34 = 2 dB (initial value), R5/R4 = 1.6, transformer loss = 2 dB) (4) DTMF transmit: VDD ≥ 2.7 V: high group level The low group levels are approximately 1 dB smaller than the values below. AOUT = –14.5 dBm, RCAO = –14.5 dBm, TXAN = –10.4 dBm, TXAP = –10.4 dBm, LINE = –12.4 dBm (S35 = 0 dB (initial value), R5/R4 = –1.6, transformer loss 2 dB) (5) Maximum modem receive: LINE = –9 dBm, connecting point of R6, and R7 = –11 dBm, GSR = –15 dBm (R8/R7 = 0.63 = –4 dB, transformer loss = 2 dB) (6) Minimum modem receive LINE = –40 dBm, connecting point of R6 and R7 = –42 dBm, GSR = –46 dBm (R8/R7 = 0.63 = –4 dB, transformer loss = 2 dB) Connection of Crystal Oscillator Connect a 11.0592 MHz crystal unit and a 1 MΩ feedback resistor between OSC0 and OSC1. The values of capacitors C01 and C02 connected between OSC0 and GND, and OSC1 and GND vary with the load capacitance of the crystal unit and the wiring capacitance of the board. Set the values by the crystal manufacture’s matching evaluation. If an external clock is used, input it to OSC0. C01 15 pF OSC0 11.0592 MHz ROSC OSC1 1 MΩ C02 15 pF 20/22 FEDL 7012-04-01 1Semiconductor ML7012-04 PACKAGE DIMENSIONS (Unit: mm) QFP64-P1414-0.80-BK 5 Package material Lead frame material Pin treatment Package weight (g) Rev. No./Last Revised Epoxy resin 42 alloy Solder plating (≥5µm) 0.87 TYP. 5/Sept.21,1999 Notes for Mounting the Surface Mount Type Package The surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 21/22 FEDL 7012-04-01 1Semiconductor ML7012-04 NOTICE 1. The information contained herein can change without notice owing to product and/or technical improvements. Before using the product, please make sure that the information being referred to is up-to-date. 2. The outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. When planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. 3. When designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. 4. Oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. 5. Neither indemnity against nor license of a third party’s industrial and intellectual property right, etc. is granted by us in connection with the use of the product and/or the information and drawings contained herein. No responsibility is assumed by us for any infringement of a third party’s right which may result from the use thereof. 6. The products listed in this document are intended for use in general electronics equipment for commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). These products are not authorized for use in any system or application that requires special or enhanced quality and reliability characteristics nor in any system or application where the failure of such system or application may result in the loss or damage of property, or death or injury to humans. Such applications include, but are not limited to, traffic and automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, and life-support systems. 7. Certain products in this document may need government approval before they can be exported to particular countries. The purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these. 8. No part of the contents contained herein may be reprinted or reproduced without our prior permission. Copyright 2000 Oki Electric Industry Co., Ltd. 22/22