Semiconductor MR53V3203J This version: Feb. 1999 Previous version: ------- Preliminary 2,097,152-Word X 16-Bit MASK ROM DESCRIPTION The MR53V3203J is a 32Mbit Read-Only Memory whose configuration can is 2,097,152 word x 16bit. The MR53V3203J operates asynchronously, external clocks are not required, making this device easy-to-use. The MR53V3203J is suitable as large-capacity fixed memory for microcomputers and data terminals. It is manufactured using a CMOS silicon gate technology and is offered in 42-pin DIP FEATURES · 2,097,152 word x 16bit configuration · Single +2.7V~3.6V power supply · Access time 100ns (@Vcc=3.0V~3.6V) 120ns (@Vcc=2.7V~3.3V) · VCC power supply current 40mA (@Vcc=3.0V~3.6V) 30mA (@Vcc=2.7V~3.3V) · VCC standby current 10mA · Input / Output TTL compatible · Three-state output · Packages 42-pin plastic DIP (DIP42-P-600-2.54) MR53V3203J-XXRA 1/7 MR53V3203J Semiconductor PIN CONFIGURATION (TOP VIEW) A18 1 42 A19 A17 2 41 A8 A7 3 40 A9 A6 4 39 A10 A5 5 38 A11 A4 6 37 A12 A3 7 36 A13 A2 8 35 A14 A1 9 34 A15 A0 10 33 A16 CE 11 32 A20 VSS 12 31 VSS OE 13 30 D15 D0 14 29 D7 D8 15 28 D14 D1 16 27 D6 D9 17 26 D13 D2 18 25 D5 D10 19 24 D12 D3 20 23 D4 D11 21 22 VCC 42-Pin DIP PIN NAMES A0~A20 D0~D15 CE OE VCC VSS FUNCTIONS Address input Data output Chip enable Output enable Power supply voltage GND 2/7 MR53V3203J Semiconductor BLOCK DIAGRAM CE CE A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 OE OE CONTROL Memory Cell Matrix 2,097,152 x 16 Row Decoder Address Buffer Multiplex Column Decoder Output Buffer D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 FUNCTION TABLE MODE STAND BY OUTPUT DISABLE READ CE H L L OE X H L D0~D15 Hi-Z Hi-Z DOUT 3/7 MR53V3203J Semiconductor ABSOLUTE MAXIMUM RATINGS Parameter Operating temperature under bias Storage temperature Input voltage Output voltage Power supply voltage Power dissipation per package Symbol TOPR TSTG VI VO VCC PD Condition - Value 0 ~ 70 -55 ~ 125 -0.5 ~ VCC+0.5 -0.5 ~ VCC+0.5 -0.5 ~ 5 1.0 Relative to VSS - RECOMMENDED OPERATING CONDITIONS FOR READ Parameter VCC power supply voltage Input “H“ level Input “L“ level Voltage is relative to VSS Symbol VCC VIH VIL Condition VCC=2.7V ~ 3.6V PIN Capacitance Parameter Input Output Symbol CIN COUT Condition VI=0V VO=0V Min. 2.7 2.2 -0.5 Typ. - Unit `C `C V V V W (Ta=0 ~ 70`C) Min. Unit 3.6 `C VCC+0.5 `C 0.8 V (Vcc=3.3V, Ta=25`C, f=1MHz) Min. Typ. Min. Unit 12 pF 15 pF 4/7 MR53V3203J Semiconductor ELECTRICAL CHARACTERISTICS DC Characteristics 1 Parameter Input leakage current Output leakage current VCC power supply current (Standby) VCC power supply current (Active) Input “H“ level Input “L“ level Output “H“ level Output “L“ level Voltage is relative to VSS Symbol CIN COUT ICCSC ICCST ICCA VIH VIL VOH VOL Condition VI=0V~VCC VO=0V~VCC CE= VCC CE= VIH CE= VIL, OE= VIH tc= 120ns IOH=-200 mA IOL=1mA DC Characteristics 2 Parameter Input leakage current Output leakage current VCC power supply current (Standby) VCC power supply current (Active) Input “H“ level Input “L“ level Output “H“ level Output “L“ level Voltage is relative to VSS Symbol CIN COUT ICCSC ICCST ICCA VIH VIL VOH VOL Condition VI=0V~VCC VO=0V~VCC CE= VCC CE= VIH CE= VIL, OE= VIH tc= 100ns IOH=-200 mA IOL=1mA (Vcc=2.7V~3.3V, Ta=0~70`C) Min. Typ. Min. Unit 10 mA 10 mA 10 mA 1 mA - - 30 mA 2.0 -0.5 VCC-0.4 - - VCC+0.5 0.8 0.4 V V V V (Vcc=3.0V~3.6V, Ta=0~70`C) Min. Typ. Min. Unit 10 mA 10 mA 10 mA 1 mA - - 40 mA 2.0 -0.5 VCC-0.4 - - VCC+0.5 0.8 0.4 V V V V 5/7 MR53V3203J Semiconductor AC Characteristics 1 Parameter Address access cycle time Address access time CE access time OE access time Output disable time Output hold time Symbol TC TACC TCE TOE TCHZ TOHZ TOH Condition CE=OE= VIL OE= VIL CE= VIL OE= VIL CE= VIL CE=OE= VIL (Vcc=2.7V~3.3V, Ta=0~70`C) Min. Min. Unit 120 ns 120 ns 120 ns 40 ns 0 35 ns 0 30 ns 0 ns Symbol TC TACC TCE TOE TCHZ TOHZ TOH Condition CE=OE= VIL OE= VIL CE= VIL OE= VIL CE= VIL CE=OE= VIL (Vcc=3.0V~3.6V, Ta=0~70`C) Min. Min. Unit 100 ns 100 ns 100 ns 30 ns 0 30 ns 0 25 ns 0 ns AC Characteristics 2 Parameter Address access cycle time Address access time CE access time OE access time Output disable time Output hold time Measurement condition Input signal level Input timing reference level Output load Output timing reference level 0V/3V 0.8V/2.0V 100pF 0.8V/2.0V 1.7V 400W Output 100pF 6/7 MR53V3203J Semiconductor TIMING CHART 16BIT READ MODE tC A0~A20 tOH tCE CE tCHZ tOE OE tACC D0~D15 Hi-Z tOHZ Valid Data Hi-Z 7/7 Semiconductor NOTICE The information contained herein can change without notice owing to product and/or technical improvements. Before using the product, please make sure that the information being referred to is up-todate. The outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. When planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. When designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. Oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. Neither indemnity against nor license of a third party’s industrial and intellectual property right, etc. is granted by us in connection with the use of the product and/or the information and drawings contained herein. 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