Semiconductor MSM534002E 262,144-Word x 16-Bit or 524,288-Word x 8-Bit MASKROM DESCRIPTION The OKI MSM534002E is a high-speed CMOS Mask ROM that can electrically switch between 262,144-word x 16-bit and 524,288-word x 8-bit configurations. The MSM534002E operates on a single 5.0V power supply and is TTL compatible. The chip's asynchronous I/O requires no external clock assuring easy operation. A power-down mode provides low power dissipation when the chip is not selected. The CE and OE pins are provided as control signals that permit three-stated output allowing easy memory expansion on a system bus. The MSM534002E is suited for use as large capacity fixed memory for microcomputers and data terminals. FEATURES Single 5.0V power supply 262,144-words x 16-bit/524,288-words x 8-bit Access time 100ns MAX Input/Output TTL compatible Tri-State output configurations Internal powerdown function Packages 40-PIN PLASTIC DIP (DIP40-P-600-2.54) 40-PIN PLASTIC SOP (SOP40-P-525-1.27-K) 44-PIN PLASTIC TSOP (TSOPII44-P-400-0.80-K) 4MEPROM (40-PIN) pin compatible 1 MSM534002E PIN CONFIGURATION A17 1 NC 1 44 NC NC 2 43 NC A17 3 42 A8 A7 4 41 A9 A6 5 40 A10 A5 6 39 A11 40 A8 A7 2 39 A9 A6 3 38 A10 A5 4 37 A11 A4 5 36 A12 A3 6 35 A13 A4 7 38 A12 A2 7 34 A14 A3 8 37 A13 A1 8 33 A15 A2 9 36 A14 A0 9 32 A16 A1 10 35 A15 31 BYTE A0 11 34 A16 VSS 11 30 VSS CE 12 33 BYTE OE 12 29 D15/A-1 D0 13 28 D7 D8 14 27 D14 D1 15 26 D6 D9 16 25 D13 D2 17 24 D5 D10 18 23 D12 D3 19 22 D4 D11 20 21 VCC CE 10 VSS 13 32 VSS OE 14 31 D15/A-1 D0 15 30 D7 D8 16 29 D14 D1 17 28 D6 D9 18 27 D13 D2 19 26 D5 D10 20 25 D12 D3 21 24 D4 D11 22 23 VCC 44PINTSOP 40PINDIP/SOP Function Pin Name D15/A-1 A0 to A17 Data output / address input Address input D0 to D15 Data output CE Chip enable OE Output enable BYTE VCC, VSS Mode switch Power supply 2 MSM534002E BLOCK DIAGRAM VCC VSS A-1 BYTE Output Switching Between 8 and 16 bits CE CE A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 OE OE Control Memory Cell Matrix 262,144-Word x 16 or 524,288 x 8 X Decoder Address Buffer Multiplexer Y Decoder Output Buffer D0 D2 D1 D4 D3 D6 D5 D8 D7 D10 D12 D14 D9 D11 D13 D15 FUNCTION TABLE OE BYTE H X L H L L L CE 3 D0 to D7 D8 to D15 X A-1/D15 X Hi-Z Hi-Z X X Hi-Z Hi-Z L L H L Input Inhibited (D15) D0 to D7 D8 to D15 L D0 to D7 Hi-Z L L H D8 to D15 Hi-Z DOUT Mode LSB MSB Hi-Z — — 16 bit A0 A17 8 bit A-1 A17 MSM534002E ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings Symbol VCC Conditions Rated Value Unit V Input Voltage VI to VSS –0.3 to 7 –0.3 to VCC + 0.5 Output Voltage VO –0.3 to VCC + 0.5 V Power Dissipation Per Package Topr = 25°C 1.0 W Operating Temperature PD Topr — 0 to 70 °C Storage Temperature Tstg — Parameter Power Supply Voltage –55 to 150 V °C Recommended Operating Conditions Parameter Power Supply Voltage Symbol Conditions VCC Rated Value Typ. Max. — 4.5 5.0 5.5 V 0.0 0.0 0.0 VCC + 0.5 V 5.0 VSS — "H" Input Voltage VIH — "L" Input Voltage VIL Topr — 2.2 –0.3 — 0 Operating Temperature Unit Min. 0.0 — V 0.8 V 70 °C DC Characteristics (VCC = 5V±10%, Ta = 0 to 70°C) Parameter Symbol Conditions "H" Output Voltage VOH IOH = –400µA "L" Output Voltage VOL IOH = 2.1mA 2.4 — Input Leakage Current ILI VI = 0 to VCC Output Leakage Current ILO Power Supply Current (Operating) ICC Power Supply Current (Standby) ICCS1 ICCS Min. Rated Value Typ. Max. — — Unit V 0.4 –10 — — 10 V µA VO = 0 to VCC CE = VIH MIN –10 — 10 µA CE = VIL,OE = VIH,tC = 100ns — — 45 mA CE = VCC–0.2V — — 50 — — 500 µA µA CE = VIH MIN 4 MSM534002E AC CHARACTERISTICS Timing conditions Input Signal Level Parameter Conditions VIH=3.0V, VIL=0.0V Transtion Time tr=tf=5ns Timing Reference Level Input Voltage=1.5V Output Voltage=0.8V&2.0V Load Condition CL=100pF+1TTL Read Cycle (Ta = 0 to 70°C) Parameter Symbol Conditions Rated Value Min. Typ. — Max. — — Unit tC — Address Access time tACC — 100 — 100 ns CE Access time tCE — — — 100 ns OE Access time tOE — — — 50 ns CE Output Disable time tCHZ 0 ns OE Output Disable time 0 — — 40 tOHZ — — tOH — 0 — 30 — ns Output Hold time Cycle time 5 ns ns MSM534002E Read Cycle (Note 1) tC Address tACC tOH OE tOHZ tOE (Note 3) DOUT Read Cycle (Note 2) tC CE tCHZ tCE (Note 3) OE tOE DOUT Note) 1. CE is low level. 2. Address is fixed before or at the same time when CE level falls. 3. tCHZ & tOHZ indicate the time until floating. They are not determined by the output level. I/O CAPACITANCE Symbol Conditions Input Capacitance CI Output Capacitance CO Parameter Rated Value Unit Typ. — Max. VI=0V Min. — 8 pF VO=0V — — 10 pF 6 Semiconductor NOTICE The information contained herein can change without notice owing to product and/or technical improvements. Before using the product, please make sure that the information being referred to is up-todate. The outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. When planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. When designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. Oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. 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