Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Electronic Volume Controller IC PT2257 DESCRIPTION The PT2257 is an electronic volume controller IC utilizing CMOS technology specially designed for the new generation of AV entertainment products. It has two (2) built-in channels making it ideally suitable for mono and stereo sound applications. The PT2257 provides an I2C control interface, an attenuation range of 0 to -79dB, low noise, and high channel separation. It is housed in an 8 pins, DIP or SOP package. The PT2257’s pin assignments and application circuit are optimized for easy PCB layout and cost saving advantages. FEATURES • • • • • • • • CMOS technology Low power consumption Least external components Attenuation range: 0 to -79dB at 1dB/step Operating voltage: 3 to 9V Low Noise, S/N Ratio>100dB (A-weighting) Two channel output Available in 8 pins, DIP or SOP APPLICATIONS • • • • • AV surround audio equipment Car audio Mini compo Computer multi-media speaker Other audio equipment PT2257 V1.4 -1- May, 2008 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Electronic Volume Controller IC PT2257 BLOCK DIAGRAM V DD L IN 1 d B /S te p + - 1 0 d B /S t e p L O UT + - R ef + 1 0 d B /S t e p R IN R OU T 1 d B /S te p C ontrol unit S DA PT2257 V1.4 S CL -2- V ss May, 2008 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Electronic Volume Controller IC PT2257 PIN CONFIGURATION LIN LOUT VS S RIN PT 2257 SDA ROUT VDD SCL PIN DESCRIPTION Pin Name I/O LIN I LOUT O VSS SDA SCL VDD I I - ROUT O RIN I PT2257 V1.4 Description Left input channel Connect a capacitor to audio source Left output channel Connect a capacitor to audio output Ground I2C data input I2C clock input Power supply Right output channel Connect a capacitor to audio output Right input channel Connect a capacitor to audio source -3- Pin No. 1 2 3 4 5 6 7 8 May, 2008 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Electronic Volume Controller IC PT2257 FUNCTION DESCRIPTION BUS INTERFACE Data are transmitted to and from the microprocessor to the PT2257 via the SDA and SCL. The SDA and SCL make up the BUS Interface. It should be noted that the pull-up resistors must be connected to the positive supply voltage. DATA VALIDITY A data on the SDA Line is considered valid and stable only when the SCL Signal is in HIGH State. The HIGH and LOW States of the SDA Line can only change when the SCL signal is LOW. Please refer to the figure below. D ATA CLK D a t a Lin e S ta b le , D a t a Va lid D a ta C h a ng e A llo w e d START AND STOP CONDITIONS A Start Condition is activated when 1. The SCL is set to HIGH and 2. SDA shifts from HIGH to LOW State. The Stop Condition is activated when 1. SCL is set to HIGH and 2. SDA shifts from LOW to HIGH State. Please refer to the timing diagram below. CLK DATA Start PT2257 V1.4 Stop -4- May, 2008 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Electronic Volume Controller IC PT2257 BYTE FORMAT Every byte transmitted to the SDA Line consists of 8 bits. Each byte must be followed by an Acknowledge Bit. The MSB is transmitted first. ACKNOWLEDGE During the Acknowledge Clock Pulse, the master (µP) puts a resistive HIGH level on the SDA Line. The peripheral (audio processor) that acknowledges has to pull-down (LOW) the SDA line during the Acknowledge Clock Pulse so that the SDA Line is in a Stable Low State during this Clock Pulse. Please refer to the diagram below. SC L 1 SD A MSB 2 3 4 7 8 9 A cknowledgment from R eceiver Start The audio processor that has been addressed has to generate an Acknowledge after receiving each byte; otherwise, the SDA Line will remain at the High Level during the ninth (9th) Clock Pulse. In this case, the master transmitter can generate the STOP Information in order to abort the transfer. TRANSMISSION WITHOUT ACKNOWLEDGE If you want to avoid the acknowledge detection of the audio processor, a simpler µP transmission may be used. Wait one clock and does not check the slave acknowledge of this same clock then send the new data. If you use this approach, there are greater chances of faulty operation as well as decrease in noise immunity. PT2257 V1.4 -5- May, 2008 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Electronic Volume Controller IC PT2257 INTERFACE PROTOCOL The interface protocol consists of the following: • • • • • A Start bit A Chip Address Byte=88H ACK=Acknowledge bit A Data byte A Stop bit Please refer to the diagram below: PT2257 Address MSB START First Byte LSB MSB 1 0 0 0 1 0 0 0 ACK LSB DATA MSB ACK LSB DATA ACK STOP DATA TRANSMITTED (N-BYTES+ACKNOWLEDGE) Notes: 1. ACK=ACKNOWLEDGE 2. MAX. CLOCK SPEED=100K BITS/S PT2257 V1.4 -6- May, 2008 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Electronic Volume Controller IC PT2257 SOFTWARE SPECIFICATION PT2257 ADDRESS PT2257 Address is shown below: 1 MSB 0 0 0 1 0 0 0 LSB I2C BUS INTERFACE START TIME After Power is turned ON, PT2257 needs to wait for a short time in order to insure stability. The waiting time period for PT2257 to send I2C Bus Signal is at least 200ms. If the waiting time period is less than 200ms, I2C Control may fail. Please refer to the diagram below. V POWER ON 90% VDD VDD At least 200ms SDA/SCL PT2257 V1.4 -7- May, 2008 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Electronic Volume Controller IC PT2257 DATA BYTES DESCRIPTION FUNCTION BITS MSB 1 1 1 1 1 0 0 2 1 1 1 0 0 0 0 3 1 0 1 1 1 1 1 4 1 1 0 0 1 0 1 5 1 A3 0 A3 0 A3 0 6 1 A2 B2 A2 B2 A2 B2 7 1 A1 B1 A1 B1 A1 B1 LSB 1 A0 B0 A0 B0 A0 B0 0 1 1 1 1 0 0 M Function Function OFF (-79dB) 2-Channel, -1dB/step 2-Channel, -10dB/step Left Channel, -1dB/step Left Channel, -10dB/step Right Channel, -1dB/step Right Channel, -10dB/step 2-Channel, MUTE When M=1, MUTE=ON When M=0, MUTE=OFF ATTENUATION UNIT BIT A3 0 0 0 0 0 0 0 0 1 1 A2/B2 0 0 0 0 1 1 1 1 0 0 A1/B1 0 0 1 1 0 0 1 1 0 0 A0/B0 0 1 0 1 0 1 0 1 0 1 Attenuation Value (dB) 0/0 -1/-10 -2/-20 -3/-30 -4/-40 -5/-50 -6/-60 -7/-70 -8/ -9/ Where: Ax=-dB/step, Bx=-10dB/step For example, for a Left Channel Attenuation at -33dB, the data byte is as follows: START 1 0 1 1 0 0 1 1 ACK 1 0 1 0 0 0 1 Left Channel -30dB PT2257 V1.4 1 ACK STOP Left Channel -3dB -8- May, 2008 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Electronic Volume Controller IC PT2257 ABSOLUTE MAXIMUM RATING Parameter Supply voltage Operating temperature Storage temperature Input voltage Symbol VDD Topr Tstg VI Rating 12 -40 to +85 -65 to +150 -0.3 to VCC+0.3 Unit V ℃ ℃ V AUDIO SECTION ELECTRICAL CHARACTERISTICS Parameter Operating voltage Operating current Symbol VDD IDD Attenuation step Joint step gain error Inter-channel attenuation gain error ASTEP GERR Min. 3 -0.5 -72 - CERR - 0.5 - dB Maximum output level Vomax 2.0 2.3 2.5 Vrms - 0.07 0.09 - 0.003 0.005 Volume attenuation range ARANGE Total harmonic distortion Noise output THD No Signal-to-Noise ratio SNR Channel separation CS Mute attenuation MUTE Frequency response FR Input impedance Rin Output impedance Minimum load resistance PT2257 V1.4 Rout Rload Condition VDD=9V, VI=0V Minimum Attenuation Maximum Attenuation VDD=9V, F=1KHz Volume Att=0dB Rload=50K, THD<1% F =1KHz, Vout=2Vrms Volume Att=0dB, A-weighted Vout=200m Rload=50K Vrms Vin=GND, MUTE=OFF Volume Att=0dB, A-weighted 22~22KHz 0dB=Vomax, ATT=0dB A-weighted Vin=2.5Vrms, F=1KHz,Volume=0dB Vin=2.5Vrms, F=1KHz Volume Att=0dB, A-weighted Vin=1Vrms, Volume Att=-10dB F=1KHz F=1KHz, Vout=100m Vrms VDD=9V, Vo=2Vrms,THD<1% -9- Typ. Max. 9 10 9 15 0 -79 1 0.5 - Unit V mA dB dB dB % - 2 3 µVrms 90 110 100 120 103 123 dB 100 120 125 dB 90 95 97 dB - 1 1.3 MHz 15 20 26 KΩ 2 100 - - Ω KΩ May, 2008 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Electronic Volume Controller IC PT2257 I2C BUS SECTION ELECTRICAL CHARACTERISTICS Parameter Bus high input level Bus low input level Symbol VIH VIL Condition VDD=9V VDD=9V Min. 0.4 0 Typ. - Max. VDD 0.2 Unit VDD VDD Min. -0.5 1.6 0 Max. 1.1 4.0 100 Unit V V KHz 5.0 - µs 4.0 5.0 4.0 5.0 0 250 4.0 1000 300 - µs µs µs µs µs ns ns ns µs BUS LINE TIMING CHARACTERISTICS Parameter Symbol Condition Low level input voltage VIL VDD=4.0V High level input voltage VIH VDD=4.0V SCL clock frequency fSCL Time the bus must be free before a tBUF new transmission can start Hold time start condition* tHD-STA Clock low period tLOW Clock high period tHIGH Setup time for start condition ** tSU-STA Data hold time tHD-DAT Data setup time tSU-DAT Rise time (SDA & SCL Lines) tR Fall time (SDA & SCL Lines) tF Stop condition setup time tSU-STO Notes: 1. * = The first clock pulse is generated after this period. 2. ** = This is only relevant for a repeated start condition. PT2257 V1.4 - 10 - May, 2008 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Electronic Volume Controller IC d B V PT2257 +0 20 -20 5 -40 1 VCC=3V No Weighted -60 VCC=5V % A-Weighted -80 0.1 VCC=9V 0.01 -100 -120 20 50 100 200 500 1k 2k 5k 20k 0.001 1m Hz 10m 100m 1 2 4 Vrms Residual Noise Floor THD vs. Output Level, RL=50KΩ 20 10 1 0.5 Vo=2.5Vrms 0.2 1 0.1 0.05 % Vo=1Vrms % 0.02 0.01 0.005 Vo=0.2Vrms 0.1 0.01 0.002 0.001 20 50 100 200 500 1k 2k 5k 0.001 1m 2m 20k 10m Hz THD vs. Frequency 500m 1 2 4 THD vs. Output Level, RL=5KΩ 20 10 5 +0 2 1 -20 -40 -60 d B 100m Vrms % -80 -100 0.1 0.02 0.01 -120 -140 20 50 100 200 500 1k 2k 5k 0.001 1m 2m 20k Hz 100m 500m 1 2 4 Vrms Crosstalk PT2257 V1.4 10m THD vs. Output Level, RL=2KΩ - 11 - May, 2008 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Electronic Volume Controller IC PT2257 APPLICATION CIRCUIT LIN C1 10uF C3 10uF RIN C4 10uF ROUT RIN 8 1 LIN LOUT C2 10uF 2 LOUT ROUT 7 3 VSS VDD 6 4 SDA SCL 5 PT2257 VDD C5 100uF C6 0.1uF MCU PT2257 V1.4 - 12 - May, 2008 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Electronic Volume Controller IC PT2257 ORDER INFORMATION Valid Part Number PT2257-D PT2257-S PT2257 V1.4 Package Type 8 Pins, DIP, 300mil 8 Pins, SOP, 150mil - 13 - Top Code PT2257-D PT2257-S May, 2008 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Electronic Volume Controller IC PT2257 PACKAGE INFORMATION 8 PINS, DIP, 300MIL Symbol A A1 A2 A3 b b1 b2 b3 c c1 D D1 E E1 e eA eB eC L PT2257 V1.4 Min. 0.50 3.10 1.40 0.38 0.38 1.47 0.89 0.21 0.20 9.10 0.13 7.62 6.25 7.62 0.000 2.92 - 14 - Nom. 3.30 1.50 0.46 1.52 0.99 0.25 9.20 7.87 6.35 2.54 BSC 7.62 BSC. 8.80 3.30 Max. 4.80 3.50 1.60 0.55 0.51 1.57 1.09 0.35 0.30 9.30 8.25 6.45 10.90 1.52 3.81 May, 2008 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Electronic Volume Controller IC PT2257 8 PINS, SOP, 150 MIL Symbol A A1 A2 A3 b b1 c c1 D E E1 e L L1 L2 R R1 h θ θ1 θ2 θ3 θ4 PT2257 V1.4 Min. 1.35 0.05 1.25 0.50 0.38 0.37 0.17 0.17 4.80 5.80 3.80 Typ. 1.55 0.15 1.40 0.60 0.42 0.20 4.90 6.00 3.90 1.27 BSC. 0.60 1.04 REF. 0.25 BSC. - 0.45 0.07 0.07 0.30 0° 15° 11° 15° 11° 0.40 17° 13° 17° 13° - 15 - Max. 1.75 0.25 1.65 0.70 0.51 0.47 0.25 0.23 5.00 6.20 4.00 0.80 0.50 8° 19° 15° 19° 15° May, 2008 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Electronic Volume Controller IC PT2257 Notes: 1. Dimensioning and tolerancing per ANSI Y 14.5M-1994 2. Controlling Dimension: MILLIMETERS. 3. Dimension D does not include mold flash protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.15 mm (0.006 in) per end. Dimension E1 does not include interlead flash or protrusion. Interlead flash or protrusion shall not exceed 0.25mm per side. D and E1 dimensions are determined at datum H. 4. The package top may be smaller than the package bottom. Dimensions D and E1 are determined at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs and interlead flash, but including any mismatch between the top and bottom of the plastic body. 5. Datums A & B to be determined at datum H. 6. N is the number of terminal positions. (N=8) 7. The dimensions apply to the flat section of the lead between 0.10 to 0.25mm from the lead tip. 8. Dimension “b” does not include dambar protrusion. Allowable dambar protrusion shall be 0.10mm total in excess of the “b” dimension at maximum material condition. The dambar cannot be located on the lower radius of the foot. 9. This chamfer feature is optional. If it is not present, then a pin 1 identifier must be located within the index area indicated. 10. Refer to JEDEC MS-012, Variation AA. JEDEC is the registered trademark of JEDEC SOLID STATE TECHNOLOGY ASSOCIATION. PT2257 V1.4 - 16 - May, 2008