ZETEX ZXMN2AM832

ZXMN2AM832
MPPS™ Miniature Package Power Solutions
DUAL 20V N-CHANNEL ENHANCEMENT MODE MOSFET
SUMMARY
V(BR)DSS = 20V; RDS(ON) = 0.12 ; ID= 3A
DESCRIPTION
Packaged in the new innovative 3mm x 2mm MLP(Micro Leaded Package)
outline this dual 20V N channel Trench MOSFET utilizes a unique structure
combining the benefits of Low on-resistance with fast switching speed. This
makes them ideal for high efficiency, low voltage power management
applications. Users will also gain several other key benefits:
Performance capability equivalent to much larger packages
3x2mm Dual Die MLP
Improved circuit efficiency & power levels
PCB area and device placement savings
Reduced component count
FEATURES
• Low On - Resistance
• Fast switching speed
• Low threshold
• Low gate drive
• 3mm x 2mm MLP
APPLICATIONS
• DC-DC Converters
• Power Management Functions
PINOUT
• Disconnection switches
7
• Motor Control
ORDERING INFORMATION
DEVICE
REEL
TAPE
WIDTH
QUANTITY
PER REEL
ZXMN2AM832TA
7’‘
8mm
3000 units
ZXMN2AM832TC
13’‘
8mm
10000 units
3mm x 2mm Dual MLP
underside view
DEVICE MARKING
DNA
ISSUE 3 - JANUARY 2005
1
SEMICONDUCTORS
ZXMN2AM832
ABSOLUTE MAXIMUM RATINGS.
PARAMETER
SYMBOL
Drain-Source Voltage
V DSS
20
V
Gate-Source Voltage
V GS
⫾12
V
Continuous Drain Current @V GS =10V; T A =25⬚C (b) (f)
@V GS =10V; T A =70⬚C (b) (f)
ID
3.7
A
3.0
A
@V GS =10V; T A =25⬚C
(a) (f)
N-Channel
UNIT
2.9
A
Pulsed Drain Current
I DM
13
A
Continuous Source Current (Body Diode) (b) (f)
IS
3.0
A
Pulsed Source Current (Body Diode)
I SM
13
A
Power Dissipation at TA=25°C (a) (f)
Linear Derating Factor
PD
1.5
W
12
mW/°C
Power Dissipation at TA=25°C (b) (f)
Linear Derating Factor
PD
2.45
W
19.6
mW/°C
Power Dissipation at TA=25°C (c) (f)
Linear Derating Factor
PD
Power Dissipation at TA=25°C ( d) (f)
Linear Derating Factor
1
W
8
mW/°C
PD
1.13
W
9
mW/°C
Power Dissipation at TA=25°C (d) (g)
Linear Derating Factor
PD
1.7
W
13.6
mW/°C
Power Dissipation at TA=25°C (e) (g)
Linear Derating Factor
PD
Operating and Storage Temperature Range
T j :T stg
3
W
24
mW/°C
-55 to +150
°C
THERMAL RESISTANCE
PARAMETER
SYMBOL
VALUE
UNIT
Junction to Ambient (a)(f)
R ⍜JA
83.3
°C/W
Junction to Ambient (b)(f)
R ⍜JA
51
°C/W
Junction to Ambient (c)(f)
R ⍜JA
125
°C/W
Junction to Ambient (d)(f)
R ⍜JA
111
°C/W
Junction to Ambient (d)(g)
R ⍜JA
73.5
°C/W
Junction to Ambient (e)(g)
R ⍜JA
41.7
°C/W
Notes
(a) For a dual device surface mounted on 8 sq cm single sided 2oz copper on FR4 PCB, in still air conditions with all exposed pads attached. The
copper area is split down the centre line into two separate areas with one half connected to each half of the dual device.
(b) Measured at t<5 secs for a dual device surface mounted on 8 sq cm single sided 2oz copper on FR4 PCB, in still air conditions with all exposed
pads attached. The copper area is split down the centre line into two separate areas with one half connected to each half of the dual device.
(c) For a dual device surface mounted on 8 sq cm single sided 2oz copper on FR4 PCB, in still air conditions with minimal lead connections only.
(d) For a dual device surface mounted on 10 sq cm single sided 1oz copper on FR4 PCB, in still air conditions with all exposed pads attached
attached. The copper area is split down the centre line into two separate areas with one half connected to each half of the dual device.
(e) For a dual device surface mounted on 85 sq cm single sided 2oz copper on FR4 PCB, in still air conditions with all exposed pads attached
attached. The copper area is split down the centre line into two separate areas with one half connected to each half of the dual device.
(f) For a dual device with one active die.
(g) For dual device with 2 active die running at equal power.
(h) Repetitive rating - pulse width limited by max junction temperature. Refer to Transient Thermal Impedance graph.
(i) The minimum copper dimensions required for mounting are no smaller than the exposed metal pads on the base of the device as shown in the
package dimensions data. The thermal resistance for a dual device mounted on 1.5mm thick FR4 board using minimum copper 1 oz weight, 1mm
wide tracks and one half of the device active is Rth = 250°C/W giving a power rating of Ptot = 500mW.
ISSUE 3 - JANUARY 2005
SEMICONDUCTORS
2
ZXMN2AM832
TYPICAL CHARACTERISTICS
ISSUE 3 - JANUARY 2005
3
SEMICONDUCTORS
ZXMN2AM832
ELECTRICAL CHARACTERISTICS (at Tamb = 25°C unless otherwise stated).
PARAMETER
SYMBOL
MIN.
Drain-Source Breakdown Voltage
V (BR)DSS
20
Zero Gate Voltage Drain Current
I DSS
Gate-Body Leakage
I GSS
Gate-Source Threshold Voltage
V GS(th)
Static Drain-Source On-State
R DS(on)
TYP.
MAX. UNIT CONDITIONS.
STATIC
I D =250␮A, V GS =0V
1
␮A
V DS =20V, V GS =0V
100
nA
V GS =±12V, V DS =0V
V
I =250␮A, V DS =V GS
0.12
⍀
V GS =4.5V, I D =4A
0.30
⍀
V GS =2.5V, I D =1.5A
V DS =10V,I D =4A
0.7
0.09
Resistance (1)
(3)
V
g fs
6.2
S
Input Capacitance
C iss
299
pF
Output Capacitance
C oss
60
pF
Reverse Transfer Capacitance
C rss
33
pF
Forward Transconductance
DYNAMIC
D
(3)
SWITCHING
V DS =15 V, V GS =0V,
f=1MHz
(2) (3)
Turn-On Delay Time
t d(on)
2.31
ns
Rise Time
tr
2.60
ns
Turn-Off Delay Time
t d(off)
1.55
ns
Fall Time
tf
1.31
ns
Total Gate Charge
Qg
3.1
nC
Gate-Source Charge
Q gs
0.7
nC
Gate-Drain Charge
Q gd
1.0
nC
Diode Forward Voltage (1)
V SD
0.9
Reverse Recovery Time (3)
t rr
Reverse Recovery Charge (3)
Q rr
V DD =10V, I D =4A
R G ≅6.0⍀, V GS =5V
V DS =10V,V GS =4.5V,
I D =4A
SOURCE-DRAIN DIODE
0.95
V
T J =25°C, I S =3.2A,
V GS =0V
23
ns
5.65
nC
T J =25°C, I F =4A,
di/dt= 100A/␮s
NOTES
(1) Measured under pulsed conditions. Width ⱕ300␮s. Duty cycle ⱕ 2%.
(2) Switching characteristics are independent of operating junction temperature.
(3) For design aid only, not subject to production testing.
ISSUE 3 - JANUARY 2005
SEMICONDUCTORS
4
ZXMN2AM832
TYPICAL CHARACTERISTICS
ISSUE 3 - JANUARY 2005
5
SEMICONDUCTORS
ZXMN2AM832
VGS = 0V
f = 1MHz
400
VGS Gate-Source Voltage (V)
C Capacitance (pF)
TYPICAL CHARACTERISTICS
CISS
COSS
200
CRSS
0
0.1
1
10
VDS - Drain - Source Voltage (V)
Capacitance v Drain-Source Voltage
4.5
4.0 ID = 4A
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0
VDS = 10V
1
2
3
4
Q - Charge (nC)
Gate-Source Voltage v Gate Charge
ISSUE 3 - JANUARY 2005
SEMICONDUCTORS
6
ZXMN2AM832
MLP832 PACKAGE OUTLINE (3mm x 2mm Micro Leaded Package)
CONTROLLING DIMENSIONS IN MILLIMETRES
APPROX. CONVERTED DIMENSIONS IN INCHES
MLP832 PACKAGE DIMENSIONS
MILLIMETRES
DIM
MIN.
INCHES
MAX.
MIN.
MILLIMETRES
DIM
MAX.
MIN.
MAX.
INCHES
MIN.
MAX.
A
0.80
1.00
0.031
0.039
e
0.65 REF
0.0256 BSC
A1
0.00
0.05
0.00
0.002
E
2.00 BSC
0.0787 BSC
A2
0.65
0.75
0.0255
0.0295
E2
0.43
0.63
0.017
0.0249
A3
0.15
0.25
0.006
0.0098
E4
0.16
0.36
0.006
0.014
b
0.24
0.34
0.009
0.013
L
0.20
0.45
0.0078
0.0157
b1
0.17
0.30
0.0066
0.0118
L2
0.125
0.00
0.005
D
D2
3.00 BSC
0.82
0.118 BSC
1.02
0.032
r
⍜
0.040
0.075 BSC
0⬚
12⬚
0.0029 BSC
0⬚
12⬚
© Zetex Semiconductors plc 2005
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ISSUE 3 - JANUARY 2005
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SEMICONDUCTORS