AMSCO AS5215-HQFT

Data Sheet
AS5215
Programmable 360º Magnetic Angle Encoder with Buffered SINE &
COSINE Output Signals
1 General Description
The AS5215 is a redundant, contactless rotary encoder sensor for
accurate angular measurement over a full turn of 360º and over an
extended ambient temperature range of -40ºC to +150ºC.
Based on an integrated Hall element array, the angular position of a
simple two-pole magnet is translated into analog output voltages.
The angle information is provided by means of buffered sine and
cosine voltages. This approach gives maximum flexibility in system
design, as it can be directly integrated into existing architectures and
optimized for various applications in terms of speed and accuracy.
2 Key Features
Contactless angular position encoding
High precision analog output
Buffered Sine and Cosine signals
SSI Interface
Low power mode
Two programmable output modes: Differential or Single ended
Wide magnetic field input range: 20 – 80 mT
With two independent dies in one package, the device offers true
redundancy. Usually the bottom die, which is exposed to slightly less
magnetic field is employed for plausibility check.
Wide temperature range: -40ºC to +150ºC
An SSI Interface is implemented for signal path configuration as well
as a one time programmable register block (OTP), which allows the
customer to adjust the signal path gain to adjust for different
mechanical constraints and magnetic field.
Thin punched 32-pin QFN (7x7mm) package
Fully automotive qualified to AEC-Q100, grade 0
3 Applications
The AS5215 is ideal for Electronic Power Steering systems and
general purpose for automotive or industrial applications in
microcontroller-based systems.
Figure 1. AS5215 Block Diagram
PROG
AS5215
OTP Register
Digital Part
CS
DCLK
DIO
SSI Interface
POWER
MANAGEMENT
BUFFER Stage
VDD
VSS
SINP/SINN
SINN/SINP/CM_SIN
BUFFER Stage
Hall Array
&
Frontend
Amplifier
COSP/COSN
COSN/COSP/CM_COS
Note: This Block Diagram presents only one die.
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AS5215
Data Sheet - C o n t e n t s
Contents
1 General Description ..................................................................................................................................................................
1
2 Key Features.............................................................................................................................................................................
1
3 Applications...............................................................................................................................................................................
1
4 Pin Assignments .......................................................................................................................................................................
3
4.1 Pin Descriptions....................................................................................................................................................................................
3
5 Absolute Maximum Ratings ......................................................................................................................................................
5
6 Electrical Characteristics...........................................................................................................................................................
6
6.1 Timing Characteristics ..........................................................................................................................................................................
7
7 Detailed Description..................................................................................................................................................................
8
7.1 Magnet Diameter and Vertical Distance ...............................................................................................................................................
8
7.1.1
7.1.2
7.1.3
7.1.4
7.1.5
7.1.6
The Linear Range ........................................................................................................................................................................ 8
Magnet Thickness...................................................................................................................................................................... 11
Axial Distance (Airgap) .............................................................................................................................................................. 12
Angle Error vs. Radial and Axial Misalignment.......................................................................................................................... 12
Mounting the Magnet ................................................................................................................................................................. 12
Summary ................................................................................................................................................................................... 14
8 Application Information ...........................................................................................................................................................
15
8.1 Sleep Mode ........................................................................................................................................................................................
15
8.2 SSI Interface.......................................................................................................................................................................................
15
8.3 Device Communication / Programming ..............................................................................................................................................
16
8.4 Waveform – Digital Interface at Normal Operation Mode...................................................................................................................
18
8.5 Waveform – Digital Interface at Extended Mode ................................................................................................................................
18
8.6 Waveform – Digital Interface at Analog Readback of the Zener Diodes ............................................................................................
19
8.7 EasyZapp OTP Content .....................................................................................................................................................................
19
8.8 Analog Sin/Cos Outputs with External Interpolator ............................................................................................................................
20
8.9 OTP Programming..............................................................................................................................................................................
21
9 Package Drawings and Markings ...........................................................................................................................................
22
10 Ordering Information.............................................................................................................................................................
24
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AS5215
Data Sheet - P i n A s s i g n m e n t s
4 Pin Assignments
NC
NC
VDD_1
VDD_2
DCLK_1
DCLK_2
CS_1
CS_2
Figure 2. Pin Assignments (Top View)
32 31 30 29 28 27 26 25
DIO_1
1
24
NC
DIO_2
2
23
NC
TC_1
3
22
NC
TC_2
4
21
NC
A_TST_1
5
20
NC
A_TST_2
6
19
NC
PROG_1
7
18
COSN_2 / COSP_2 / CM_COS_2
PROG_2
8
17
COSP_2 / COSN_2
COSN_1 / COSP_1 / CM_COS_1
COSP_1 / COSN_1
SINN_2 / SINP_2 / CM_SIN_2
SINP_2 / SINN_2
VSS_2
SINN_1 / SINP_1 / CM_SIN_1
10 11 12 13 14 15 16
SINP_1 / SINN_1
9
VSS_1
AS5215
4.1 Pin Descriptions
Table 1. Pin Descriptions
Pin Name
Pin Number
DIO_1
1
DIO_2
2
TC_1
3
TC_2
4
A_TST_1
5
A_TST_2
6
PROG_1
7
PROG_2
8
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Description
Data I/O for digital interface
Test coil
Analog test pin
OTP Programming Pad
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Data Sheet - P i n A s s i g n m e n t s
Table 1. Pin Descriptions
Pin Name
Pin Number
VSS_1
9
VSS_2
10
SINP_1 / SINN_1
11
Switchable buffered analog output
SINN_1 / SINP_1 / CM_SIN_1
12
Switchable buffered analog or common mode output
SINP_2 / SINN_2
13
Switchable buffered analog output
SINN_2 / SINP_2 / CM_SIN_2
14
Switchable buffered analog or common mode output
COSP_1 / COSN_1
15
Switchable buffered analog output
COSN_1 / COSP_1 / CM_COS_1
16
Switchable buffered analog or common mode output
COSP_2 / COSN_2
17
Switchable buffered analog output
COSN_2 / COSP_2 / CM_COS_2
18
Switchable buffered analog or common mode output
NC
19
NC
20
NC
21
NC
22
NC
23
NC
24
NC
25
NC
26
VDD_1
27
VDD_2
28
DCLK_1
29
DCLK_2
30
CS_1
31
CS_2
32
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Description
Supply ground
------
Digital + analog supply
Clock input for digital interface
Clock input for digital interface
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Data Sheet - A b s o l u t e M a x i m u m R a t i n g s
5 Absolute Maximum Ratings
Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only, and functional operation of
the device at these or any other conditions beyond those indicated in Electrical Characteristics on page 6 is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Table 2. Absolute Maximum Ratings
Parameter
Min
Max
Units
Supply voltage (VDD)
-0.3
7
V
Input pin voltage (V_in)
VSS - 0.5
7
V
Input current (latchup immunity), I_scr
-100
Comments
100
mA
Norm: EIA/JESD78 Class II Level A
Electrostatic discharge (ESD)
±2
kV
Norm: JESD22-A114E
Total power dissipation (Ptot)
275
mW
Package thermal resistance (Θ_JA)
27
ºC/W
150
ºC
Storage temperature (T_strg)
-65
Package body temperature (T_body)
Humidity non-condensing
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5
Velocity =0; Multi Layer PCB; Jedec Standard Testboard
260
ºC
Norm: IPC/JEDEC J-STD-020C.
The reflow peak soldering temperature (body temperature)
specified is in accordance with IPC/JEDEC J-STD-020C
“Moisture/Reflow Sensitivity Classification for NonHermetic Solid State Surface Mount Devices”.
The lead finish for Pb-free leaded packages is matte tin
(100% Sn).
85
%
MSL = 3
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Data Sheet - E l e c t r i c a l C h a r a c t e r i s t i c s
6 Electrical Characteristics
Unless otherwise noted all in this specification defined tolerances of parameters are assured over the whole operation conditions range and also
over lifetime.
Table 3. Operating Conditions
Symbol
Parameter
VDD
Positive Supply Voltage
VSS
T_amb
Condition
Min
Typ
Max
Unit
4.5
5.5
V
Negative Supply Voltage
0.0
0.0
V
Ambient temperature
-40
150
ºC
Max
Unit
Table 4. DC/AC Characteristics for Digital Inputs and Outputs
Symbol
Parameter
Condition
Min
Typ
CMOS Input
V_IH
High level Input voltage
0.7 *
VDD
VDD +
0.5
V
V_IL
Low level Input Voltage
VDD 0.5
VDD +
0.5
V
I_LEAK
Input Leakage Current
1
µA
CMOS Output
V_OH
High level Output voltage
4 mA
V_OL
Low level Output Voltage
4 mA
C_L
VDD 0.5
V
VSS +
0.4
V
Capacitive Load
35
pF
t_slew
Slew Rate
30
ns
t_delay
Time Rise Fall
15
ns
Tristate Leakage Current
1
µA
Max
Unit
CMOS Output Tristate
I_OZ
Table 5. Magnetic Input Specification
Symbol
Parameter
Condition
Min
Typ
4
6
50
Two pole cylindrical magnet, diametrically magnetized:
dMAG
Diameter
Bpp
Magnetic input field amplitude
200 – 800 Gauss
20
frot
Rotational speed
Max 30000 RPM
0
Condition
Min
mm
80
mt
500
Hz
Typ
Max
Unit
200
500
700
µs
22
30
µs
Table 6. Electrical System Specifications
Symbol
Parameter
tpower_on
Power up time
tprop
Propagation delay
-40 to 150ºC
18
M
Magnetic Sensitivity
1G = 0.1 mT
1
6
mV/G
Vout
Analog output range
Vss+
0.25
Vdd0.5
V
SF=SF25C
- (AP1_1/
AP2_1)
Amplitude ratio tracking accuracy
over temperature
-1
+1
%
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-40 to 150ºC
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Data Sheet - E l e c t r i c a l C h a r a c t e r i s t i c s
Table 6. Electrical System Specifications
Symbol
Parameter
SF=AP1_
1/AP2_1
Amplitude ratio mismatch at room
temperature
Voffset1
Condition
Typ
-2
DC Offset
Ratiometric to VDD
DCoffdrift
DC Offset Drift
-40 to 150ºC
THD
Total Harmonic Distortion
SR
Slew Rate
CLOAD
Capacitive Load
Voffset2
Min
Max
Unit
2
%
0.294
0.3
0.306
V / VDD
0.49
0.5
0.51
V / VDD
+50
µV/ºC
0.2
%
-50
1
V/µs
1000
pF
Max
Unit
6.1 Timing Characteristics
Table 7. Timing Characteristics
Symbol
Parameter
Condition
Min
Typ
t1_3
Chip select to positive edge of DCLK
30
-
ns
t2_3
Chip select to drive bus externally
0
-
ns
t3
Setup time command bit
Data valid to positive edge of DCLK
30
-
ns
t4
Hold time command bit
Data valid after positive edge of DCLK
15
-
ns
t5
Float time
Positive edge of DCLK for last command bit to bus float
-
DCLK/
2+0
ns
t6
Bus driving time
Positive edge of DCLK for last command bit to bus
drive
DCLK/
2+0
-
ns
t7
Data valid time
Positive edge of DCLK to bus valid
DCLK/
2+0
DCLK/
2+30
ns
t8
Hold time data bit
Data valid after positive edge of DCLK
DCLK/
2+0
-
ns
t9_3
Hold time chip select
Positive edge DCLK to negative edge of chip select
DCLK/
2+0
-
ns
t10_3
Bus floating time
Negative edge of chip select to float bus
-
30
ns
t11
Setup time data bit at write access
Data valid to positive edge of DCLK
30
-
ns
t12
Hold time data bit at write access
Data valid after positive edge of DCLK
15
-
ns
-
30
ns
t13_3
Bus floating time
Negative edge of chip select to float bus
Remark: The digital interface will be reset during the low phase of the CS signal.
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AS5215
Data Sheet - D e t a i l e d D e s c r i p t i o n
7 Detailed Description
The AS5215 is a redundant rotary encoder sensor front end. Based on an integrated Hall element array, the angular position of a simple two-pole
magnet is translated into analog output voltages. The angle information is provided by means of sine and cosine voltages. This approach gives
maximum flexibility in system design, as it can be directly integrated into existing architectures and optimized for various applications in terms of
speed and accuracy.
With two independent dies in one package, the device offers true redundancy. Usually the bottom die, which is exposed to slightly less magnetic
field is employed for plausibility check.
An SSI (SPI standard) protocol is implemented for internal test access to the different circuit blocks and for signal path configuration.
A One Time Programmable register block (OTP) allows the customer to adjust the signal path gain to adjust for different mechanical constraints
and magnetic field strengths. Furthermore, for internal use, the test mode can be enabled and the system oscillator is trimmable, DC offset of the
output signal can be set to either 1.5V or 2.5V. A unique chip ID is stored to ensure traceability.
For operating point control, a band gap circuit is implemented together with a central bias block to distribute all reference bias currents for the
analog signal conditioning. The digital signal part is based on a 2MHz system, CLK derived via. divider from a 4MHz system oscillator.
Figure 3. Typical Arrangement of AS5215 and Magnet
7.1 Magnet Diameter and Vertical Distance
Note: Following is just an abstract taken from the elaborate application note on the Magnet.
For more detailed information, please visit our homepage www.austriamicrosystems.com → Magnetic Rotary Encoders → Magnet
Application Notes
7.1.1
The Linear Range
The Hall elements used in the AS5000-series sensor ICs are sensitive to the magnetic field component Bz, which is the magnetic field vertical to
the chip surface. Figure 4 shows a 3-dimensional graph of the Bz field across the surface of a 6mm diameter, cylindrical NdFeB N35H magnet at
an axial distance of 1mm between magnet and IC.
The highest magnetic field occurs at the north and south poles, which are located close to the edge of the magnet, at ~2.8mm radius (see Figure
5). Following the poles towards the center of the magnet, the Bz field decreases very linearly within a radius of ~1.6mm. This linear range is the
operating range of the magnet with respect to the Hall sensor array on the chip. For best performance, the Hall elements should always be within
this linear range.
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AS5215
Data Sheet - D e t a i l e d D e s c r i p t i o n
Figure 4. 3D-Graph of Vertical Magnetic Field of a 6mm Cylindrical Magnet
BZ; 6mm magnet @ Z=1mm
area of X- Y-misalignment from center: ±0.5mm
circle of Hall elements on chip
Bz [mT]
Y -displacement [mm]
X -displacement [mm]
As shown in Figure 5 (grey zone), the Hall elements are located on the chip at a circle with a radius of 1mm. Since the difference between two
opposite Hall sensors is measured, there will be no difference in signal amplitude when the magnet is perfectly centered or if the magnet is
misaligned in any direction as long as all Hall elements stay within the linear range.
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Data Sheet - D e t a i l e d D e s c r i p t i o n
For the 6mm magnet (shown in Figure 5), the linear range has a radius of 1.6mm, hence this magnet allows a radial misalignment of 0.5mm
(1.6mm linear range radius; 1mm Hall array radius). Consequently, the larger the linear range, the more radial misalignment can be tolerated. By
contrast, the slope of the linear range decreases with increasing magnet diameter, as the poles are further apart. A smaller slope results in a
smaller differential signal, which means that the magnet must be moved closer to the IC (smaller airgap) or the amplification gain must be
increased, which leads to a poorer signal-to-noise ratio. More noise results in more jitter at the angle output. A good compromise is a magnet
diameter in the range of 5…8mm.
Small Diameter Magnet (<6mm)
Large Diameter Magnet (>6mm)
+ stronger differential signal =
good signal / noise ratio,
larger airgaps
+ wider linear range =
larger horizontal misalignment area
- shorter linear range =
smaller horizontal misalignment area
- weaker differential signal =
poorer signal / noise ratio,
smaller airgaps
Figure 5. Vertical Magnetic Field Across the Center of a Cylindrical Magnet
Bz [mT]
Bz; 6mm magnet @ y=0; z=1mm
Hall elements (side view)
X -displacement [mm]
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Data Sheet - D e t a i l e d D e s c r i p t i o n
7.1.2
Magnet Thickness
Figure 6 shows the relationship of the peak amplitude in a rotating system (essentially the magnetic field strength of the Bz field component) in
relation to the thickness of the magnet. The X-axis shows the ratio of magnet thickness (or height) [h] to magnet diameter [d] and the Y-axis
shows the relative peak amplitude with reference to the recommended magnet (d=6mm, h=2.5mm). This results in an h/d ratio of 0.42.
Figure 6. Relationship of Peak Amplitude vs. Magnet Thickness
Bz amplitude vs. magnet thickness
of a cylindrical diametric magnet with 6mm diameter
160%
Relative peak amplitude [%]
140%
120%
100%
80%
60%
d= 6mm x h= 2.5mm ref. magnet:
h/d = 0.42
Rel. amplitude = 100%
40%
20%
0%
0,0
0,2
0,4
0,6
0,8
1,0
1,2
1,4
1,6
1,8
thickness to diameter [h/d] ratio
As the graph in Figure 6 shows, the amplitude drops significantly at h/d ratios below this value and remains relatively flat at ratios above 1.3.
Therefore, the recommended thickness of 2.5mm (at 6mm diameter) should be considered as the low limit with regards to magnet thickness.
It is possible to get 40% or more signal amplitude by using thicker magnets. However, the gain in signal amplitude becomes less significant for h/
d ratios >~1.3. Therefore, the recommended magnet thickness for a 6mm diameter magnet is between 2.5 and ~8 mm.
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AS5215
Data Sheet - D e t a i l e d D e s c r i p t i o n
7.1.3
Axial Distance (Airgap)
Figure 7. Sinusoidal Magnetic Field Generated by the Rotating Magnet
B
vertical
field
0
360º
The recommended magnetic field, measured at the chip surface on a radius equal to the Hall sensor array radius (typ 1mm) should be within a
certain range. This range lies between 45 and 75mT or between 20 and 80mT, depending on the encoder product.
Linear position sensors are more sensitive as they use weaker magnets. The allowed magnetic range lies typically between 5 and 60mT.
7.1.4
Angle Error vs. Radial and Axial Misalignment
The angle error is the deviation of the actual angle vs. the angle measured by the encoder. There are several factors in the chip itself that
contribute to this error, mainly offset and gain matching of the amplifiers in the analog signal path. On the other hand, there is the nonlinearity of
the signals coming from the Hall sensors, caused by misalignment of the magnet and imperfections in the magnetic material.
Ideally, the Hall sensor signals should be sinusoidal, with equal peak amplitude of each signal. This can be maintained, as long as all Hall
elements are within the linear range of the magnetic field Bz (see Figure 5).
7.1.5
Mounting the Magnet
Generally, for on-axis rotation angle measurement, the magnet must be mounted centered over the IC package. However, the material of the
shaft into which the magnet is mounted, is also of big importance.
Magnetic materials in the vicinity of the magnet will distort or weaken the magnetic field being picked up by the Hall elements and cause
additional errors in the angular output of the sensor.
Figure 8. Magnetic Field Lines in Air
Figure 8 shows the ideal case with the magnet in air. No magnetic materials are anywhere nearby.
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AS5215
Data Sheet - D e t a i l e d D e s c r i p t i o n
Figure 9. Magnetic Field Lines in Plastic or Copper Shaft
If the magnet is mounted in non-magnetic material, such as plastic or diamagnetic material, such as copper, the magnetic field distribution is not
disturbed. Even paramagnetic material, such as aluminium may be used. The magnet may be mounted directly in the shaft (see Figure 9).
Note: Stainless steel may also be used, but some grades are magnetic. Therefore, steel with magnetic grades should be avoided.
Figure 10. Magnetic Field Lines in Iron Shaft
If the magnet is mounted in a ferromagnetic material, such as iron, most of the field lines are attracted by the iron and flow inside the metal shaft
(see Figure 10). The magnet is weakened substantially.
This configuration should be avoided!
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Data Sheet - D e t a i l e d D e s c r i p t i o n
Figure 11. Magnetic Field Lines with Spacer Between Magnet and Iron Shaft
If the magnet has to be mounted inside a magnetic shaft, a possible solution is to place a non-magnetic spacer between shaft and magnet, as
shown in Figure 11. While the magnetic field is rather distorted towards the shaft, there are still adequate field lines available towards the sensor
IC. The distortion remains reasonably low.
7.1.6
Summary
Small diameter magnets (<6mm Ø) have a shorter linear range and allow less lateral misalignment. The steeper slope allows larger axial
distances.
Large diameter magnets (>6 mm Ø) have a wider linear range and allow a wider lateral misalignment. The flatter slope requires shorter axial
distances.
The linear range decreases with airgap; Best performance is achieved at shorter airgaps.
The ideal vertical distance range can be determined by using magnetic range indicators provided by the encoder ICs. These indicators are
named MagInc, MagDec, MagRngn, or similar, depending on product.
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AS5215
Data Sheet - A p p l i c a t i o n I n f o r m a t i o n
8 Application Information
8.1 Sleep Mode
The target is to provide the possibility to reduce the total current consumption. No output signal will be provided when the IC is in sleep mode.
Enabling or disabling sleep mode is done by sending the SLEEP or WAKEUP commands via. the SSI interface. Analog blocks are powered
down with respect to fast wake up time.
8.2 SSI Interface
The setup for the device is handled by the digital interface. Each communication starts with the rising edge of the chip select signal. The
synchronization between the internal free running analog clock oscillator and the external used digital clock source for the digital interface is
done in a way that the digital clock frequency can vary in a wide range.
Table 8. SSI Interface Pin Description
Port
Symbol
Chip select
CS
DCLK
DCLK
Bidirectional data input output
DIO
Function
Indicates the start of a new access cycle to the device
CS = LO → reset of the digital interface
Clock source for the communication over the digital interface
Command and data information over one single line
The first bit of the command defines a read or write access
Table 9. SSI Interface Parameter Description
Symbol
Parameter
f_DCLK
Clock frequency at normal operation
f_EZ_RW
Clock frequency at easy zap read
write access
Notes
The nominal value for the clock frequency can
be derived from a 10MHz oscillator source.
f_EZ_PR
OG
Correct access to the programmable zener
diode block needs a strict timing – the zap pulse
is exact one period.
Clock frequency at easy zap access
program OTP
The nominal value for the clock frequency can
be derived from a 10MHz oscillator source.
f_EZ_AR
B
Clock frequency at easy zap analog
readback
Min
Typ
Max
Unit
no limit
5
6
MHz
no limit
5
6
kHz
200
-
650
kHz
no limit
156.3
162.5
kHz
20pF external load allowed.
The nominal value for the clock frequency can
be derived from a 10MHz oscillator source.
Interface General at normal mode
Protocol: 5 command bit + 16 data input output
Command
5 bit command: cmd<4:0> ← bit<21:16>
Data
16 bit data: data<15:0> ← bit<15:0>
Interface General at extended mode
Protocol: 5 command bit + 33 data input output
Command
5 bit command: cmd<4:0> ← bit<38:34>
Data
34 bit data: data<33:0> ← bit<33:0>
Interface Modes
Normal read operation mode
cmd<4:0> = <00xxx> → 1 DCLK per data bit
Extended read operation mode
cmd<4:0> = <01xxx> → 4 DCLK per data bit
Normal write operation mode
cmd<4:0> = <10xxx> → 1 DCLK per data bit
Extended write operation mode
cmd<4:0> = <11xxx> → 4 DCLK per data bit
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Data Sheet - A p p l i c a t i o n I n f o r m a t i o n
8.3 Device Communication / Programming
Table 10. Digital Interface at Normal Mode
#
command
bin
mode
15
14
23
WRITE CONFIG
1
13
10111
write
go2sleep
gen_rst
16
EN_PROG
10000
write
1
0
12
11
10
9
8
analog_sig
0
0
1
1
Name
7
6
5
4
3
2
1
0
1
0
1
0
1
1
1
0
OB_bypassed
0
0
Functionality
go2sleep
Enter/leave low power mode (no output signals)
gen_rst
Generates global reset
analog_sig
Switches the channels to the test bus after the PGA
OB_bypassed
Disable and bypass output buffer for testing purpose
Table 11. Digital Interface at Extended Mode
Factory Settings
#
bin
mode
31 WRITE OTP
11111
25 PROG_OTP
15 RD_OTP
9
command
RD_OTP_ANA
<45:44>
<43:
26>
<25:23>
xt write
otp test
ID
11001
xt write
otp test
01111
xt read
otp test
01001
xt read
<22:2
0>
User Settings
<19:1
8>
<17:1
4>
<13>
<12>
<11>
<10>
<9>
<8:7>
<6>
<5:0>
10µbiastrim
vref
osc
lock_O
TP
n.c.
invert_
channel
cm_sin
cm_cos
gain
dc_
offset
hall_
bias
ID
10µbiastrim
vref
osc
lock_O
TP
n.c.
invert_
channel
cm_sin
cm_cos
gain
dc_
offset
hall_
bias
ID
10µbiastrim
vref
osc
lock_O
TP
n.c.
invert_
channel
cm_sin
cm_cos
gain
dc_
offset
hall_
bias
Remark:
1. Send EN PROG (command 16) in normal mode before accessing the OTP in extended mode.
2. OTP assignment will be defined/updated.
Name
Otp_test
Functionality
Dummy fuse bit used in production test
ID
Part identification
n.c.
Not connected
10µbiastrim
10µ bias current trim bits
vref
Bias Block reference voltage trim bits
osc
Oscillator trimming bits
lock_OTP
invert_channel
To disable the programming of the factory bits <45…14>
Inverts SIN and COS channel before the PGA for inverted output function (0...SIN/COS, 1...SINN/
COSN)
cm_sin
Common mode voltage output enabled at SINN / CM pin (0...differential, 1...common)
cm_cos
Common mode voltage output enabled at COSN / CM pin (0...differential, 1...common)
gain
dc_offset
Hall_b
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PGA gain setting (influences overall magnetic sensitivity), 2bit
Output DC offset (0…1.5V, 1…2.5V)
Hall bias setting (influences overall magnetic sensitivity), 6bit
Revision 1.8
16 - 24
AS5215
Data Sheet - A p p l i c a t i o n I n f o r m a t i o n
Figure 12. Sensitivity Gain Settings - Relative Sensitivity in %
Magnetic Sensitivity vs. OTP Hall Current & PGA Gain Setting
600
550
Relative Sensitivity in %
500
450
400
M_PGA_00
350
M_PGA_01
M_PGA_10
300
M_PGA_11
250
200
150
100
0
10
20
30
40
50
60
Hall Current OTP setting (6 bits)
The amplitude of the output signal is programmable via sensitivity (6bit) and/or gain (2bit) settings (see Figure 12).
Figure 13. Sensitivity Gain Settings - Sensitivity [mV/mT]
Magnetic Sensitivity vs. OTP Hall Current & PGA Gain Setting
70
60
Sensitivity [mV/mT]
50
M_PGA_00
40
M_PGA_01
M_PGA_10
30
M_PGA_11
20
10
0
0
10
20
30
40
50
60
Hall Current OTP setting (6 bits)
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Revision 1.8
17 - 24
AS5215
Data Sheet - A p p l i c a t i o n I n f o r m a t i o n
8.4 Waveform – Digital Interface at Normal Operation Mode
Figure 14. Digital Interface at Normal Operation Mode
CMD_PHASE
DATA_PHASE
DCLK
t9_3
t1_3
CS
t5
t2_3
DIO
CMD4
t3
t4
DIO
CMD3
CMD2
CMD1
CMD0
t7
t6
t8
D14
D15
D13
t13_3
t12
D15
D14
READ
D0
t11
DIO
CMD
t10_3
D13
WRITE
D0
8.5 Waveform – Digital Interface at Extended Mode
In the extended mode, the digital interface needs four clocks for one data bit. During this time, the device is able to handle internal signals for
special access (e.g. the easy zap interface).
Figure 15. Digital Interface at Extended Mode
CMD_PHASE
DATA_PHASE
DCLK
t1_3
t9_3
CS
DIO
CMD4
t3
DIO
t7
t5
t2_3
CMD3
CMD2
CMD1
CMD0
t4
D45
t11
DIO
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t10_3
t8
t6
D44
Revision 1.8
READ
D0
t13_3
t12
D45
CMD
D44
D0
WRITE
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AS5215
Data Sheet - A p p l i c a t i o n I n f o r m a t i o n
8.6 Waveform – Digital Interface at Analog Readback of the Zener Diodes
To be sure that all Zener-Diodes are correctly burned, an analog readback mechanism is defined. Perform the ‘READ OTP ANA’ sequence
according to the command table and measure the value of the diode at the end of each phase.
Figure 16. Digital Interface at Analog Readback of Zener Diodes
CMD_PHASE
DATA_PHASE_EXTENDED
EXT D45
EXT D44
EXT D1
OTP D44
OTP D43
OTP D0
EXT D0
DCLK
CS
DIO
CMD4 CMD3 CMD2 CMD1 CMD0
OTP D45
PROG
perform analog measurements at PROG
Table 12. Serial Bit Sequence (16-bit read / write)
Write Command
C4
C3
C2
C1
Read / Write Data
C0
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
8.7 EasyZapp OTP Content
Each AS5215 die has an integrated 32-bit OTP ROM (Easyzapp) for trimming and configuration purposes. The PROM can be programmed via.
the serial interface. For irreversible programming, an external programming voltage at PROG pin is needed. For security reasons, the factory
trim bits can be locked by a lock bit.
Name
Bit Count
OTP Start
OTP End
Access
Comments
Hall Bias
6
0
5
user
Sets overall sensitivity
DC offset
1
6
6
user
Output DC offset setting
gain
2
7
8
user
Programmable gain amplifier setting
Lock
1
13
13
austriamicrosystems
invert_channel
1
11
11
user
Inverts SIN and COS channel before the
PGA for inverted output function
cm_sin
1
10
10
user
Common mode voltage output enabled at SINN /
CM pin
cm_cos
1
9
9
user
Common mode voltage output enabled at COSN /
CM pin
Set in production test
Remark: OTP assignment will be defined/updated.
Note: For more information, refer to the document “IP Easyzapp Application Note Rev C”.
http://intranet.office.amsiag.com/engineering/ipr/Datasheets/easyzapp_application_note_revc.pdf
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Revision 1.8
19 - 24
AS5215
Data Sheet - A p p l i c a t i o n I n f o r m a t i o n
8.8 Analog Sin/Cos Outputs with External Interpolator
Figure 17. Sine and Cosine Outputs for External Angle Calculation
+5V
VDD
100k
VDD
D A
D A
D A
VSS
SINN_1/SINP_1/CM_SIN_1
SINP_2 / SINN_2
SINN_2/SINP_2/CM_SIN_2
AS5130
COSP_1/COSN_1
AS5215
D A
Micro
Controller
VDD PROG
SINP_1/SINN_1
100n
COSN_1/COSP_1/CM_COS_1
COSP_2/COSN_2
COSN_2/COSP_2/CM_COS_2
VSS
VSS
Notes:
1. We recommend to use a 100k pull-up resistance.
2. Default conditions for unused pins are: DCLK_1/2, CS_1/2, DIO_1/2, TC_1/2, A_TST_1/2, TBO_1/2, TB1_1/2, TB2_1/2,
TB3_1/2 connect to VSS
The AS5215 provides analog Sine and Cosine outputs (SINP, COSP) of the Hall array front-end for test purposes. These outputs allow the user
to perform the angle calculation by an external ADC + µC, e.g. to compute the angle with a high resolution. The output driver capability is 1mA.
The signal lines should be kept as short as possible, longer lines should be shielded in order to achieve best noise performance.
Through the programming of one bit, you have the possibility to choose between the analog Sine and Cosine outputs (SINP, COSP) and their
inverted signals (SINN, COSN). Furthermore, by programming the bits <9:10> you can enable the common mode output signals of SIN and
COS.
The DC bias voltage is 1.5 or 2.5 V.
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Revision 1.8
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AS5215
Data Sheet - A p p l i c a t i o n I n f o r m a t i o n
8.9 OTP Programming
Figure 18. OTP Programming Connection
+5V
VDD
VDD
Output
CS_1
Output
DCLK_1
VDD
CS_2
Output
DCLK_2
I/O
Micro
Controller
AS5130
DIO_2
8.0 - 8.5V
+
VSS
AS5215
DIO_1
I/O
Output
100n
PROG
10µF 100n
VSS
-
VSS
maximum
parasitic cable
inductance
VSUPPLY
L<50nH
Vzapp
VDD
Vprog
C1
C2
100nF
10µF
PROG
GND
PROM Cell
For programming of the OTP, an additional voltage has to be applied to the pin PROG. It has to be buffered by a fast 100nF capacitor (ceramic)
and a 10µF capacitor. The information to be programmed is set by command 25. The OTP bits 16 until 45 are used for AMS factory trimming and
cannot be overwritten.
Symbol
Parameter
Min
Max
Unit
VDD
Supply Voltage
5
5.5
V
GND
Ground level
0
0
V
V_zapp
Programming Voltage
8
8.5
V
T_zapp
Temperature
0
85
ºC
f_clk
CLK Frequency
100
kHz
Note
At pin PROG
At pin DCLK
Remark: For normal operation, after programming, apply 100k pull up resistor at PROG pin!
www.austriamicrosystems.com/AS5215
Revision 1.8
21 - 24
AS5215
Data Sheet - P a c k a g e D r a w i n g s a n d M a r k i n g s
9 Package Drawings and Markings
The devices are available in a 32-pin QFN (7x7mm) package.
Figure 19. 32-pin QFN (7x7mm) Package
AS5215
17919-001
AYWWIZZ
25
32
24
1
8
17
16
9
Note: The distance between both dies is 150µm.
Table 13. Package Dimensions
Symbol
D
E
D1
E1
L
b
e
A
A1
Min
4.18
4.18
0.45
0.25
0.80
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mm
Typ
7 BSC
7 BSC
4.28
4.28
0.55
0.30
0.65 BSC
0.90
0.203 REF
Max
Min
4.38
4.38
0.65
0.35
0.165
0.165
0.018
0.010
1.00
0.031
Revision 1.8
inch
Typ
0.28 BSC
0.28 BSC
0.169
0.169
0.022
0.012
0.026 BSC
0.035
0.008 REF
Max
0.172
0.172
0.026
0.014
0.039
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AS5215
Data Sheet - R e v i s i o n H i s t o r y
Revision History
Revision
1.0
Date
Owner
Description
April 29, 2008
Initial revision
July 03, 2008
Redundancy Coding topic deleted.
1.1
July 15, 2008
Updated Key Features, Table 1 - Pin Descriptions, Figure 1 and
Figure 17.
1.2
July 14, 2009
Updated min, typ, max values for ‘Power up time’ parameter in Table 6.
July 31, 2009
Updated the following parameters in Table 6:
- Values and conditions updated for
1. Propagation delay
2. Amplitude ratio tracking accuracy over temperature
3. DC Offset Drift
- Deleted the ‘Output Offset’ parameter from the table.
1.3
apg
Aug 24, 2009
Updated following bits related information on page 16 - invert_channel,
cm_sin, cm_cos, gain, dc_offset, Hall_b
1.4
Aug 26, 2009
Inserted Figure 12 and updated Applications and Figure 17.
1.5
Sept 01, 2009
Inserted Figure 13, Added a note in Package Drawings and Markings.
1.6
Sept 02, 2009
Deleted ‘Displacement’ parameter from Table 5.
1.7
Nov 26, 2009
Hall Array Radius value updated from 1.1mm to 1mm
Updated Figure 13
1.8
Dec 11, 2009
Updated values for ‘Magnetic Sensitivity’ parameter in Table 6.
Note: Typos may not be explicitly mentioned under revision history.
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Revision 1.8
23 - 24
AS5215
Data Sheet - O r d e r i n g I n f o r m a t i o n
10 Ordering Information
The devices are available as the standard products shown in Table 14.
Table 14. Ordering Information
Ordering Code
Description
Delivery Form
Package
AS5215-HQFT
Sine and cosine analog output magnetic rotary encoder
Tape & Reel
32-pin QFN (7x7mm)
Note: All products are RoHS compliant and Pb-free.
Buy our products or get free samples online at ICdirect: http://www.austriamicrosystems.com/ICdirect
For further information and requests, please contact us mailto:[email protected]
or find your local distributor at http://www.austriamicrosystems.com/distributor
Copyrights
Copyright © 1997-2009, austriamicrosystems AG, Tobelbaderstrasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®.
All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of
the copyright owner.
All products and companies mentioned are trademarks or registered trademarks of their respective companies.
Disclaimer
Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale.
austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding
the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at
any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for
current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range,
unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are
specifically not recommended without additional processing by austriamicrosystems AG for each application. For shipments of less than 100
parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location.
The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not
be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use,
interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing,
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austriamicrosystems AG rendering of technical or other services.
Contact Information
Headquarters
austriamicrosystems AG
Tobelbaderstrasse 30
A-8141 Unterpremstaetten, Austria
Tel: +43 (0) 3136 500 0
Fax: +43 (0) 3136 525 01
For Sales Offices, Distributors and Representatives, please visit:
http://www.austriamicrosystems.com/contact
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Revision 1.8
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