AGILENT HFBR

Agilent HFBR-5921L/HFBR-5923L
Fibre Channel 2.125/1.0625 GBd 850 nm
Small Form Factor Pin Through Hole (PTH)
Low Voltage (3.3 V) Optical Transceiver
Data Sheet
Applications
• Mass storage system I/O
• Computer system I/O
• High speed peripheral interface
• High speed switching systems
• Host adapter I/O
Description
The HFBR-5921L/5923L optical
transceivers from Agilent
Technologies offer maximum
flexibility to Fibre Channel designers,
manufacturers, and system integrators to implement a range of
solutions for multi-mode Fibre
Channel applications. This product
is fully compliant with all equipment meeting the Fibre Channel
FC-PI 200-M5-SN-I and 200-M6-SN-I
2.125 GBd specifications, and is
compatible with the Fibre Channel
FC-PI 100-M5-SN-I, FC-PI
100-M6-SN-I, FC-PH2 100-M5-SN-I,
and FC-PH2 100-M6-SN-I 1.0625
GBd specifications. The
HFBR-5921L/5923L is also
compliant with the SFF Multi
Source Agreement (MSA).
Features
• Compliant with 2.125 GBd Fibre
Channel FC-PI standard
– FC-PI 200-M5-SN-I for
50/125 µm multimode cables
– FC-PI 200-M6-SN-I for
62.5/125 µm multimode cables
• RAID cabinets
• Compliant with 1.0625 GBd VCSEL
operation for both 50/125 and
62.5/125 µm multimode cables
• HFBR-53D3: 850 nm +5 V 1 x 9 Laser
transceiver for Fiber Channel
FC-PH-2
• Industry standard Pin Through
Hole (PTH) package
• HFBR-5910E: 850 nm +3.3 V SFF
MTRJ Laser transceiver for Fibre
Channel FC-PH-2
Module Package
Agilent offers the industry two Pin
Through Hole package options
utilizing an integral LC-Duplex
optical interface connector. Both
transceivers use a reliable 850 nm
VCSEL source and requires a 3.3 V
DC power supply for optimal
system design.
• Reliable 850 nm Vertical Cavity
Surface Emitting Laser (VCSEL)
source technology
• LC-duplex connector optical
interface
• Link lengths at 2.125 GBd:
0.5 to 300 m – 50/125 µm MMF
0.5 to 150 m – 62.5/125 µm MMF
• Link lengths at 1.0625 GBd:
0.5 to 500 m – 50/125 µm MMF
0.5 to 300 m – 62.5/125 µm MMF
• Laser AEL Class I (eye safe) per:
US 21 CFR (J)
EN 60825-1 (+All)
• Single +3.3 V power supply
operation
• 2 x 5 or 2 x 6 DIP package style
with LC-duplex fiber
• Wave solder and aqueous wash
process compatible
Related Products
• HFBR-5602: 850 nm +5 V Gigabit
Interface Converter (GBIC) for Fiber
Channel FC-PH-2
• HDMP-2630/2631: 2.125/1.0625 Gbps
TRx family of SerDes IC
• HFBR-5720L: 850 nm 3.3 V 2.125/
1.0625 Gbps SFP Transceiver
HFBR-5721/23 BLOCK DIAGRAM
RECEIVER
LIGHT FROM FIBER
PHOTO-DETECTOR
ELECTRICAL INTERFACE
RD+ (RECEIVE DATA)
AMPLIFICATION
& QUANTIZATION
RD– (RECEIVE DATA)
SIGNAL DETECT
OPTICAL INTERFACE
TRANSMITTER
LIGHT TO FIBER
VCSEL
Tx_DISABLE
LASER
DRIVER &
SAFETY
CIRCUITRY
TD+ (TRANSMIT DATA)
TD– (TRANSMIT DATA)
Tx_FAULT
(AVAILABLE ONLY ON 2 x 6)
Figure 1. Transceiver functional diagram.
See Table 5 for Process Compatibility Specifications.
Module Diagrams
Figure 1 illustrates the major
functional components of the
HFBR-5921/5923. The connection diagram for both modules
are shown in Figure 2. Figure 7
depicts the external configuration
and dimensions of the module.
Installation
The HFBR-5921L/5923L can be
installed in any MSA-compliant
Pin Through Hole port. The
module Pin Description is shown
in Figure 2.
Solder and Wash Process Capability
These transceivers are delivered
with protective process plugs
inserted into the LC connector
receptacle. This process plug
protects the optical subassemblies during wave solder and
aqueous wash processing and
acts as a dust cover during shipping. These transceivers are
compatible with industry
standard wave or hand solder
processes.
Recommended Solder Fluxes
Solder fluxes used with the
HFBR-5921L/5923L should be
water-soluble, organic fluxes.
Recommended solder fluxes
2
Figure 2. Module pin assignments and pin configuration.
include Lonco 3355-11 from
London Chemical West, Inc. of
Burbank, CA, and 100 Flux from
Alpha-Metals of Jersey City, NJ.
Recommended Cleaning/Degreasing
Chemicals
Alcohols: methyl, isopropyl,
isobutyl.
Aliphatics: hexane, heptane.
Other: naphtha.
Do not use partially halogenated
hydrocarbons such as 1,1.1
trichoroethane or ketones such as
MEK, acetone, chloroform, ethyl
acetate, methylene dichloride,
phenol, methylene chloride, or
N-methylpyrolldone. Also, Agilent
does not recommend the use of
cleaners that use halogenated
hydrocarbons because of their
potential environmental harm.
Transmitter Section
The transmitter section includes
the transmitter optical subassembly (TOSA) and laser driver
circuitry. The TOSA, containing
an 850 nm VCSEL (Vertical
Cavity Surface Emitting Laser)
light source, is located at the
optical interface and mates with
the LC optical connector. The
TOSA is driven by a custom
silicon IC, which converts
differential logic signals into an
analog laser diode drive current.
This TX driver circuit regulates
the optical power at a constant
level provided the data pattern is
valid 8B/10B DC balanced code.
indicates a laser transmit fault
has occurred and when low indicates normal laser operation. A
transmitter fault condition can be
caused by deviations from the
recommended module operating
conditions or by violation of eye
safety conditions. A transient
fault can be cleared by cycling
the TX Disable control input.
Eye Safety Circuit
For an optical transmitter device
to be eye-safe in the event of a
single fault failure, the transmitter
will either maintain normal,
eye-safe operation or be disabled.
In the event of an eye safety fault,
the VCSEL will be disabled.
TX Disable
The HFBR-5921L/5923L accepts
a transmit disable control signal
input which shuts down the transmitter. A high signal implements
this function while a low signal
allows normal laser operation. In
the event of a fault (e.g., eye
safety circuit activated), cycling
this control signal resets the
module. The TX Disable control
should be actuated upon initialization of the module. See Figure 6
for product timing diagrams.
TX Fault (Available only on the 2 x 6)
NORMALIZED AMPLITUDE
The HFBR-5923L module
features a transmit fault control
signal output which when high
Receiver Section
The receiver section includes the
receiver optical subassembly
(ROSA) and amplification/quantization circuitry. The ROSA,
containing a PIN photodiode and
custom transimpedance preamplifier, is located at the optical
interface and mates with the LC
optical connector. The ROSA is
mated to a custom IC that provides post-amplification and
quantization. This circuit also
includes a Signal Detect (SD)
circuit which provides an LVTTLcompatible logic low output in
the absence of a usable input
optical signal level.
1.3
1.0
0.8
0.5
0.2
0
–0.2
0
x1
0.4
0.6
1-x1
1.0
NORMALIZED TIME (IN UI)
Figure 3. Transmitter eye mask diagram and typical transmitter eye.
3
Signal Detect
The Signal Detect (SD) output
indicates if the optical input
signal to the receiver does not
meet the minimum detectable
level for Fibre Channel compliant
signals. When SD is low it
indicates loss of signal. When SD
is high it indicates normal
operation. The Signal Detect
thresholds are set to indicate a
definite optical fault has occurred
(e.g., disconnected or broken
fiber connection to receiver,
failed transmitter).
Functional Data I/O
Agilent’s HFBR-5921L/5923L
fiber-optic transceiver is designed
to accept industry standard differential signals. In order to
reduce the number of passive
components required on the
customer’s board, Agilent has
included the functionality of the
transmitter bias resistors and
coupling capacitors within the
fiber optic module. The transceiver is compatible with an
“AC-coupled” configuration and is
internally terminated. Figure 1
depicts the functional diagram of
the HFBR- 5921/5923.
Caution should be taken to
account for the proper interconnection between the supporting
Physical Layer integrated circuits
and the HFBR-5921L/5923L .
Figure 4 illustrates the recommended interface circuit.
Application Support
Evaluation Kit
To help you in your preliminary
transceiver evaluation, Agilent
offers a 2.125 GBd Fibre Channel
evaluation board. This board will
allow testing of the HFBR-5921L/
5923L optical transceivers.
Please contact your local field
sales representative for availability and ordering details.
second condition is static
discharges to the exterior of the
host equipment chassis after
installation. To the extent that the
duplex LC optical interface is
exposed to the outside of the host
equipment chassis, it may be
subject to system-level ESD
requirements. The ESD performance of the HFBR-5921L/5923L
exceeds typical industry
standards.
Reference Designs
Reference designs for the
HFBR-5921L/5923L fiber-optic
transceiver and the
HDMP-2630/2631 physical layer
IC are available to assist the
equipment designer. Figure 4
depicts a typical application configuration, while Figure 5 depicts
the multisourced power supply
filter circuit design. All artwork is
available at the Agilent electronic
bulletin board. Please contact
your local field sales engineer for
more information regarding
application tools.
Regulatory Compliance
See Table 1 for transceiver Regulatory Compliance performance.
The overall equipment design will
determine the certification level.
The transceiver performance is
offered as a figure of merit to
assist the designer.
Electrostatic Discharge (ESD)
There are two conditions in which
immunity to ESD damage is important. Table 1 documents our
immunity to both of these conditions. The first condition is
during handling of the transceiver
prior to attachment to the PCB.
To protect the transceiver, it is
important to use normal ESD
handling precautions. These precautions include using grounded
wrist straps, work benches, and
floor mats in ESD controlled
areas. The ESD sensitivity of the
HFBR-5921L/5923L is compatible with typical industry
production environments. The
4
Immunity
Equipment hosting the
HFBR-5921L/5923L modules will
be subjected to radio-frequency
electromagnetic fields in some
environments. The transceivers
have good immunity to such fields
due to their shielded design.
Electromagnetic Interference (EMI)
Most equipment designs utilizing
these high-speed transceivers
from Agilent Technologies will be
required to meet the requirements
of FCC in the United States,
CENELEC EN55022 (CISPR 22)
in Europe and VCCI in Japan.
The metal housing and shielded
design of the HFBR-5921L/5923L
minimize the EMI challenge facing the host equipment designer.
These transceivers provide superior EMI performance. This
greatly assists the designer in the
management of the overall
system EMI performance.
Eye Safety
These 850 nm VCSEL-based
transceivers provide Class 1 eye
safety by design. Agilent
Technologies has tested the
transceiver design for compliance
with the requirements listed in
Table 1: Regulatory Compliance,
under normal operating conditions and under a single fault
condition.
Flammability
The HFBR-5921L/5923L VCSEL
transceiver housing is made of
metal and high strength, heat
resistant, chemically resistant,
and UL 94V-0 flame retardant
plastic.
Caution
There are no user serviceable
parts nor is any maintenance
required for the HFBR-5921/5923.
All adjustments are made at the
factory before shipment to our
customers. Tampering with or
modifying the performance of the
HFBR-5921L/5923L will result in
voided product warranty. It may
also result in improper operation
of the HFBR-5921L/5923L
circuitry, and possible overstress
of the laser source. Device degradation or product failure may
result. Connection of the
HFBR-5921L/5923L to a nonapproved optical source, operating
above the recommended absolute
maximum conditions or operating
the HFBR-5921L/5923L in a
manner inconsistent with its
design and function may result in
hazardous radiation exposure and
may be considered an act of
modifying or manufacturing a
laser product. The person(s) performing such an act is required
by law to re-certify and re-identify
the laser product under the
provisions of U.S. 21 CFR (Subchapter J) and the TUV.
Ordering Information
Please contact your local field
sales engineer or one of Agilent
Technologies franchised distributors for ordering information. For
technical information regarding
this product, including the MSA,
please visit Agilent Technologies
Semiconductors Products
Website at www.agilent.com/
view/fiber. Use the quick search
feature to search for this part
number. You may also contact
Agilent Technologies Semiconductor Products Customer Response Center at 1-800-235-0312.
Table 1. Regulatory Compliance
Feature
Electrostatic Discharge (ESD)
to the Electrical Pins
Electrostatic Discharge (ESD)
to the Duplex LC Receptacle
Test Method
MIL-STD-883C Method 3015.4
Performance
Class 2 (> 2000 V)
Variation of IEC 61000-4-2
Electromagnetic Interference
(EMI)
FCC Class B
CENELEC EN55022 Class B
(CISPR 22A)
VCCI Class 1
Variation of IEC 61000-4-3
Typically withstand at least 25 kV without damage
when the duplex LC connector receptacle is
contacted by a Human Body Model probe.
System margins are dependent on customer
board and chassis design.
Immunity
Eye Safety
Component Recognition
Typically shows a negligible effect from a 10 V/m
field swept from 80 to 1000 MHz applied to the
transceiver without a chassis enclosure.
CDRH file # 9720151-13
TUV file # E9971086.061
US FDA CDRH AEL Class 1
EN(IEC)60825-1,2,
EN60950 Class 1
Underwriters Laboratories and
UL file # E173874
Canadian Standards Association
Joint Component Recognition for
Information Technology Equipment
including Electrical Business
Equipment.
Note:
1. Changes to IEC 60825-1,2 are currently anticipated to allow higher eye-safe Optical Output Power levels. Agilent may choose to take advantage
of these changes at a later date.
5
1 µH
3.3 V
10 µF
0.1 µF
1 µH
3.3 V
VCC,T
0.1 µF
4.7 K to 10 K
6.8 K
Tx_DISABLE
GP04
Tx_FAULT
Tx_FAULT
VREFR
VREFR
SO+
TX[0:9]
SO–
50 Ω
TD+
50 Ω
TD–
100
TX GND
TBC
EWRAP
TBC
EWRAP
HDMP-2630/31
PROTOCOL
IC
10 µF
RX[0:9]
RBC
Rx_RATE
REFCLK
RBC
Rx_RATE
SI+
SI–
0.01 µF
0.1
µF
50 Ω
RD+
50 Ω
RD–
0.01 µF
VCC,R
0.01 µF
100
Rx_SD
Rx_SD
LASER DRIVER
& SAFETY
CIRCUITRY
0.01 µF
AMPLIFICATION
&
QUANTIZATION
RX GND
HFBR-5921L/5923L
REFCLK
106.25 MHz
NOTE: Tx_FAULT REQUIRED FOR 2 x 6 MODULE ONLY.
Figure 4. Typical application configuration.
1 µH
VCCT
0.1 µF
1 µH
3.3 V
VCCR
0.1 µF
HFBR-5921L/5923L
10 µF
0.1 µF
10 µF
HOST BOARD
NOTE: INDUCTORS MUST HAVE LESS THAN 1 Ω SERIES RESISTANCE PER MSA.
Figure 5. MSA recommended power supply filter.
6
Table 2. Pin Description
Pin
1
2
3
4
5
6
7
8
9
10
A
B
Name
VEE R
VCCR
SD
RD–
RD+
VCCT
VEE T
TX Disable
TD+
TD–
N/C
(2 x 6 Only)
TX Fault
(2 x 6 Only)
Function/Description
Receiver Ground
Receiver Power –3.3 V ±5%
Signal Detect – Low indicates Loss of Signal
Inverse Received Data Out
Received Data Out
Transmitter Power –3.3 V ±5%
Transmitter Ground
Transmitter Disable – Module disables on High
Transmitter Data In
Inverse Transmitter Data In
Not Connected
MSA Notes
1
6
4
5
5
6
1
3
7
7
Transmitter Fault Indication – High indicates a Fault
2
Notes:
1. Transmitter and Receiver Ground are common in the internal module PCB. They are electrically connected to signal ground within the module,
and to the housing shield (see Note 5 in Figure 7c). This housing shield is electrically isolated from the nose shield which is connected to chassis
ground (see Note 4 in Figure 7c).
2. TX Fault is an open collector/drain output, which should be pulled up externally with a 4.7 K – 10 KΩ resistor on the host board to a supply
< VCC T + 0.3 V or VCC R + 0.3 V. When high, this output indicates a laser fault of some kind. Low indicates normal operation. In the low state, the
output will be pulled to < 0.8 V.
3. TX disable input is used to shut down the laser output per the state table below. It is pulled down internally within the module with a 6.8 KΩ
resistor.
Low (0 – 0.8 V):
Transmitter on
Between (0.8 V and 2.0 V):
Undefined
High (2.0 – 3.465 V):
Transmitter Disabled
Open:
Transmitter Enabled
4. SD (Signal Detect) is a normally high LVTTL output. When high it indicates that the received optical power is adequate for normal operation.
When Low, it indicates that the received optical power is below the worst case receiver sensitivity, a fault has occurred, and the link is no longer
valid. SD is pulled up internally with a 2 KΩ resistor to VCCR.
5. RD-/+: These are the differential receiver outputs. They are AC coupled 100 Ω differential lines which should be terminated with 100 Ω differential
at the user SerDes. The AC coupling is done inside the module and is thus not required on the host board. The voltage swing on these lines will
be between 400 and 2000 mV differential (200 – 1000 mV single ended) when properly terminated. These levels are compatible with CML and
LVPECL voltage swings.
6. VCC R and VCCT are the receiver and transmitter power supplies. They are defined as 3.135 – 3.465 V at the PTH connector pin. The maximum
supply current is 200 mA.
7. TD-/+: These are the differential transmitter inputs. They are AC coupled differential lines with 100 Ω differential termination inside the module.
The AC coupling is done inside the module and is thus not required on the host board. The inputs will accept differential swings of 400 – 2400 mV
(200 – 1200 mV single ended), though it is recommended that values between 400 and 1200 mV differential (200 – 600 mV single ended) be used for
best EMI performance. These levels are compatible with CML and LVPECL.
7
Table 3. Absolute Maximum Ratings
Parameter
Storage Temperature
Case Temperature
Relative Humidity
Supply Voltage
Data/Control Input Voltage
Sense Output Current –
SD,TX Fault
Symbol
TS
TC
RH
VCCT,R
VI
ID
Minimum
–40
0
5
–0.5
–0.5
Typical
Maximum
+100
+85
95
3.6
VCC + 0.3
150
Unit
˚C
˚C
%
V
V
mA
Notes
1
1, 2
1
1, 2
1
1
Notes:
1. Absolute Maximum Ratings are those values beyond which damage to the device may occur if these limits are exceeded for other than a short
period of time. See Reliability Data Sheets for specific reliability performance.
2. Between Absolute Maximum Ratings and the Recommended Operating Conditions, functional performance is not intended, device reliability is
not implied, and damage to the device may occur over an extended period of time.
Table 4. Recommended Operating Conditions
Parameter
Case Temperature
Module Supply Voltage
Data Rate Fibre Channel
Symbol
TC
VCCT,R
Minimum
0
3.135
Typical
3.3
1.0625
2.125
Maximum
70
3.465
Unit
˚C
V
Gb/s
Notes
1
1
1
Notes:
1. Recommended operating conditions are those values outside of which functional performance is not intended, device reliability is not implied,
and damage to the device may occur over an extended period of time. See Reliability Data Sheet for specific reliability performance.
Table 5. Process Compatibility
Parameter
Hand Lead Solder Temperature/Time
Wave Solder and Aqueous Wash
Note:
1. Aqueous wash pressure < 110 psi.
8
Symbol
TSOLD/tSOLD
TSOLD/tSOLD
Minimum
Maximum
+260/10
+260/10
Unit
°C/sec
°C/sec
Notes
1
Table 6. Transceiver Electrical Characteristics
(TC = 0˚C to 70˚C, VCCT,R = 3.3 V ± 5%)
Parameter
AC Electrical Characteristics
Power Supply Noise Rejection
(Peak-to-Peak)
DC Electrical Characteristics
Module Supply Current
Power Dissipation
Sense Output:
Transmit Fault [TX_FAULT],
2 x 6 Only
Sense Output:
Signal Detect [SD]
Control Inputs:
Transmitter Disable
[TX_DISABLE]
Symbol
Minimum
Typical
PSNR
100
ICC
PDISS
133
440
Maximum
Unit
Notes
mV
1
200
693
mA
mW
VOH
VOL
2.0
VCCT,R + 0.3
0.8
V
V
2
VOH
VOL
2.4
VCCT,R + 0.3
0.4
V
V
3
VIH
VIL
2.0
0
VCC + 0.3
0.8
V
V
Maximum
Unit
Notes
2400
mV
1
2000
mV
2
0.1
47
0.12
113
0.162
76
0.098
92
250
UI
ps
UI
ps
UI
ps
UI
ps
ps
3, 6
Notes:
1. MSA filter is required on host board 10 Hz to 2 MHz.
2. External 4.7-10 KΩ pull-up resistor required for TX_Fault.
3. SD pin is pulled up internally with a 2 KΩ resistor to VCC R.
Table 7. Transmitter and Receiver Electrical Characteristics
(TC = 0˚C to 70˚C, VCCT,R = 3.3 V ± 5%)
Parameter
Data Input:
Transmitter Differential Input
Voltage (TD +/–)
Data Output:
Receiver Differential Output
Voltage (RD +/–)
Contributed Deterministic
Jitter (Receiver) 2.125 Gb/s
Contributed Deterministic
Jitter (Receiver) 1.0625 Gb/s
Contributed Random Jitter
(Receiver) 2.125 Gb/s
Contributed Random Jitter
(Receiver) 1.0625 Gb/s
Receive Data Rise and Fall
Times (Receiver)
Symbol
Minimum
VI
400
VO
400
DJ
DJ
RJ
RJ
Trf
Typical
735
3, 6
4, 6
4, 6
5
Notes:
1. Internally AC coupled and terminated (100 Ohm differential). These levels are compatible with CML and LVPECL voltage swings.
2. Internally AC coupled with an external 100 ohm differential load termination.
3. Contributed DJ is measured on an oscilloscope in average mode with 50% threshold and K28.5 pattern.
4. Contributed RJ is calculated for 1x10 -12 BER by multiplying the RMS jitter (measured on a single rise or fall edge) from the oscilloscope by 14. Per
the FC-PI standard (Table 13 - MM jitter output, Note 1), the actual contributed RJ is allowed to increase above its limit if the actual contributed
DJ decreases below its limits, as long as the component output DJ and TJ remain within their specified FC-PI maximum limits with the worst
case specified component jitter input.
5. 20%-80% Rise and Fall times measured with a 500 MHz signal utilizing a 1010 data pattern.
6. In a network link, each component’s output jitter equals each component’s input jitter combined with each component’s contributed jitter.
Contributed DJ adds in a linear fashion and contributed RJ adds in a RMS fashion. In the Fibre Channel FC-PI Rev 11 specification “6.3.3 MM
jitter budget” section, there is a table specifying the input and output DJ and TJ for the receiver at each data rate. In that table, RJ is found from
TJ - DJ where the RX input jitter is noted as Gamma R and the RX output jitter is noted as Delta R. Our component contributed jitter is such that,
if the maximum specified input jitter is present, and is combined with our maximum contributed jitter, then we meet the specified maximum
output jitter limits listed in the FC-PI MM jitter specification table.
9
Table 8. Transmitter Optical Characteristics
(TC = 0˚C to 70˚C, VCCT,R = 3.3 V ± 5%)
Parameter
Output Optical Power (Average)
Symbol
POUT
Minimum
–10
Typical
–6.3
Maximum
0
Unit
dBm
POUT
–10
–6.2
0
dBm
dB
uW
uW
Optical Extinction Ratio
Optical Modulation Amplitude
(Peak-to-Peak) 2.125 Gb/s
Optical Modulation Amplitude
(Peak-to-Peak) 1.0625 Gb/s
Center Wavelength
Spectal Width – rms
Optical Rise /Fall Time
ER
OMA
196
9
392
OMA
156
350
λC
σ
Trise/fall
830
RIN12 (OMA), maximum
Contributed Deterministic Jitter
(Transmitter) 2.125 Gb/s
Contributed Deterministic Jitter
(Transmitter) 1.0625 Gb/s
Contributed Random Jitter
(Transmitter) 2.125 Gb/s
Contributed Random Jitter
(Transmitter) 1.0625 Gb/s
POUT TX_DISABLE Asserted
RIN
DJ
DJ
RJ
RJ
POFF
860
0.85
150
nm
nm
ps
–117
0.12
56
0.09
85
0.134
63
0.177
167
–35
dB/Hz
UI
ps
UI
ps
UI
ps
UI
ps
dBm
Notes
50/125 µm
NA = 0.2
Note 1
62.5/125 µm
NA = 0.275
Note 1
FC-PI Std
Note 2
FC-PI Std
Note 3
FC-PI Std
FC-PI Std
20%–80%,
FC-PI Std
FC-PI Std
4, 5
4, 6
5, 6
5, 6
Notes:
1. Max Pout is the lesser of 0 dBm or Maximum allowable per Eye Safety Standard.
2. An OMA of 196 is approximately equal to an average power of –9 dBm assuming an Extinction Ratio of 9 dB.
3. An OMA of 156 is approximately equal to an average power of –10 dBm assuming an Extinction Ratio of 9 dB.
4. Contributed DJ is measured on an oscilloscope in average mode with 50% threshold and K28.5 pattern.
5. Contributed RJ is calculated for 1x10 -12 BER by multiplying the RMS jitter (measured on a single rise or fall edge) from the oscilloscope by 14. Per
the FC-PI standard (Table 13 - MM jitter output, note 1), the actual contributed RJ is allowed to increase above its limit if the actual contributed
DJ decreases below its limits, as long as the component output DJ and TJ remain within their specified FC-PI maximum limits with the worst
case specified component jitter input.
6. In a network link, each component’s output jitter equals each component’s input jitter combined with each component’s contributed jitter.
Contributed DJ adds in a linear fashion and contributed RJ adds in a RMS fashion. In the Fibre Channel FC-PI Rev 11 specification “6.3.3 MM
jitter budget” section, there is a table specifying the input and output DJ and TJ for the transmitter at each data rate. In that table, RJ is found
from TJ – DJ, where the TX input jitter is noted as Delta T, and the TX output jitter is noted as Gamma T. Our component contributed jitter is such
that, if the maximum specified input jitter is present, and is combined with our maximum contributed jitter, then we meet the specified maximum
output jitter limits listed in the FC-PI MM jitter specification table.
10
Table 9. Receiver Optical Characteristics
(TC = 0˚C to 70˚C, VCCT,R = 3.3 V ± 5%)
Parameter
Optical Power
Min Optical Modulation
Amplitude (Peak-to-Peak)
2.125 Gb/s
Min Optical Modulation
Amplitude (Peak-to-Peak)
1.0625 Gb/s
Stressed Receiver Sensitivity
(OMA) 2.125 Gb/s
Symbol
PIN
OMA
Minimum
Typical
49
OMA
Stressed Receiver Sensitivity
(OMA) 1.0625 Gb/s
Return Loss
Signal Detect – De-Assert
Signal Detect – Assert
Signal Detect Hysteresis
PD
PA
PA – P D
16
Unit
dBm
µW
Notes
FC-PI Std
FC-PI Std
Note 1
31
18
µW
FC-PI Std
Note 2
96
33
µW
109
25
µW
55
19
µW
67
16
µW
2.3
dB
dBm
dBm
dB
50 µm fiber,
FC-PI Std
62.5 µm fiber,
FC-PI Std
Note 3
50 µm fiber,
FC-PI Std
62.5 µm fiber,
FC-PI Std
Note 4
FC-PI Std
Note 5
Note 5
12
–31
0.5
Maximum
0
–17.5
–17.0
5
Notes:
1. An OMA of 49 uW is approximately equal to an average power of -15dBm, and the OMA typical of 16 uW is approximately equal to an average
power of -20 dBm, assuming an Extinction Ratio of 9dB. Sensitivity measurements are made at eye center with BER = 10E-12.
2. An OMA of 31 is approximately equal to an average power of –17 dBm assuming an Extinction Ratio of 9 dB.
3. 2.125 Gb/s Stressed receiver vertical eye closure penalty (ISI) min is 1.26 dB for 50 µm fiber and 2.03 dB for 62.5 µm fiber. Stressed receiver DCD
component min (at TX) is 40 ps.
4. 1.0625 Gb/s Stressed receiver vertical eye closure penalty (ISI) min is 0.96 dB for 50 µm fiber and 2.18 dB for 62.5 µm fiber. Stressed receiver DCD
component min (at TX) is 80 ps.
5. These average power values are specified with an Extinction Ratio of 9dB. The Signal Detect circuitry responds to OMA (peak-to-peak) power,
not to average power.
11
Table 10. Transceiver Timing Characteristics
(TC = 0˚C to 70˚C, VCCT,R = 3.3 V ± 5%)
Parameter
TX Disable Assert Time
TX Disable Negate Time
Time to Initialize, including
Reset of TX_Fault
TX Fault Assert Time
(2 x 6 Module only )
TX Disable to Reset
SD Assert Time
SD De-assert Time
Symbol
t_off
t_on
t_init
Minimum
t_fault
t_reset
t_loss_on
t_loss_off
Maximum
10
1
300
Unit
µs
ms
ms
Notes
1
2
3
100
µs
4, 8
100
100
µs
µs
µs
5
6
7
10
Notes:
1. Time from rising edge of TX Disable to when the optical output falls below 10% of nominal.
2. Time from falling edge of TX Disable to when the modulated optical output rises above 90% of nominal.
3. From power on or negation of TX Fault using TX Disable.
4. Time from fault to TX fault on.
5. Time TX Disable must be held high to reset TX_FAULT.
6. Time from LOS state to RX LOS assert.
7. Time from non-LOS state to RX LOS de-assert.
8. TX_Fault is only available on the 2 x 6 option – HFBR-5923L.
12
VCC > 3.15 V
VCC > 3.15 V
Tx_FAULT
Tx_FAULT
Tx_DISABLE
Tx_DISABLE
TRANSMITTED SIGNAL
TRANSMITTED SIGNAL
t_init
t_init
t-init: TX DISABLE DE-ASSERTED
t-init: TX DISABLE ASSERTED
Tx_FAULT
Tx_DISABLE
TRANSMITTED SIGNAL
t_off
t_on
t-off & t-on: TX DISABLE ASSERTED THEN NEGATED
OCCURANCE OF FAULT
OCCURANCE OF FAULT
Tx_FAULT
Tx_FAULT
Tx_DISABLE
Tx_DISABLE
TRANSMITTED SIGNAL
TRANSMITTED SIGNAL
t_fault
* SFP SHALL CLEAR TX_FAULT IN
< t_init IF THE FAILURE IS TRANSIENT
t-fault (2 x 6 only): TX FAULT ASSERTED, TX SIGNAL NOT RECOVERED
t_reset
t_init*
t-reset: TX DISABLE ASSERTED THEN NEGATED, TX SIGNAL RECOVERED
OCCURANCE OF FAULT
Tx_FAULT
Rx_SD
TRANSMITTED SIGNAL
t_fault
t_loss_on
t_reset
* SFP SHALL CLEAR TX_FAULT IN
< t_init IF THE FAILURE IS TRANSIENT
t_init*
t-fault (2 x 6 only): TX DISABLE ASSERTED THEN NEGATED,
TX SIGNAL NOT RECOVERED
t-loss-on & t-loss-off
NOTE: Tx_FAULT IS AVAILABLE ONLY ON THE 2 x 6 OPTION – HFBR-5923L.
Figure 6. Transceiver timing diagrams.
13
OCCURANCE
OF LOSS
OPTICAL SIGNAL
Tx_DISABLE
t_loss_off
AGILENT HFBR-5921L
850 nm LASER PROD
21CFR(J) CLASS 1
COUNTRY OF ORIGIN YYWW
XXXXXX
15.05
UNCOMPRESSED
(0.593)
13.59 MAX.
(0.535)
THERMOCOUPLE
TEST POINT
48.19
(1.897)
6.25 ± 0.05
(0.246 ± 0.002)
13.14
(0.517)
3.25
(0.128)
TX
9.80 MAX.
(0.39)
10.16
(0.400)
2.92 MIN.
(0.115)
11.3
UNCOMPRESSED
(0.445)
4x
14.68
(0.578)
1.00
(0.039)
10.16
(0.400)
4.57
(0.180)
13.34
(0.525)
7.11
(0.280)
28.45
(1.120)
0
2x∅
17.79
(0.700)
54321
13.76
(0.542)
1.78
4x
(0.070)
19.59
(0.771)
10 x ∅
DIMENSIONS ARE IN MILLIMETERS (INCHES)
Figure 7a. 2 x 5 pin module drawing.
14
1.07 –0.10
+0.000
(0.02 –0.004 )
AREA
FOR
PROCESS
PLUG
6 7 8 910
10.16
(0.400)
RX
0.46 ± 0.05
(0.018 ± 0.002)
13.00 ± 0.10
(0.512 ± 0.004)
14.20 ± 0.10
(0.559 ± 0.004)
AGILENT HFBR-5923L
850 nm LASER PROD
21CFR(J) CLASS 1
COUNTRY OF ORIGIN YYWW
XXXXXX
15.05
UNCOMPRESSED
(0.593)
13.59 MAX.
(0.535)
THERMOCOUPLE
TEST POINT
48.19
(1.897)
6.25 ± 0.05
(0.246 ± 0.002)
13.14
(0.517)
3.25
(0.128)
TX
9.80 MAX.
(0.39)
10.16
(0.400)
2.92 MIN.
(0.115)
11.3
UNCOMPRESSED
(0.445)
4x
14.68
(0.578)
1.00
(0.039)
10.16
(0.400)
4.57
(0.180)
13.34
(0.525)
7.11
(0.280)
28.45
(1.120)
0
2x∅
16.01
(0.630)
54321A
13.76
(0.542)
1.78
5x
(0.070)
19.59
(0.771)
12 x ∅
DIMENSIONS ARE IN MILLIMETERS (INCHES)
Figure 7b. 2 x 6 pin module drawing.
15
1.07 –0.10
+0.000
(0.02 –0.004 )
AREA
FOR
PROCESS
PLUG
6 7 8 910B
10.16
(0.400)
RX
0.46 ± 0.05
(0.018 ± 0.002)
13.00 ± 0.10
(0.512 ± 0.004)
14.20 ± 0.10
(0.559 ± 0.004)
∅ 0.00 M A
20x ∅ 0.81 ± 0.10
(0.032 ± 0.004)
25.75
(1.014)
∅ 0.00 M A
SEE NOTE 3
4x ∅ 1.40 ± 0.10 (NOTE 5)
(0.055 ± 0.004)
13.34
(0.525)
SEE DETAIL A
12.16
(0.479)
15.24 MINIMUM PITCH
(0.600)
5432 1
7.59
(0.299)
6 7 8 910
2x ∅ 2.29 MAX. (AREA FOR EYELETS)
(0.090)
10.16
(0.400)
2x ∅ 1.40 ± 0.10 (NOTE 4)
(0.055 ± 0.004)
3.00
(0.118)
∅ 0.00 M A
4.57 (0.180)
SEE DETAIL B
3.00
(0.118)
7.11 (0.280)
3.56
(0.140)
6.00
(0.236)
8.89 (0.350)
9x 1.78
(0.070)
DETAIL A (3x)
1.80
(0.071)
+1.50
–0
+0.059
(0.039 –0.000 )
1.00
(0.039)
1.00
DETAIL B (4x)
15.24
MIN. PITCH
(0.600)
A
14.22 ± 0.10
(0.560 ± 0.004)
A
10.16 ± 0.10
(0.400 ± 0.004)
A
TOP OF PCB
SECTION A-A
+0
15.75 –0.75
+0
(0.620 –0.030 )
NOTES
1.THIS PAGE DESCRIBES THE RECOMMENDED CIRCUIT BOARD LAYOUT AND FRONT PANEL OPENINGS FOR SFF TRANSCEIVERS.
2.THE HATCHED AREAS ARE KEEP-OUT AREAS RESERVED FOR HOUSING STANDOFFS. NO METAL TRACES ALLOWED IN KEEP-OUT AREAS.
3.THE BOARD FOR 2 x 6 PIN TRANSCEIVERS IS SHOWN. THE BOARD FOR 2 x 5 PIN TRANSCEIVERS LACKS HOLES FOR PIN A AND PIN B.
4.HOLES FOR MOUNTING STUDS MUST BE TIED TO CHASSIS GROUND.
5.HOLES FOR HOUSING LEADS MUST BE TIED TO SIGNAL GROUND.
6.DIMENSIONS ARE IN MILLIMETERS (INCHES).
Figure 7c. Recommended SFF host board and front panel layout.
16
∅ 0.00 M A
12 x ∅ 0.81 ± 0.10
(0.032 ± 0.004)
∅ 0.00 M A
28.45
(1.120)
4 x ∅ 1.40 ± 0.10 (NOTE 5)
(0.055 ± 0.004)
REFER TO DETAIL A
13.34
(0.525)
12.16
(0.479)
13.59
(0.535)
12.16
(0.479)
(N-1) x 13.97 PITCH
(0.550)
5432 1A
7.59
(0.299)
6 7 8 910 B
10.16
(0.400)
2x∅
REFER TO DETAIL B
2.29
MAX. (AREA FOR EYELETS)
(0.090)
7.11 (0.280)
5 x 1.78
(0.070)
4.57 (0.180)
3.00 (0.118)
2 x ∅ 1.40 ± 0.10 (NOTE 4)
(0.055 ± 0.004)
∅ 0.00 M A
2 x 3.00
(0.118)
24.89
(0.980)
2 x 6.00
(0.236)
32.97
(1.298)
DETAIL A
2.40
(0.094)
1.33
(0.052)
DETAIL B (4x)
+1.50
–0
+0.059
(0.039 –0
)
1.00
(N-1) x 13.97 + 14.22 ± 0.10
A
9.80 ± 0.10
(0.386 ± 0.004)
0.25
(0.010)
+0
TOP OF PCB
15.75 –0.75
+0
(0.620 –0.030 )
NOTES
1.THIS PAGE DESCRIBES AN ALTERNATE CIRCUIT BOARD LAYOUT AND FRONT PANEL OPENING FOR SFF TRANSCIEVERS.
THE TRANSCEIVERS' PITCH IS CLOSER, AND ALL TRANSCEIVERS SHARE ONE COMMON OPENING IN THE FRONT PANEL.
2.THE HATCHED AREAS ARE KEEP-OUT AREAS RESERVED FOR HOUSING STANDOFFS. NO METAL TRACES ALLOWED IN KEEP-OUT AREAS.
3.THE BOARD FOR 2 x 6 PIN TRANSCEIVERS IS SHOWN. THE BOARD FOR 2 x 5 PIN TRANSCEIVERS LACKS HOLES FOR PIN A AND PIN B.
4.HOLES FOR MOUNTING STUDS MUST BE TIED TO CHASSIS GROUND.
5.HOLES FOR HOUSING LEADS MUST BE TIED TO SIGNAL GROUND.
6. N IS THE NUMBER OF TRANSCEIVERS MOUNTED ON THE PCB.
7.DIMENSIONS ARE IN MILLIMETERS (INCHES)
Figure 7d. Alternate SFF host board and front panel layout (for closer pitch).
17
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Data subject to change.
Copyright © 2002 Agilent Technologies, Inc.
Obsoletes 5988-5054EN
October 30, 2002
5988-7821EN