Data Sheet A m p l i fy t h e H u m a n E x p e r i e n c e Comlinear CLC2058 ® Dual 4V to 36V Amplifier General Description APPLICATIONS n Active Filters n Audio Amplifiers n Audio AC-3 Decoder Systems n General purpose dual ampliifer Typical Application - 2nd Order Low-Pass Audio Filter The COMLINEAR CLC2058 is a dual voltage feedback amplifier that is internally frequency compensated to provide unity gain stability. The CLC2058 offers 3.5MHz of bandwidth at a gain of 2. The CLC2058 also features high gain, low input voltage noise, high input resistance, and superb channel separation making it well suited for audio filter applications in set-top-boxes, DVD players, and televisions. The COMLINEAR CLC2058 is designed to operate over a wide power supply voltage range, ±2V to ±18V (4V to 36V). It utilizes an industry standard dual amplifier pin-out and is available in a Pb-free, RoHS compliant SOIC-8 package. R1 20kΩ C1 150pF Rev 1A V EE =-12V C2 22µF/25V VIN R2 10kΩ C3 0.1µF R3 2(6) 3.3kΩ 4 CLC2058 3(5) C5 1000pF – + C4 22µF/25V 1(7) VOUT 8 R5 10kΩ R4 6.8kΩ V CC =+12V C6 0.1µF Ordering Information Part Number Package Pb-Free RoHS Compliant Operating Temperature Range Packaging Method CLC2058ISO8X SOIC-8 Yes Yes -40°C to +85°C Reel Moisture sensitivity level for all parts is MSL-1. ©2007-2009 CADEKA Microcircuits LLC Comlinear CLC2058 Dual 4V to 36V Amplifier FEATURES n Unity gain stable n 100dB voltage gain n 5.5MHz gain bandwidth product n 0.5MΩ input resistance n 100dB power supply rejection ratio n 95dB common mode rejection ratio n 4V to 36V single supply voltage range n ±2V to ±18V dual supply voltage range n Gain and phase match between amps n CLC2058: improved replacement for NJM4558 and MC1458 n CLC2058: Pb-free SOIC-8 www.cadeka.com Data Sheet CLC2058 Pin Configuration 8 +VS -IN1 2 7 OUT2 +IN1 3 6 -IN2 -V S 4 5 +IN2 Pin No. Pin Name Description 1 OUT1 Output, channel 1 2 -IN1 Negative input, channel 1 3 +IN1 Positive input, channel 1 4 -VS 5 +IN2 Positive input, channel 2 6 -IN2 Negative input, channel 2 7 OUT2 Output, channel 2 8 +VS Comlinear CLC2058 Dual 4V to 36V Amplifier OUT1 1 CLC2058 Pin Description Negative supply Positive supply Rev 1A ©2007-2009 CADEKA Microcircuits LLC www.cadeka.com 2 Data Sheet Absolute Maximum Ratings The safety of the device is not guaranteed when it is operated above the “Absolute Maximum Ratings”. The device should not be operated at these “absolute” limits. Adhere to the “Recommended Operating Conditions” for proper device function. The information contained in the Electrical Characteristics tables and Typical Performance plots reflect the operating conditions noted on the tables and plots. Min Max Unit 0 40 (±20) 60 (±30) 30 (±15) 500 V V V mW Supply Voltage Differential Input Voltage Input Voltage Power Dissipation (TA = 25°C) - SOIC-8 Comlinear CLC2058 Dual 4V to 36V Amplifier Parameter Reliability Information Parameter Junction Temperature Storage Temperature Range Lead Temperature (Soldering, 10s) Package Thermal Resistance SOIC-8 Min Typ -65 Max Unit 150 150 260 °C °C °C 100 °C/W Notes: Package thermal resistance (qJA), JDEC standard, multi-layer test boards, still air. Recommended Operating Conditions Parameter Operating Temperature Range Supply Voltage Range Min -40 4 (±2) Typ Max Unit +85 36 (±18) °C V Rev 1A ©2007-2009 CADEKA Microcircuits LLC www.cadeka.com 3 Data Sheet Electrical Characteristics TA = 25°C, +Vs = +15V, -Vs = -15V, Rf = Rg =2kΩ, RL = 2kΩ to VS/2, G = 2; unless otherwise noted. Symbol Parameter Conditions Min Typ Max Units Frequency Domain Response G = +1, VOUT = 0.2Vpp, VS = 5V, Rf = 0 Unity Gain Bandwidth BWSS -3dB Bandwidth BWLS Large Signal Bandwidth GBWP Gain-Bandwidth Product 4.62 MHz G = +1, VOUT = 0.2Vpp, VS = 30V, Rf = 0 4.86 MHz G = +2, VOUT = 0.2Vpp, VS = 5V 3.49 MHz G = +1, VOUT = 0.2Vpp, VS = 30V 3.55 MHz G = +2, VOUT = 1Vpp, VS = 5V 1.25 MHz G = +2, VOUT = 2Vpp, VS = 30V 0.74 MHz 5.5 MHz VOUT = 0.2V step; (10% to 90%), VS = 5V 100 ns VOUT = 0.2V step; (10% to 90%), VS = 30V 98 ns Time Domain Response tR, tF Rise and Fall Time OS Overshoot SR Slew Rate VOUT = 0.2V step 12 % 2V step, VS = 5V 2.6 V/µs 4V step, VS = 30V 2.8 V/µs 0.002 % > 1kHz, VS = 5V 10 nV/√Hz > 1kHz, VS = 30V 10 nV/√Hz Channel-to-channel, 500kHz 65 dB Distortion/Noise Response THD+N Total Harmonic Distortion plus Noise en Input Voltage Noise XTALK Crosstalk VOUT = 1VRMS, f = 1kHz, G = 2, RL = 10kΩ, VS = 30V DC Performance Input Offset Voltage (1) VS = 5V to 30V 1 5 mV Ib Input Bias Current (1) VCM = 0V 70 400 nA IOS Input Offset Current VCM = 0V 10 100 nA (1) PSRR Power Supply Rejection Ratio DC, RS ≤ 10kΩ 80 100 AOL Open-Loop Gain (1) RL = ≥2kΩ, VOUT = 1V to 11V 85 100 IS Supply Current Total, RL = ∞ (1) (1) 2.5 Rev 1A VIO dB dB 4.5 mA Input Characteristics CMIR Common Mode Input Range (1,3) CMRR Common Mode Rejection Ratio RIN Input Resistance (1) +VS = 30V DC, RS ≤ 10kΩ ±12 70 V 95 dB 0.5 MΩ 45 Ω V Output Characteristics ROUT Output Resistance VOUT Output Voltage Swing (1) ISOURCE Output Current, Sourcing VIN+ = 1V, VIN- = 0V, VOUT = 2V ISINK Output Current, Sinking VIN+ = 0V, VIN- = 1V, VOUT = 2V RL = 2kΩ ±10 ±13 RL = 10kΩ ±12 ±14 V 35 mA 60 mA Notes: 1. 100% tested at 25°C at VS = ±15V. ©2007-2009 CADEKA Microcircuits LLC www.cadeka.com Comlinear CLC2058 Dual 4V to 36V Amplifier UGBWSS 4 Data Sheet Typical Performance Characteristics TA = 25°C, +Vs = +15V, -Vs = -15V, Rf = Rg =2kΩ, RL = 2kΩ to VS/2, G = 2; unless otherwise noted. Non-Inverting Frequency Response Inverting Frequency Response G = -1 G=1 Rf = 0 0 0 Normalized Gain (dB) Normalized Gain (dB) 5 G=2 -5 G=5 G = 10 -10 G = -2 -5 G = -5 G = -10 -10 -15 -20 VOUT = 0.2Vpp -15 VOUT = 0.2Vpp -25 0.1 1 10 100 0.1 1 Frequency (MHz) -3dB Bandwidth vs. VOUT 5 5 0 4 -5 -3dB Bandwidth (MHz) Vout = 2Vpp Vout = 4Vpp -10 -15 3 2 Rev 1A Normalized Gain (dB) 10 Frequency (MHz) Large Signal Frequency Response 1 -20 -25 0 0.1 1 10 0.0 0.5 1.0 1.5 2.0 Frequency (MHz) 2.5 3.0 3.5 4.0 VOUT (VPP) Small Signal Pulse Response Large Signal Pulse Response 0.15 3 0.1 2 Output Voltage (V) Output Voltage (V) Comlinear CLC2058 Dual 4V to 36V Amplifier 5 0.05 0 -0.05 -0.1 1 0 -1 -2 -0.15 -3 0 2 4 6 Time (us) ©2007-2009 CADEKA Microcircuits LLC 8 10 0 2 4 6 8 10 www.cadeka.com 5 Time (us) Data Sheet Typical Performance Characteristics TA = 25°C, +Vs = +5V, -Vs = GND, Rf = Rg =2kΩ, RL = 2kΩ to VS/2, G = 2; unless otherwise noted. Non-Inverting Frequency Response Inverting Frequency Response G = -1 G=1 Rf = 0 0 0 Normalized Gain (dB) Normalized Gain (dB) 5 G=2 -5 G=5 G = 10 -10 G = -2 -5 G = -5 G = -10 -10 -15 -20 VOUT = 0.2Vpp -15 VOUT = 0.2Vpp -25 0.1 1 10 100 0.1 1 Frequency (MHz) -3dB Bandwidth vs. VOUT 5 5 0 4 -5 Vout = 2Vpp -10 -15 3 2 Rev 1A -3dB Bandwidth (MHz) Vout = 1Vpp Normalized Gain (dB) 10 Frequency (MHz) Large Signal Frequency Response 1 -20 -25 0 0.1 1 10 0.0 0.5 1.0 Frequency (MHz) 1.5 2.0 VOUT (VPP) Small Signal Pulse Response Large Signal Pulse Response 2.65 4 2.60 3.5 Output Voltage (V) Output Voltage (V) Comlinear CLC2058 Dual 4V to 36V Amplifier 5 2.55 2.50 2.45 2.40 3 2.5 2 1.5 2.35 1 0 2 4 6 Time (us) ©2007-2009 CADEKA Microcircuits LLC 8 10 0 2 4 6 8 10 www.cadeka.com 6 Time (us) Data Sheet Typical Performance Characteristics TA = 25°C, +Vs = +15V, -Vs = -15V, Rf = Rg =2kΩ, RL = 2kΩ to VS/2, G = 2; unless otherwise noted. Supply Current vs. Temperature 3.2 100 3 Supply Current (mA) 120 80 60 40 20 Comlinear CLC2058 Dual 4V to 36V Amplifier Open Loop Gain (db) Open Loop Voltage Gain vs. Frequency 2.8 2.6 2.4 2.2 RL=2K 0 2 0.001 0.01 0.1 1 10 100 1000 -40 -20 0 Frequency (KHz) 20 40 60 80 100 120 Temperature (°C) Maximum Output Voltage Swing vs. Frequency Maximum Output Voltage Swing vs. RL 20 16 Postive Voltage Swing Output Voltage Swing (V) 15 10 5 RL=2K, THD+N<5% 8 4 0 -4 Rev 1A Maximum Swing Voltage (V) 12 -8 Negative Voltage Swing -12 0 -16 0.1 1 10 100 0.1 1 Frequency (KHz) Input Offset Voltage vs. Temperature Input Bias Current vs. Temperature 5 120 4 100 Input Bias Current (nA) Input Offset Voltage (mV) 10 Resistance Load (KΩ) 3 2 1 0 80 60 40 20 -1 -2 0 -40 -20 0 20 40 60 Temperature (°C) ©2007-2009 CADEKA Microcircuits LLC 80 100 120 -40 -20 0 20 40 60 80 100 120 Temperature (°C) www.cadeka.com 7 Data Sheet Typical Performance Characteristics TA = 25°C, +Vs = +15V, -Vs = -15V, Rf = Rg =2kΩ, RL = 2kΩ to VS/2, G = 2; unless otherwise noted. Supply Voltage vs. Supply Current Crosstalk vs. Frequency -2.2 -50 -55 2.4 ICC ICC (mA) IEE (mA) 2.3 IEE 2.2 -2.4 Crosstalk (db) -60 -2.3 -65 -70 -75 2.1 -80 2 -2.5 2 4 6 8 10 12 Supply Voltage (+/-V) 14 16 18 -85 0.1 1.0 Frequency (MHz) Functional Block Diagram VCC - Input Rev 1A + Input Output VEE ©2007-2009 CADEKA Microcircuits LLC Comlinear CLC2058 Dual 4V to 36V Amplifier 2.5 www.cadeka.com 8 Data Sheet Application Information Power Dissipation Figures 1, 2, and 3 illustrate typical circuit configurations for non-inverting, inverting, and unity gain topologies for dual supply applications. They show the recommended bypass capacitor values and overall closed loop gain equations. Power dissipation should not be a factor when operating under the stated 2k ohm load condition. However, applications with low impedance, DC coupled loads should be analyzed to ensure that maximum allowed junction temperature is not exceeded. Guidelines listed below can be used to verify that the particular application will not cause the device to operate beyond it’s intended operating range. +Vs Input 6.8μF 0.1μF + Output - RL 0.1μF Rg Rf 6.8μF TJunction = TAmbient + (ӨJA × PD) G = 1 + (Rf/Rg) -Vs Figure 1. Typical Non-Inverting Gain Circuit +Vs R1 Rg PD = Psupply - Pload 0.1μF Supply power is calculated by the standard power equation. Output 0.1μF 6.8μF -Vs RL Power delivered to a purely resistive load is: G = - (Rf/Rg) For optimum input offset voltage set R1 = Rf || Rg 6.8μF The effective load resistor (Rloadeff) will need to include the effect of the feedback network. For instance, RL || (Rf + Rg) Output - RL 0.1μF 6.8μF -Vs Pload = ((VLOAD)RMS2)/Rloadeff Rloadeff in figure 3 would be calculated as: 0.1μF + Psupply = Vsupply × IRMS supply Vsupply = VS+ - VS- Rf Figure 2. Typical Inverting Gain Circuit Input In order to determine PD, the power dissipated in the load needs to be subtracted from the total power delivered by the supplies. 6.8μF - +Vs Where TAmbient is the temperature of the working environment. Rev 1A Input + Maximum power levels are set by the absolute maximum junction rating of 150°C. To calculate the junction temperature, the package thermal resistance value ThetaJA (ӨJA) is used along with the total die power dissipation. G=1 Figure 3. Unity Gain Circuit ©2007-2009 CADEKA Microcircuits LLC Comlinear CLC2058 Dual 4V to 36V Amplifier Basic Operation These measurements are basic and are relatively easy to perform with standard lab equipment. For design purposes however, prior knowledge of actual signal levels and load impedance is needed to determine the dissipated power. Here, PD can be found from PD = PQuiescent + PDynamic - PLoad Quiescent power can be derived from the specified IS values along with known supply voltage, VSupply. Load power www.cadeka.com 9 Data Sheet can be calculated as above with the desired signal amplitudes using: (VLOAD)RMS = VPEAK / √2 ( ILOAD)RMS = ( VLOAD)RMS / Rloadeff PDYNAMIC = (VS+ - VLOAD)RMS × ( ILOAD)RMS Assuming the load is referenced in the middle of the power rails or Vsupply/2. An overdrive condition is defined as the point when either one of the inputs or the output exceed their specified voltage range. Overdrive recovery is the time needed for the amplifier to return to its normal or linear operating point. The recovery time varies, based on whether the input or output is overdriven and by how much the range is exceeded. The CLC2058 will typically recover in less than 30ns from an overdrive condition. Figure 6 shows the CLC2058 in an overdriven condition. Figure 4 shows the maximum safe power dissipation in the package vs. the ambient temperature for the packages available. 10 Input 5 Input Voltage (V) 1.5 10 0 0 Output -5 1 Output Voltage (V) 2 Maximum Power Dissipation (W) 20 VIN = 7.5Vpp G=5 -10 SOIC-8 -10 0.5 -20 0 10 20 30 40 50 Time (us) Rev 1A 0 -40 -20 0 20 40 60 80 Ambient Temperature (°C) Figure 4. Maximum Power Derating Driving Capacitive Loads Increased phase delay at the output due to capacitive loading can cause ringing, peaking in the frequency response, and possible unstable behavior. Use a series resistance, RS, between the amplifier and the load to help improve stability and settling performance. Refer to Figure 5. Figure 6. Overdrive Recovery Layout Considerations General layout and supply bypassing play major roles in high frequency performance. CADEKA has evaluation boards to use as a guide for high frequency layout and as an aid in device testing and characterization. Follow the steps below as a basis for high frequency layout: • Include 6.8µF and 0.1µF ceramic capacitors for power supply decoupling • Place the 6.8µF capacitor within 0.75 inches of the power pin • Place the 0.1µF capacitor within 0.1 inches of the power pin Input + Rs Rf Output CL RL Rg • Remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitance • Minimize all trace lengths to reduce series inductances Figure 5. Addition of RS for Driving Capacitive Loads ©2007-2009 CADEKA Microcircuits LLC Refer to the evaluation board layouts below for more information. www.cadeka.com Comlinear CLC2058 Dual 4V to 36V Amplifier The dynamic power is focused primarily within the output stage driving the load. This value can be calculated as: Overdrive Recovery 10 Data Sheet Evaluation Board Information The following evaluation boards are available to aid in the testing and layout of these devices: Products Comlinear CLC2058 Dual 4V to 36V Amplifier Evaluation Board # CEB006 CLC2058 Evaluation Board Schematics Evaluation board schematics and layouts are shown in Figures 7-9. These evaluation boards are built for dual- supply operation. Follow these steps to use the board in a single-supply application: 1. Short -Vs to ground. Figure 8. CEB006 Top View 2. Use C3 and C4, if the -VS pin of the amplifier is not directly connected to the ground plane. Rev 1A Figure 9. CEB006 Bottom View Figure 7. CEB006 Schematic ©2007-2009 CADEKA Microcircuits LLC www.cadeka.com 11 Data Sheet Mechanical Dimensions SOIC-8 Package Comlinear CLC2058 Dual 4V to 36V Amplifier Rev 1A For additional information regarding our products, please visit CADEKA at: cadeka.com CADEKA Headquarters Loveland, Colorado T: 970.663.5452 T: 877.663.5452 (toll free) CADEKA, the CADEKA logo design, COMLINEAR, the COMLINEAR logo design, and ARCTIC are trademarks or registered trademarks of CADEKA Microcircuits LLC. All other brand and product names may be trademarks of their respective companies. CADEKA reserves the right to make changes to any products and services herein at any time without notice. CADEKA does not assume any responsibility or liability arising out of the application or use of any product or service described herein, except as expressly agreed to in writing by CADEKA; nor does the purchase, lease, or use of a product or service from CADEKA convey a license under any patent rights, copyrights, trademark rights, or any other of the intellectual property rights of CADEKA or of third parties. Copyright ©2007-2009 by CADEKA Microcircuits LLC. All rights reserved. A m p l i fy t h e H u m a n E x p e r i e n c e