Advance Data Sheet A m p l i fy t h e H u m a n E x p e r i e n c e Comlinear CLC1011, CLC2011, CLC4011 ® General Description FEATURES n 136μA supply current n 4.9MHz bandwidth n Output swings to within 20mV of either rail n Input voltage range exceeds the rail by >250mV n 5.3V/μs slew rate n 21nV/√Hz input voltage noise n 16mA output current n Fully specified at 2.7V and 5V supplies n CLC1011: Pb-free SOT23-5, SC70-5, SOIC-8 n CLC2011: Pb-free SOIC-8, MSOP-8 n CLC4011: Pb-free SOIC-14. TSSOP-14 The COMLINEAR CLC1011 (single), CLC2011 (dual), and CLC4011 (quad) are ultra-low cost, low power, voltage feedback amplifiers. At 5V, the CLCx011 family uses only 160μA of supply current per amplifier and are designed to operate from a supply range of 2.5V to 5.5V (±1.25 to ±2.75). The input voltage range exceeds the negative and positive rails. The CLCx011 family of amplifiers offer high bipolar performance at a low CMOS prices. They offer superior dynamic performance with 4.9MHz small signal bandwidths and 5.3V/μs slew rates. The combination of low power, high bandwidth, and rail-to-rail performance make the CLCx011 amplifiers well suited for battery-powered communication/computing systems Typical Performance Examples APPLICATIONS n Portable/battery-powered applications n PCMCIA, USB n Mobile communications, cell phones, pagers n ADC buffer n Active filters n Portable test instruments n Notebooks and PDA’s n Signal conditioning n Medical Equipment n Portable medical instrumentation Large Signal Frequency Response Output Swing vs. Load Magnitude (1dB/div) V o = 1Vpp V o = 4Vpp V o = 2Vpp Output Voltage (0.27V/div) 1.35 V s = 5V R L = 10kΩ R L = 1kΩ 0 R L = 75Ω R L = 100Ω R L = 200Ω R L = 75/100Ω -1.35 0.01 0.1 1 10 Frequency (MHz) -2.0 0 2.0 Input Voltage (0.4V/div) Ordering Information Package Pb-Free RoHS Compliant Operating Temperature Range Packaging Method CLC1011ISC5X* SC70-5 Yes Yes -40°C to +85°C Reel CLC1011IST5X* SOT23-5 Yes Yes -40°C to +85°C Reel CLC2011ISO8X* SOIC-8 Yes Yes -40°C to +85°C Reel CLC2011IMP8X* MSOP-8 Yes Yes -40°C to +85°C Reel CLC4011ISO14X* SOIC-14 Yes Yes -40°C to +85°C Reel CLC4011ITP14X* TSSOP-14 Yes Yes -40°C to +85°C Reel Rev 0.0.1 Part Number Moisture sensitivity level for all parts is MSL-1. *Advance Information. ©2009 CADEKA Microcircuits LLC Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers Low Power, Low Cost, Rail-to-Rail I/O Amplifiers www.cadeka.com Advance Data Sheet CLC1011 Pin Configuration 1 -V S 2 +IN +VS 5 + - 3 -IN 4 CLC2011 Pin Configuration OUT1 1 8 +VS -IN1 2 7 OUT2 +IN1 3 6 -IN2 -V S 4 5 +IN2 CLC4011 Pin Configuration OUT1 1 14 OUT4 -IN1 2 13 -IN4 +IN1 3 12 +IN4 +VS 4 11 -VS Pin No. Pin Name Description 1 OUT Output 2 -VS Negative supply 3 +IN Positive input 4 -IN Negative input 5 +VS Positive supply CLC2011 Pin Configuration Pin No. Pin Name 1 OUT1 Description Output, channel 1 2 -IN1 Negative input, channel 1 3 +IN1 Positive input, channel 1 4 -VS 5 +IN2 Negative supply Positive input, channel 2 6 -IN2 Negative input, channel 2 7 OUT2 Output, channel 2 8 +VS Positive supply CLC4011 Pin Configuration Pin No. Pin Name 1 OUT1 Description Output, channel 1 2 -IN1 Negative input, channel 1 3 +IN1 Positive input, channel 1 4 +VS Positive supply 5 +IN2 Positive input, channel 2 6 -IN2 Negative input, channel 2 7 OUT2 Output, channel 2 8 OUT3 Output, channel 3 +IN2 5 10 +IN3 -IN3 Negative input, channel 3 6 9 -IN3 9 -IN2 10 +IN3 Positive input, channel 3 7 8 OUT3 11 -VS 12 +IN4 Positive input, channel 4 13 -IN4 Negative input, channel 4 14 OUT4 Output, channel 4 OUT2 Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers OUT CLC1011 Pin Assignments Negative supply Rev 0.0.1 ©2009 CADEKA Microcircuits LLC www.cadeka.com 2 Advance Data Sheet Absolute Maximum Ratings The safety of the device is not guaranteed when it is operated above the “Absolute Maximum Ratings”. The device should not be operated at these “absolute” limits. Adhere to the “Recommended Operating Conditions” for proper device function. The information contained in the Electrical Characteristics tables and Typical Performance plots reflect the operating conditions noted on the tables and plots. Supply Voltage Input Voltage Range Continuous Output Current Min Max Unit 0 -Vs -0.5V -30 6 +Vs +0.5V 30 V V mA Reliability Information Parameter Min Junction Temperature Storage Temperature Range Lead Temperature (Soldering, 10s) Typ -65 Package Thermal Resistance 5-Lead SC70 5-Lead SOT23 8-Lead SOIC 8-Lead MSOP 14-Lead SOIC 14-Lead TSSOP Max Unit 175 150 260 °C °C °C TBD TBD TBD TBD TBD TBD °C/W °C/W °C/W °C/W °C/W °C/W Notes: Package thermal resistance (qJA), JDEC standard, multi-layer test boards, still air. ESD Protection Product Human Body Model (HBM) Charged Device Model (CDM) SC70-5 SOT23-5 SOIC-8 MSOP-8 SOIC-14 TSSOP-14 TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD Recommended Operating Conditions Parameter Min Operating Temperature Range Supply Voltage Range -40 2.5 Typ Max Unit +85 5.5 °C V Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers Parameter Rev 0.0.1 ©2009 CADEKA Microcircuits LLC www.cadeka.com 3 Advance Data Sheet Electrical Characteristics at +2.7V TA = 25°C, Vs = +2.7V, Rf = Rg =5kΩ, RL = 10kΩ to VS/2, G = 2; unless otherwise noted. Symbol Parameter Conditions Min Typ Max Units Frequency Domain Response Unity Gain -3dB Bandwidth G = +1, VOUT = 0.02Vpp 4.9 MHz BWSS -3dB Bandwidth BWLS Large Signal Bandwidth G = +2, VOUT = 0.2Vpp 3.7 MHz G = +2, VOUT = 2Vpp 1.4 GBWP Gain Bandwdith Product MHz G = +11, VOUT = 0.2Vpp 2.2 MHz Time Domain Response tR, tF Rise and Fall Time VOUT = 1V step; (10% to 90%) 163 ns OS Overshoot VOUT = 1V step <1 % SR Slew Rate 1V step 5.3 V/µs -72 dBc dBc Distortion/Noise Response HD2 2nd Harmonic Distortion VOUT = 1Vpp, 10kHz HD3 3rd Harmonic Distortion VOUT = 1Vpp, 10kHz -72 THD Total Harmonic Distortion VOUT = 1Vpp, 10kHz 0.03 % en Input Voltage Noise > 10kHz 21 nV/√Hz DC Performance VIO dVIO Ib dIb Input Offset Voltage (1) -6 Average Drift 6 5 Input Bias Current (1) 90 Average Drift mV µV/°C 420 nA 32 pA/°C 83 dB VOUT = VS / 2 90 dB per channel 136 Non-inverting 12 MΩ PSRR Power Supply Rejection Ratio (1) DC AOL Open-Loop Gain IS Supply Current (1) 0.5 55 190 μA Input Characteristics RIN Input Resistance CIN Input Capacitance CMIR Common Mode Input Range CMRR Common Mode Rejection Ratio (1) 2 pF -0.25 to 2.95 V 55 81 dB 0.06 to 2.64 0.02 to 2.68 V RL = 1kΩ to VS / 2 0.05 to 2.63 V RL = 200Ω to VS / 2 0.11 to 2.52 V ±16 mA DC Output Characteristics RL = 10kΩ to VS / 2 (1) VOUT IOUT Output Voltage Swing Output Current Notes: 1. 100% tested at 25°C Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers UGBWSS Rev 0.0.1 ©2009 CADEKA Microcircuits LLC www.cadeka.com 4 Advance Data Sheet Electrical Characteristics at +5V TA = 25°C, Vs = +5V, Rf = Rg =5kΩ, RL = 10kΩ to VS/2, G = 2; unless otherwise noted. Symbol Parameter Conditions Min Typ Max Units Frequency Domain Response Unity Gain -3dB Bandwidth G = +1, VOUT = 0.02Vpp 4.3 MHz BWSS -3dB Bandwidth G = +2, VOUT = 0.2Vpp 3.0 MHz BWLS Large Signal Bandwidth G = +2, VOUT = 2Vpp 2.3 MHz GBWP Gain Bandwdith Product G = +11, VOUT = 0.2Vpp 2.0 MHz Time Domain Response tR, tF Rise and Fall Time VOUT = 1V step; (10% to 90%) 110 ns OS Overshoot VOUT = 1V step <1 % SR Slew Rate 1V step 9 V/µs -73 dBc dBc Distortion/Noise Response HD2 2nd Harmonic Distortion VOUT = 1Vpp, 10kHz HD3 3rd Harmonic Distortion VOUT = 1Vpp, 10kHz -75 THD Total Harmonic Distortion VOUT = 1Vpp, 10kHz 0.03 % en Input Voltage Noise > 10kHz 22 nV/√Hz DC Performance VIO dVIO Ib dIb Input Offset Voltage (1) -8 Average Drift 8 15 Input Bias Current (1) 90 Average Drift mV µV/°C 450 nA 40 pA/°C 60 dB VOUT = VS / 2 80 dB per channel 160 Non-inverting 12 MΩ PSRR Power Supply Rejection Ratio (1) DC AOL Open-Loop Gain IS Supply Current (1) 1.5 40 235 μA Input Characteristics RIN Input Resistance CIN Input Capacitance CMIR Common Mode Input Range CMRR Common Mode Rejection Ratio (1) 2 pF -0.25 to 5.25 V 58 85 dB 0.08 to 4.92 0.04 to 4.96 V RL = 1kΩ to VS / 2 0.07 to 4.9 V RL = 200Ω to VS / 2 0.14 to 4.67 V ±30 mA DC Output Characteristics RL = 10kΩ to VS / 2 (1) VOUT IOUT Output Voltage Swing Output Current Notes: 1. 100% tested at 25°C Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers UGBWSS Rev 0.0.1 ©2009 CADEKA Microcircuits LLC www.cadeka.com 5 Advance Data Sheet Typical Performance Characteristics TA = 25°C, Vs = +2.7V, Rf = Rg =5kΩ, RL = 10kΩ to VS/2, G = 2; unless otherwise noted. Normalized Magnitude (1dB/div) V o = 0.2Vpp Inverting Frequency Response at VS = 5V G=1 Rf = 0 G=2 R f = 5kΩ R f = 5kΩ G=5 R f = 5kΩ 0.01 0.1 1 V o = 0.2Vpp R f = 5kΩ R f = 5kΩ R f = 5kΩ R f = 5kΩ 0.01 10 0.1 V o = 0.2Vpp G=1 Rf = 0 G=2 R f = 5kΩ R f = 5kΩ G=5 R f = 5kΩ 1 10 R f = 5kΩ G = -2 G = -5 0.01 CL R s = 0Ω Magnitude (1dB/div) Magnitude (1dB/div) CL R s = 100Ω CL R s = 0Ω Rs CL 5kΩ 1 10 Frequency Response vs. RL CL R s = 0Ω - 0.1 Frequency (MHz) Frequency Response vs. CL + G = -1 G = -10 Frequency (MHz) V o = 0.05V 10 Inverting Frequency Response Normalized Magnitude (1dB/div) Normalized Magnitude (1dB/div) Non-Inverting Frequency Response 0.1 1 Frequency (MHz) Frequency (MHz) 0.01 Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers Normalized Magnitude (1dB/div) Non-Inverting Frequency Response at VS = 5V RL = 1kΩ RL = 10kΩ RL = 200Ω RL = 50Ω RL 5kΩ 0.01 0.1 1 ©2009 CADEKA Microcircuits LLC 0.01 0.1 1 10 Frequency (MHz) www.cadeka.com Rev 0.0.1 Frequency (MHz) 10 6 Advance Data Sheet Typical Performance Characteristics TA = 25°C, Vs = +2.7V, Rf = Rg =5kΩ, RL = 10kΩ to VS/2, G = 2; unless otherwise noted. Frequency Response vs. VOUT Open Loop Gain & Phase vs. Frequency Open Loop Gain (dB) V o = 4Vpp V o = 2Vpp No load 100 80 60 0 40 -45 20 -90 0 R L = 10kΩ -135 No load -20 0.01 0.1 1 -180 10 0 10 10 1 10 2 -20 -20 -30 -30 -40 -40 -50 50kHz 100kHz 50kHz 10 6 10 7 10 8 50kHz -50 100kHz -60 20kHz -70 -80 10kHz -90 -90 0.5 1 1.5 2 0.5 2.5 Output Amplitude (Vpp) -20 1.5 2 2.5 Input Voltage Noise 55 V o = 1Vpp R L = 200Ω 50 R L = 200Ω R L = 1kΩ -50 45 nV/√Hz -30 -40 1 Output Amplitude (Vpp) 2nd & 3rd Harmonic Distortion Distortion (dBc) 10 5 10kHz 10kHz, 20kHz -80 10 4 3rd Harmonic Distortion vs. VOUT Distortion (dB) Distortion (dB) 2nd Harmonic Distortion vs. VOUT -70 10 3 Frequency (Hz) Frequency (MHz) -60 Open Loop Phase (deg) V o = 1Vpp Magnitude (1dB/div) V s = 5V 120 R L = 10kΩ R L = 10kΩ -60 -70 40 35 30 25 20 15 10 -80 R L = 10kΩ -90 0 20 40 60 ©2009 CADEKA Microcircuits LLC 80 5 0 100 0.1k 1k 10k 100k 1M Frequency (Hz) Rev 0.0.1 Frequency (kHz) R L = 1kΩ Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers 140 V s = 5V www.cadeka.com 7 Advance Data Sheet Typical Performance Characteristics - Continued TA = 25°C, Vs = ±5V, Rf = Rg =150Ω, RL = 150Ω, G = 2; unless otherwise noted. PSRR 0 -10 -20 -20 -30 -30 PSRR (dB) 0 -10 -40 -50 -60 -40 -50 -60 -70 -70 -80 -80 -90 -90 10 100 1000 10000 100000 Frequency (Hz) Output Voltage (0.27V/div) 100 1000 10000 100000 Frequency (Hz) Output Swing vs. Load 1.35 10 Pulse Response vs. Common Mode Voltage R L = 10kΩ R L = 1kΩ 0 R L = 75Ω R L = 100Ω R L = 200Ω R L = 75/100Ω -1.35 -2.0 0 2.0 Input Voltage (0.4V/div) Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers CMRR (dB) CMRR Rev 0.0.1 ©2009 CADEKA Microcircuits LLC www.cadeka.com 8 Advance Data Sheet Power Dissipation General Description Power dissipation should not be a factor when operating under the stated 10k ohm load condition. However, applications with low impedance, DC coupled loads should be analyzed to ensure that maximum allowed junction temperature is not exceeded. Guidelines listed below can be used to verify that the particular application will not cause the device to operate beyond it’s intended operating range. The CLCx011 family of amplifiers are single supply, general purpose, voltage-feedback amplifiers. They are fabricated on a complimentary bipolar process, feature a rail-to-rail input and output, and are unity gain stable. Basic Operation Figures 1, 2, and 3 illustrate typical circuit configurations for non-inverting, inverting, and unity gain topologies for dual supply applications. They show the recommended bypass capacitor values and overall closed loop gain equations. +Vs 6.8μF Maximum power levels are set by the absolute maximum junction rating of 150°C. To calculate the junction temperature, the package thermal resistance value ThetaJA (ӨJA) is used along with the total die power dissipation. TJunction = TAmbient + (ӨJA × PD) Where TAmbient is the temperature of the working environment. Input 0.1μF + Output - RL 0.1μF Rg PD = Psupply - Pload Rf 6.8μF G = 1 + (Rf/Rg) -Vs Figure 1. Typical Non-Inverting Gain Circuit +Vs In order to determine PD, the power dissipated in the load needs to be subtracted from the total power delivered by the supplies. Supply power is calculated by the standard power equation. Psupply = Vsupply × IRMS supply Vsupply = VS+ - VS- 6.8μF Power delivered to a purely resistive load is: R1 Input Rg Pload = ((VLOAD)RMS2)/Rloadeff 0.1μF + Output 0.1μF 6.8μF -Vs RL Rf Rloadeff in figure 3 would be calculated as: RL || (Rf + Rg) G = - (Rf/Rg) For optimum input offset voltage set R1 = Rf || Rg Figure 2. Typical Inverting Gain Circuit +Vs Input 6.8μF Output - RL -Vs (VLOAD)RMS = VPEAK / √2 G=1 Figure 3. Unity Gain Circuit ©2009 CADEKA Microcircuits LLC Quiescent power can be derived from the specified IS values along with known supply voltage, VSupply. Load power can be calculated as above with the desired signal amplitudes using: ( ILOAD)RMS = ( VLOAD)RMS / Rloadeff www.cadeka.com 9 Rev 0.0.1 0.1μF 6.8μF These measurements are basic and are relatively easy to perform with standard lab equipment. For design purposes however, prior knowledge of actual signal levels and load impedance is needed to determine the dissipated power. Here, PD can be found from PD = PQuiescent + PDynamic - PLoad 0.1μF + The effective load resistor (Rloadeff) will need to include the effect of the feedback network. For instance, Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers Application Information Advance Data Sheet The dynamic power is focused primarily within the output stage driving the load. This value can be calculated as: PDYNAMIC = (VS+ - VLOAD)RMS × ( ILOAD)RMS Figure 4 shows the maximum safe power dissipation in the package vs. the ambient temperature for the packages available. Input + Rs - Output CL Rf RL Rg Figure 6. Addition of RS for Driving Capacitive Loads Table 1 provides the recommended RS for various capacitive loads. The recommended RS values result in approximately <1dB peaking in the frequency response. The Frequency Response vs. CL plot, on page 6, illustrates the response of the CLCx011. Figure 4. Maximum Power Derating CL (pF) RS (Ω) -3dB BW (kHz) 10pF 0 2.2 20pF 0 2.4 50pF 0 2.5 100pF 100 2 Table 1: Recommended RS vs. CL Input Common Mode Voltage The common mode input range extends to 250mV below ground and to 250mV above Vs, in single supply operation. Exceeding these values will not cause phase reversal. However, if the input voltage exceeds the rails by more than 0.5V, the input ESD devices will begin to conduct. The output will stay at the rail during this overdrive condition. If the absolute maximum input voltage (700mV beyond either rail) is exceeded, externally limit the input current to ±5mA as shown in Figure 5. 10k Input Output For a given load capacitance, adjust RS to optimize the tradeoff between settling time and bandwidth. In general, reducing RS will increase bandwidth at the expense of additional overshoot and ringing. Overdrive Recovery An overdrive condition is defined as the point when either one of the inputs or the output exceed their specified voltage range. Overdrive recovery is the time needed for the amplifier to return to its normal or linear operating point. The recovery time varies, based on whether the input or output is overdriven and by how much the range is exceeded. The CLCx011 will typically recover in less than 50ns from an overdrive condition. Figure 7 shows the CLC1011 in an overdriven condition. Figure 5. Circuit for Input Current Protection Rev 0.0.1 Driving Capacitive Loads Increased phase delay at the output due to capacitive loading can cause ringing, peaking in the frequency response, ©2009 CADEKA Microcircuits LLC Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers Assuming the load is referenced in the middle of the power rails or Vsupply/2. and possible unstable behavior. Use a series resistance, RS, between the amplifier and the load to help improve stability and settling performance. Refer to Figure 6. www.cadeka.com 10 Advance Data Sheet Evaluation Board Schematics 1. Short -Vs to ground. 2. Use C3 and C4, if the -VS pin of the amplifier is not directly connected to the ground plane. Figure 7. Overdrive Recovery Layout Considerations General layout and supply bypassing play major roles in high frequency performance. CADEKA has evaluation boards to use as a guide for high frequency layout and as an aid in device testing and characterization. Follow the steps below as a basis for high frequency layout: • Include 6.8µF and 0.1µF ceramic capacitors for power supply decoupling • Place the 6.8µF capacitor within 0.75 inches of the power pin • Place the 0.1µF capacitor within 0.1 inches of the power pin • Remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitance Figure 8. CEB002 Schematic • Minimize all trace lengths to reduce series inductances Refer to the evaluation board layouts below for more information. Evaluation Board Information The following evaluation boards are available to aid in the testing and layout of these devices: Evaluation Board # CLC1011 in SC70 CLC1011 in SOT23 CLC2011 in SOIC CLC2011 in MSOP CLC4011 in SOIC CLC4011 in TSSOP ©2009 CADEKA Microcircuits LLC Rev 0.0.1 CEB011 CEB002 CEB006 CEB010 CEB018 CEB017 Products Figure 9. CEB002 Top View www.cadeka.com Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers Evaluation board schematics and layouts are shown in Figures 8-14. These evaluation boards are built for dual- supply operation. Follow these steps to use the board in a single-supply application: 11 Advance Data Sheet Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers Figure 10. CEB002 Bottom View Figure 12. CEB006 Top View Figure 13. CEB006 Bottom View Figure 11. CEB006 Schematic Rev 0.0.1 ©2009 CADEKA Microcircuits LLC www.cadeka.com 12 Advance Data Sheet Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers Figure 16. CEB018 Bottom View Figure 14. CEB018 Schematic Figure 15. CEB018 Top View Rev 0.0.1 ©2009 CADEKA Microcircuits LLC www.cadeka.com 13 Advance Data Sheet Mechanical Dimensions SOT23-5 Package Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers SOIC-8 Package Rev 0.0.1 ©2009 CADEKA Microcircuits LLC www.cadeka.com 14 Advance Data Sheet Mechanical Dimensions continued SOIC-14 Package Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers Rev 0.0.1 ©2009 CADEKA Microcircuits LLC www.cadeka.com 15 Advance Data Sheet Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers For additional information regarding our products, please visit CADEKA at: cadeka.com Rev 0.0.1 CADEKA Headquarters Loveland, Colorado T: 970.663.5452 T: 877.663.5452 (toll free) CADEKA, the CADEKA logo design, COMLINEAR, the COMLINEAR logo design, and ARCTIC are trademarks or registered trademarks of CADEKA Microcircuits LLC. All other brand and product names may be trademarks of their respective companies. CADEKA reserves the right to make changes to any products and services herein at any time without notice. CADEKA does not assume any responsibility or liability arising out of the application or use of any product or service described herein, except as expressly agreed to in writing by CADEKA; nor does the purchase, lease, or use of a product or service from CADEKA convey a license under any patent rights, copyrights, trademark rights, or any other of the intellectual property rights of CADEKA or of third parties. Copyright ©2009 by CADEKA Microcircuits LLC. All rights reserved. A m p l i fy t h e H u m a n E x p e r i e n c e