Data Sheet A m p l i fy t h e H u m a n E x p e r i e n c e Comlinear CLC1605, CLC3605 ® Single and Triple, 1.5GHz Amplifiers The COMLINEAR CLC1605 (single) and CLC3605 (triple) are high-performance, current feedback amplifiers that provide 1.5GHz unity gain bandwidth, ±0.1dB gain flatness to 120MHz, and 2,500V/μs slew rate. This high performance exceeds the requirements of high-definition television (HDTV) and other multimedia applications. These COMLINEAR high-performance amplifiers also provide ample output current to drive multiple video loads. The COMLINEAR CLC1605 and CLC3605 are designed to operate from ±5V or +5V supplies. The CLC3605 offers a fast enable/disable feature to save power. While disabled, the outputs are in a high-impedance state to allow for multiplexing applications. The combination of high-speed, low-power, and excellent video performance make these amplifiers well suited for use in many general purpose, high-speed applications including high-definition video, imaging applications, and radar/communications receivers. Applications n RGB video line drivers n High definition video driver n Video switchers and routers n ADC buffer n Active filters n High-speed instrumentation n Wide dynamic range IF amp n Radar/communication receivers Typical Application - Driving Dual Video Loads +Vs 75Ω Cable Input 75Ω 75Ω Cable Output A 75Ω 75Ω Rf Rg 75Ω Cable Output B 75Ω -Vs Ordering Information Part Number Package Pb-Free RoHS Compliant Operating Temperature Range Packaging Method CLC1605IST5X SOT23-5 Yes Yes -40°C to +85°C Reel CLC3605ISO16X SOIC-16 Yes Yes -40°C to +85°C Reel CLC3605ISO16 SOIC-16 Yes Yes -40°C to +85°C Rail Moisture sensitivity level for all parts is MSL-1. ©2007-2008 CADEKA Microcircuits LLC www.cadeka.com Rev 1A 75Ω Comlinear CLC1605, CLC3605 Single and Triple, 1.5GHz Amplifiers General Description features n 0.1dB gain flatness to 120MHz n 0.01%/0.01˚ differential gain/phase n 1.2GHz -3dB bandwidth at G = 2 n 700MHz large signal bandwidth n 2,500V/μs slew rate n 3.7nV/√Hz input voltage noise n 120mA output current n Triple offers disable n Fully specified at 5V and ±5V supplies n CLC1605: Pb-free SOT23-5 n CLC3605: Pb-free SOIC-16 Data Sheet CLC1605 Pin Configuration 1 -V S 2 +IN 3 +VS 5 + -IN 4 Pin No. Pin Name Description 1 OUT Output 2 -VS Negative supply 3 +IN Positive input 4 -IN Negative input 5 +VS Positive supply CLC3605 Pin Configuration CLC3605 Pin Configuration -IN1 1 16 DIS1 +IN1 2 15 OUT1 -VS 3 14 +VS -IN2 4 13 DIS2 Pin No. Pin Name 1 -IN1 Description Negative input, channel 1 2 +IN1 Positive input, channel 1 3 -VS Negative supply 4 -IN2 Negative input, channel 2 5 +IN2 Positive input, channel 2 6 -VS 7 +IN3 Positive input, channel 3 8 -IN3 Negative input, channel 3 9 DIS3 Disable pin. Enabled if pin is grounded, left floating or pulled below VON, disabled if pin is pulled above VOFF. OUT3 Output, channel 3 Negative supply +IN2 5 12 OUT2 -VS 6 11 +VS 10 +IN3 7 10 OUT3 11 +VS 12 OUT2 Output, channel 2 13 DIS2 Disable pin. Enabled if pin is grounded, left floating or pulled below VON, disabled if pin is pulled above VOFF. 14 +VS Positive supply 15 OUT1 Output, channel 1 16 DIS1 Disable pin. Enabled if pin is grounded, left floating or pulled below VON, disabled if pin is pulled above VOFF. -IN3 8 9 DIS3 Positive supply Comlinear CLC1605, CLC3605 Single and Triple, 1.5GHz Amplifiers OUT CLC1605 Pin Assignments Rev 1A Disable Pin Truth Table Pin High Low* DIS Disabled Enabled *Default Open State ©2007-2008 CADEKA Microcircuits LLC www.cadeka.com 2 Data Sheet Absolute Maximum Ratings The safety of the device is not guaranteed when it is operated above the “Absolute Maximum Ratings”. The device should not be operated at these “absolute” limits. Adhere to the “Recommended Operating Conditions” for proper device function. The information contained in the Electrical Characteristics tables and Typical Performance plots reflect the operating conditions noted on the tables and plots. Supply Voltage Input Voltage Range Continuous Output Current Min Max Unit 0 -Vs -0.5V 14 +Vs +0.5V 120 V V mA Comlinear CLC1605, CLC3605 Single and Triple, 1.5GHz Amplifiers Parameter Reliability Information Parameter Junction Temperature Storage Temperature Range Lead Temperature (Soldering, 10s) Package Thermal Resistance 5-Lead SOT23 16-Lead SOIC Min Typ -65 Max Unit 150 150 260 °C °C °C 221 68 °C/W °C/W Notes: Package thermal resistance (qJA), JDEC standard, multi-layer test boards, still air. ESD Protection Product SOT23-5 SOIC-16 2kV 1kV 2kV 1kV Human Body Model (HBM) Charged Device Model (CDM) Recommended Operating Conditions Parameter Min Operating Temperature Range Supply Voltage Range -40 4.5 Typ Max Unit +85 12 °C V Rev 1A ©2007-2008 CADEKA Microcircuits LLC www.cadeka.com 3 Data Sheet Electrical Characteristics at +5V TA = 25°C, Vs = +5V, Rf = Rg =330Ω, RL = 150Ω to VS/2, G = 2; unless otherwise noted. Symbol Parameter Conditions Min Typ Max Units Frequency Domain Response Unity Gain Bandwidth G = +1, VOUT = 0.5Vpp, Rf = 499Ω 1250 MHz BWSS -3dB Bandwidth G = +2, VOUT = 0.5Vpp 1000 MHz BWLS Large Signal Bandwidth G = +2, VOUT = 1Vpp 825 MHz BW0.1dBSS 0.1dB Gain Flatness G = +2, VOUT = 0.5Vpp 100 MHz BW0.1dBLS 0.1dB Gain Flatness G = +2, VOUT = 1Vpp 100 MHz Time Domain Response tR, tF Rise and Fall Time VOUT = 1V step; (10% to 90%) 0.6 ns tS Settling Time to 0.1% VOUT = 1V step 10 ns OS Overshoot VOUT = 0.2V step 1 % SR Slew Rate 2V step 1350 V/µs Distortion/Noise Response HD2 2nd Harmonic Distortion VOUT = 1Vpp, 5MHz -75 dBc HD3 3rd Harmonic Distortion VOUT = 1Vpp, 5MHz -85 dBc THD Total Harmonic Distortion VOUT = 1Vpp, 5MHz 74 dB DG Differential Gain NTSC (3.58MHz), AC-coupled, RL = 150Ω 0.04 % DP Differential Phase NTSC (3.58MHz), AC-coupled, RL = 150Ω 0.01 ° IP3 Third Order Intercept VOUT = 1Vpp, 10MHz 37 dBm SFDR Spurious Free Dynamic Range VOUT = 1Vpp, 5MHz 61 dBc en Input Voltage Noise > 1MHz 3.7 nV/√Hz in Input Current Noise > 1MHz, Inverting 20 pA/√Hz > 1MHz, Non-Inverting 30 pA/√Hz XTALK Crosstalk Channel-to-channel 5MHz, VOUT = 2Vpp 60 dB DC Performance VIO Input Offset Voltage 0 mV dVIO Average Drift 1.6 µV/°C Ibn dIbn Ibi dIbi Input Bias Current - Non-Inverting Average Drift Input Bias Current - Inverting Average Drift 3 µA 7 nA/°C 6 µA 20 nA/°C PSRR Power Supply Rejection Ratio DC 58 dB IS Supply Current per channel 11 mA ns Disable Characteristics - CLC3605 only Turn On Time 23 TOFF Turn Off Time 350 ns OFFIOS Off Isolation 5MHz, VOUT = 2Vpp 75 dB VOFF Power Down Input Voltage DIS pin, disabled if pin is pulled above VOFF Disabled if DIS > 1.5V V VON Enable Input Voltage DIS pin, enabled if pin is grounded, left open or pulled below VON Enabled if DIS < 0.5V V ISD Disable Supply Current DIS pin is pulled to VS 0.09 mA Non-inverting 150 kΩ Inverting 70 Ω 1.0 pF 1.5 to 3.5 V 50 dB Rev 1A TON Input Characteristics RIN Input Resistance CIN Input Capacitance CMIR Common Mode Input Range CMRR Common Mode Rejection Ratio ©2007-2008 CADEKA Microcircuits LLC DC www.cadeka.com Comlinear CLC1605, CLC3605 Single and Triple, 1.5GHz Amplifiers UGBW 4 Data Sheet Electrical Characteristics at +5V continued TA = 25°C, Vs = +5V, Rf = Rg =330Ω, RL = 150Ω to VS/2, G = 2; unless otherwise noted. Symbol Parameter Conditions Min Typ Max Units Output Characteristics Output Resistance Closed Loop, DC VOUT Output Voltage Swing RL = 150Ω IOUT Output Current 0.1 Ω 1.5 to 3.5 V ±120 mA Comlinear CLC1605, CLC3605 Single and Triple, 1.5GHz Amplifiers RO Notes: 1. 100% tested at 25°C Rev 1A ©2007-2008 CADEKA Microcircuits LLC www.cadeka.com 5 Data Sheet Electrical Characteristics at ±5V TA = 25°C, Vs = ±5V, Rf = Rg =330Ω, RL = 150Ω to GND, G = 2; unless otherwise noted. Symbol Parameter Conditions Min Typ Max Units Frequency Domain Response Unity Gain Bandwidth G = +1, VOUT = 0.5Vpp, Rf = 499Ω 1500 MHz BWSS -3dB Bandwidth G = +2, VOUT = 0.5Vpp 1200 MHz BWLS Large Signal Bandwidth G = +2, VOUT = 2Vpp 700 MHz BW0.1dBSS 0.1dB Gain Flatness G = +2, VOUT = 0.5Vpp 120 MHz BW0.1dBLS 0.1dB Gain Flatness G = +2, VOUT = 2Vpp 120 MHz 0.65 ns ns Time Domain Response tR, tF Rise and Fall Time VOUT = 2V step; (10% to 90%) tS Settling Time to 0.1% VOUT = 2V step 13 OS Overshoot VOUT = 0.2V step 1 % SR Slew Rate 2V step 2500 V/µs Distortion/Noise Response HD2 2nd Harmonic Distortion VOUT = 2Vpp, 5MHz -73 dBc HD3 3rd Harmonic Distortion VOUT = 2Vpp, 5MHz -85 dBc THD Total Harmonic Distortion VOUT = 2Vpp, 5MHz 72 dB DG Differential Gain NTSC (3.58MHz), AC-coupled, RL = 150Ω 0.01 % DP Differential Phase NTSC (3.58MHz), AC-coupled, RL = 150Ω 0.01 ° IP3 Third Order Intercept VOUT = 2Vpp, 10MHz 42 dBm SFDR Spurious Free Dynamic Range VOUT = 1Vpp, 5MHz 73 dBc en Input Voltage Noise > 1MHz 3.7 nV/√Hz in Input Current Noise > 1MHz, Inverting 20 pA/√Hz > 1MHz, Non-Inverting 30 pA/√Hz XTALK Crosstalk Channel-to-channel 5MHz 60 dB DC Performance VIO dVIO Ibn dIbn Ibi dIbi Input Offset Voltage (1) -10 Average Drift 0 10 1.6 Input Bias Current - Non-Inverting (1) -40 Average Drift 19 40 7 Input Bias Current - Inverting (1) -35 Average Drift Power Supply Rejection Ratio (1) DC IS Supply Current (1) per channel 40 µA nA/°C 6 35 20 PSRR mV µV/°C µA nA/°C 60 dB 12 18 mA Disable Characteristics - CLC3605 only Turn On Time 35 TOFF Turn Off Time 410 ns ns OFFIOS Off Isolation 5MHz, VOUT = 2Vpp 75 dB VOFF Power Down Input Voltage DIS pin, disabled if pin is pulled above VOFF Disabled if DIS > 3V V VON Enable Input Voltage DIS pin, enabled if pin is grounded, left open or pulled below VON Enabled if DIS < 1V V ISD Disable Supply Current (1) per channel, DIS pin is pulled to VS 0.1 Non-inverting 150 Inverting 70 Ω 1.0 pF 0.3 Rev 1A TON mA Input Characteristics RIN Input Resistance CIN Input Capacitance CMIR Common Mode Input Range CMRR Common Mode Rejection Ratio (1) ©2007-2008 CADEKA Microcircuits LLC DC 40 kΩ ±4.0 V 55 dB www.cadeka.com Comlinear CLC1605, CLC3605 Single and Triple, 1.5GHz Amplifiers UGBW 6 Data Sheet Electrical Characteristics at ±5V continued TA = 25°C, Vs = ±5V, Rf = Rg =330Ω, RL = 150Ω to GND, G = 2; unless otherwise noted. Symbol Parameter Conditions Min Typ Max Units Output Characteristics Output Resistance Closed Loop, DC VOUT Output Voltage Swing RL = 150Ω IOUT Output Current (1) 0.1 ±3.0 Ω ±3.8 V ±280 mA Comlinear CLC1605, CLC3605 Single and Triple, 1.5GHz Amplifiers RO Notes: 1. 100% tested at 25°C Rev 1A ©2007-2008 CADEKA Microcircuits LLC www.cadeka.com 7 Data Sheet Typical Performance Characteristics TA = 25°C, Vs = ±5V, Rf = Rg =330Ω, RL = 150Ω to GND, G = 2; unless otherwise noted. Non-Inverting Frequency Response Normalized Gain (dB) G=2 G=5 G = 10 -6 G = -2 -1 0 -3 G = -1 0 G=1 Rf = 750Ω G = -5 -2 -3 G = -10 -4 -5 -6 VOUT = 0.5Vpp -9 VOUT = 0.5Vpp -7 0.1 1 10 100 1000 0.1 1 Frequency (MHz) 100 1000 Frequency Response vs. RL 1 5 4 0 3 CL = 1000pF Rs = 3.3Ω -1 Normalized Gain (dB) Normalized Gain (dB) 10 Frequency (MHz) Frequency Response vs. CL CL = 500pF Rs = 5Ω -2 -3 CL = 100pF Rs = 10Ω -4 CL = 50pF Rs = 15Ω -5 -6 CL = 20pF Rs = 20Ω VOUT = 0.5Vpp 2 1 0 -1 RL = 100Ω -2 -3 RL = 50Ω -4 VOUT = 0.5Vpp -5 -7 RL = 25Ω -6 0.1 1 10 100 1000 0.1 1 Frequency (MHz) 10 100 1000 Frequency (MHz) Frequency Response vs. VOUT Frequency Response vs. Temperature 1 2 0 1 Rev 1A 0 -1 Normalized Gain (dB) Normalized Gain (dB) Comlinear CLC1605, CLC3605 Single and Triple, 1.5GHz Amplifiers 1 G=1 Rf = 499Ω 3 Normalized Gain (dB) Inverting Frequency Response VOUT = 4Vpp -2 -3 VOUT = 2Vpp -4 VOUT = 1Vpp -5 -1 + 25degC -2 - 40degC -3 + 85degC -4 -5 -6 VOUT = 0.2Vpp -6 -7 -7 0.1 1 10 Frequency (MHz) ©2007-2008 CADEKA Microcircuits LLC 100 1000 0.1 1 10 100 1000 10000 Frequency (MHz) www.cadeka.com 8 Data Sheet Typical Performance Characteristics TA = 25°C, Vs = ±5V, Rf = Rg =330Ω, RL = 150Ω to GND, G = 2; unless otherwise noted. Non-Inverting Frequency Response at VS = 5V Normalized Gain (dB) G=2 G=5 G = 10 -6 G = -2 -1 0 -3 G = -1 0 G=1 Rf = 750Ω G = -5 -2 -3 G = -10 -4 -5 -6 VOUT = 0.5Vpp -9 VOUT = 0.5Vpp -7 0.1 1 10 100 1000 0.1 1 Frequency (MHz) 100 1000 Frequency Response vs. RL at VS = 5V 1 3 2 0 CL = 1000pF Rs = 3.3Ω -1 1 Normalized Gain (dB) Normalized Gain (dB) 10 Frequency (MHz) Frequency Response vs. CL at VS = 5V CL = 500pF Rs = 5Ω -2 -3 CL = 100pF Rs = 10Ω -4 CL = 50pF Rs = 15Ω -5 -6 VOUT = 0.5Vpp 0 -1 RL = 100Ω -2 RL = 50Ω -3 -4 CL = 20pF Rs = 20Ω RL = 25Ω VOUT = 0.5Vpp -5 -7 -6 0.1 1 10 100 1000 0.1 1 Frequency (MHz) 10 100 1000 Frequency (MHz) Frequency Response vs. VOUT at VS = 5V Frequency Response vs. Temperature at VS = 5V 1 2 0 1 Rev 1A 0 -1 Normalized Gain (dB) Normalized Gain (dB) Comlinear CLC1605, CLC3605 Single and Triple, 1.5GHz Amplifiers 1 G=1 Rf = 499Ω 3 Normalized Gain (dB) Inverting Frequency Response at VS = 5V VOUT = 3Vpp -2 -3 VOUT = 2Vpp -4 VOUT = 1Vpp -5 -1 -2 + 25degC -3 - 40degC -4 + 85degC -5 -6 VOUT = 0.2Vpp -6 -7 -7 0.1 1 10 Frequency (MHz) ©2007-2008 CADEKA Microcircuits LLC 100 1000 0.1 1 10 100 1000 10000 Frequency (MHz) www.cadeka.com 9 Data Sheet Typical Performance Characteristics - Continued TA = 25°C, Vs = ±5V, Rf = Rg =330Ω, RL = 150Ω to GND, G = 2; unless otherwise noted. Gain Flatness at VS = 5V 0.1 0 0 Normalized Gain (dB) 0.1 -0.1 -0.2 -0.3 VOUT = 2Vpp RL = 150Ω Rf = 330Ω -0.4 -0.1 -0.2 -0.3 VOUT = 2Vpp RL = 150Ω Rf = 330Ω -0.4 -0.5 -0.5 0.1 1 10 100 1000 0.1 1 Frequency (MHz) -3dB Bandwidth vs. VOUT 1000 1200 1100 1600 1000 1400 -3dB Bandwidth (MHz) -3dB Bandwidth (MHz) 100 -3dB Bandwidth vs. VOUT at VS = 5V 1800 1200 1000 800 600 900 800 700 600 500 400 400 300 200 200 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0.0 0.5 VOUT (VPP) 1.0 1.5 2.0 2.5 3.0 VOUT (VPP) Closed Loop Output Impedance vs. Frequency Input Voltage Noise 10 25 1 0.1 0.01 10K 100K 1M Frequency (Hz) ©2007-2008 CADEKA Microcircuits LLC 10M 100M Rev 1A Input Voltage Noise (nV/√Hz) VS = ±5.0V Output Resistance (Ω) 10 Frequency (MHz) 20 15 10 5 0 0.0001 Comlinear CLC1605, CLC3605 Single and Triple, 1.5GHz Amplifiers Normalized Gain (dB) Gain Flatness 0.001 0.01 0.1 1 10 Frequency (MHz) www.cadeka.com 10 Data Sheet Typical Performance Characteristics - Continued TA = 25°C, Vs = ±5V, Rf = Rg =330Ω, RL = 150Ω to GND, G = 2; unless otherwise noted. 2nd Harmonic Distortion vs. RL 3rd Harmonic Distortion vs. RL -65 -60 -70 RL = 150Ω -75 -70 Distortion (dBc) Distortion (dBc) -65 -75 -80 -85 RL = 150Ω -80 -85 -90 -90 RL = 1kΩ -95 -95 VOUT = 2Vpp -100 RL = 1kΩ VOUT = 2Vpp -100 0 5 10 15 20 0 5 Frequency (MHz) 10 2nd Harmonic Distortion vs. VOUT 20 3rd Harmonic Distortion vs. VOUT -60 -70 -65 10MHz -75 10MHz Distortion (dBc) -70 Distortion (dBc) 15 Frequency (MHz) -75 -80 5MHz -85 -90 1MHz RL = 150Ω 0.5 0.75 5MHz -85 -90 1MHz -95 -95 -100 -80 RL = 150Ω 100Ω -100 1 1.25 1.5 1.75 2 2.25 2.5 0.5 0.75 1 Output Amplitude (Vpp) 1.25 1.5 1.75 2 2.25 2.5 Output Amplitude (Vpp) CMRR vs. Frequency PSRR vs. Frequency -25 0 -10 -35 -20 PSRR (dB) -30 -40 -45 -50 Rev 1A CMRR (dB) VS = ±5.0V -30 -40 -50 -55 -60 10k 100k 1M Frequency (Hz) ©2007-2008 CADEKA Microcircuits LLC 10M 100M Comlinear CLC1605, CLC3605 Single and Triple, 1.5GHz Amplifiers -55 10K 100K 1M 10M 100M Frequency (Hz) www.cadeka.com 11 Data Sheet Typical Performance Characteristics - Continued TA = 25°C, Vs = ±5V, Rf = Rg =330Ω, RL = 150Ω to GND, G = 2; unless otherwise noted. Small Signal Pulse Response at VS = 5V 0.125 2.625 0.1 2.6 0.075 2.575 2.55 0.025 2.525 Voltage (V) 0.05 0 -0.025 2.5 2.475 -0.05 2.45 -0.075 2.425 -0.1 2.4 -0.125 2.375 0 20 40 60 80 100 120 140 160 180 200 0 20 40 60 80 Time (ns) 100 120 140 160 180 200 Time (ns) Large Signal Pulse Response Large Signal Pulse Response at VS = 5V 2.5 4 2 3.5 1.5 3 0.5 Voltage (V) Voltage (V) 1 0 -0.5 2.5 2 -1 -1.5 1.5 -2 -2.5 1 0 20 40 60 80 100 120 140 160 180 200 0 20 40 60 Time (ns) 100 120 140 160 180 200 Time (ns) Differential Gain & Phase AC Coupled Output Differential Gain & Phase DC Coupled Output 0.01 0.03 Diff Gain (%) / Diff Phase (°) 0.005 DG 0 -0.005 DP -0.01 -0.015 RL = 150Ω AC coupled -0.02 0.02 Rev 1A Diff Gain (%) / Diff Phase (°) 80 DP DG 0.01 0 -0.01 -0.02 RL = 150Ω DC coupled -0.03 -0.7 -0.5 -0.3 -0.1 0.1 Input Voltage (V) ©2007-2008 CADEKA Microcircuits LLC 0.3 0.5 0.7 -0.7 -0.5 -0.3 -0.1 0.1 Comlinear CLC1605, CLC3605 Single and Triple, 1.5GHz Amplifiers Voltage (V) Small Signal Pulse Response 0.3 0.5 0.7 Input Voltage (V) www.cadeka.com 12 Data Sheet Typical Performance Characteristics - Continued TA = 25°C, Vs = ±5V, Rf = Rg =330Ω, RL = 150Ω to GND, G = 2; unless otherwise noted. Differential Gain & Phase AC Coupled Output at VS = ±2.5V Differential Gain & Phase DC Coupled at VS = ±2.5V 0.01 0 Diff Gain (%) / Diff Phase (°) Diff Gain (%) / Diff Phase (°) DP -0.01 -0.02 DG -0.03 -0.04 RL = 150Ω AC coupled -0.01 -0.02 DG -0.03 -0.04 -0.05 -0.06 RL = 150Ω DC coupled -0.07 -0.05 -0.35 DP 0 -0.25 -0.15 -0.05 0.05 0.15 0.25 -0.35 0.35 -0.25 -0.15 0.05 0.15 0.25 0.35 Crosstalk vs. Frequency at VS=5V (CLC3605) -30 -30 -35 -35 -40 -40 -45 -45 -50 -50 Crosstalk (dB) Crosstalk (dB) Crosstalk vs. Frequency (CLC3605) -55 -60 -65 -70 -55 -60 -65 -70 -75 -75 -80 -80 -85 -85 VOUT = 2Vpp -90 VOUT = 1Vpp -90 -95 -95 0.1 1 10 100 0.1 1 Frequency (MHz) 10 100 Frequency (MHz) Off Isolation vs. Frequency Off Isolation vs. Frequency at VS=5V -45 -50 -50 -55 -55 -60 -60 -65 -65 Off Isolation (dB) -45 -70 -75 -80 -85 -90 -70 -75 -80 -85 -90 -95 -95 -100 -100 VOUT = 2Vpp -105 Rev 1A Off Isolation (dB) -0.05 Input Voltage (V) Input Voltage (V) VOUT = 1Vpp -105 -110 -110 0.1 1 10 Frequency (MHz) ©2007-2008 CADEKA Microcircuits LLC 100 Comlinear CLC1605, CLC3605 Single and Triple, 1.5GHz Amplifiers 0.02 0.01 0.1 1 10 100 Frequency (MHz) www.cadeka.com 13 Data Sheet General Information - Current Feedback Technology Advantages of CFB Technology CFB also alleviates the traditional trade-off between closed loop gain and usable bandwidth that is seen with a VFB amplifier. With CFB, the bandwidth is primarily determined by the value of the feedback resistor, Rf. By using optimum feedback resistor values, the bandwidth of a CFB amplifier remains nearly constant with different gain configurations. When designing with CFB amplifiers always abide by these basic rules: • Use the recommended feedback resistor value • Do not use reactive (capacitors, diodes, inductors, etc.) elements in the direct feedback path • Avoid stray or parasitic capacitance across feedback resistors • Follow general high-speed amplifier layout guidelines • Ensure proper precautions have been made for driving capacitive loads VIN Zo*Ierr VOUT Rf RL Rg VOUT VIN = 1+ Rf Rg + 1+ 1 Rf Eq. 1 Zo(jω) Figure 1. Non-Inverting Gain Configuration with First Order Transfer Function ©2007-2008 CADEKA Microcircuits LLC VIN Rg VOUT VIN VOUT Rf = − Rf Rg + 1+ 1 Rf RL Eq. 2 Zo(jω) Figure 2. Inverting Gain Configuration with First Order Transfer Function CFB Technology - Theory of Operation Figure 1 shows a simple representation of a current feedback amplifier that is configured in the traditional noninverting gain configuration. Instead of having two high-impedance inputs similar to a VFB amplifier, the inputs of a CFB amplifier are connected across a unity gain buffer. This buffer has a high impedance input and a low impedance output. It can source or sink current (Ierr) as needed to force the non-inverting input to track the value of Vin. The CFB architecture employs a high gain trans-impedance stage that senses Ierr and drives the output to a value of (Zo(jω) * Ierr) volts. With the application of negative feedback, the amplifier will drive the output to a voltage in a manner which tries to drive Ierr to zero. In practice, primarily due to limitations on the value of Zo(jω), Ierr remains a small but finite value. A closer look at the closed loop transfer function (Eq.1) shows the effect of the trans-impedance, Zo(jω) on the gain of the circuit. At low frequencies where Zo(jω) is very large with respect to Rf, the second term of the equation approaches unity, allowing Rf and Rg to set the gain. At higher frequencies, the value of Zo(jω) will roll off, and the effect of the secondary term will begin to dominate. The -3dB small signal parameter specifies the frequency where the value Zo(jω) equals the value of Rf causing the gain to drop by 0.707 of the value at DC. For more information regarding current feedback amplifiers, visit www.cadeka.com for detailed application notes, such as AN-3: The Ins and Outs of Current Feedback Amplifiers. www.cadeka.com 14 Rev 1A Ierr x1 Ierr Zo*Ierr Comlinear CLC1605, CLC3605 Single and Triple, 1.5GHz Amplifiers The CLC1605 Family of amplifiers utilize current feedback (CFB) technology to achieve superior performance. The primary advantage of CFB technology is higher slew rate performance when compared to voltage feedback (VFB) architecture. High slew rate contributes directly to better large signal pulse response, full power bandwidth, and distortion. x1 Data Sheet Application Information Basic Operation +Vs Input 6.8μF Feedback Resistor Selection 0.1μF + Output - RL 0.1μF Rg Rf 6.8μF G = 1 + (Rf/Rg) -Vs Figure 3. Typical Non-Inverting Gain Circuit +Vs R1 Input 0.1μF + Rg 6.8μF Output - RL 0.1μF Rf 6.8μF G = - (Rf/Rg) -Vs For optimum input offset voltage set R1 = Rf || Rg Figure 4. Typical Inverting Gain Circuit One of the key design considerations when using a CFB amplifier is the selection of the feedback resistor, Rf. Rf is used in conjunction with Rg to set the gain in the traditional non-inverting and inverting circuit configurations. Refer to figures 3 and 4. As discussed in the Current Feedback Technology section, the value of the feedback resistor has a pronounced effect on the frequency response of the circuit. Table 1, provides recommended Rf and associated Rg values for various gain settings. These values produce the optimum frequency response, maximum bandwidth with minimum peaking. Adjust these values to optimize performance for a specific application. The typical performance characteristics section includes plots that illustrate how the bandwidth is directly affected by the value of Rf at various gain settings. Rg (Ω) ±0.1dB BW (MHz) -3dB BW (MHz) 499 - 167 1500 330 330 120 1200 5 330 82.5 66 385 10 330 33 38 245 Gain (V/V Rf (Ω) 1 2 +Vs Input 6.8μF 0.1μF + Output 0.1μF 6.8μF -Vs RL Rf G=1 Rf is required for CFB amplifiers Figure 5. Typical Unity Gain (G=1) Circuit ©2007-2008 CADEKA Microcircuits LLC Rev 1A Table 1: Recommended Rf vs. Gain In general, lowering the value of Rf from the recommended value will extend the bandwidth at the expense of additional high frequency gain peaking. This will cause increased overshoot and ringing in the pulse response characteristics. Reducing Rf too much will eventually cause oscillatory behavior. Increasing the value of Rf will lower the bandwidth. Lowering the bandwidth creates a flatter frequency response and improves 0.1dB bandwidth performance. This is important in applications such as video. Further increase in Rf will cause premature gain rolloff and adversely affect gain flatness. www.cadeka.com Comlinear CLC1605, CLC3605 Single and Triple, 1.5GHz Amplifiers Figures 3, 4, and 5 illustrate typical circuit configurations for non-inverting, inverting, and unity gain topologies for dual supply applications. They show the recommended bypass capacitor values and overall closed loop gain equations. CFB amplifiers can be used in unity gain configurations. Do not use the traditional voltage follower circuit, where the output is tied directly to the inverting input. With a CFB amplifier, a feedback resistor of appropriate value must be used to prevent unstable behavior. Refer to figure 5 and Table 1. Although this seems cumbersome, it does allow a degree of freedom to adjust the passband characteristics. 15 Data Sheet Driving Capacitive Loads Overdrive Recovery + Rs - Output CL Rf RL Rg Figure 6. Addition of RS for Driving Capacitive Loads CL (pF) RS (Ω) -3dB BW (MHz) 20 20 350 50 15 235 100 10 170 500 5 75 1000 3.3 52 1.5 6 VIN = 2Vpp G=5 1 4 Input 0.5 2 Output 0 0 -0.5 -2 -1 -4 -1.5 Output Voltage (V) Table 2 provides the recommended RS for various capacitive loads. The recommended RS values result in <=0.5dB peaking in the frequency response. The Frequency Response vs. CL plot, on page 5, illustrates the response of the CLC1605 Family. An overdrive condition is defined as the point when either one of the inputs or the output exceed their specified voltage range. Overdrive recovery is the time needed for the amplifier to return to its normal or linear operating point. The recovery time varies, based on whether the input or output is overdriven and by how much the range is exceeded. The CLC1605 Family will typically recover in less than 10ns from an overdrive condition. Figure 7 shows the CLC1605 in an overdriven condition. Input Voltage (V) Input -6 0 20 40 60 80 100 120 140 160 180 200 Time (ns) Table 1: Recommended RS vs. CL Parasitic Capacitance on the Inverting Input Physical connections between components create unintentional or parasitic resistive, capacitive, and inductive elements. Parasitic capacitance at the inverting input can be especially troublesome with high frequency amplifiers. A parasitic capacitance on this node will be in parallel with the gain setting resistor Rg. At high frequencies, its impedance can begin to raise the system gain by making Rg appear smaller. Power Dissipation Power dissipation should not be a factor when operating under the stated 1000 ohm load condition. However, applications with low impedance, DC coupled loads should be analyzed to ensure that maximum allowed junction temperature is not exceeded. Guidelines listed below can be used to verify that the particular application will not cause the device to operate beyond it’s intended operating range. Maximum power levels are set by the absolute maximum junction rating of 150°C. To calculate the junction temperature, the package thermal resistance value ThetaJA (ӨJA) is used along with the total die power dissipation. TJunction = TAmbient + (ӨJA × PD) ©2007-2008 CADEKA Microcircuits LLC www.cadeka.com 16 Rev 1A For a given load capacitance, adjust RS to optimize the tradeoff between settling time and bandwidth. In general, reducing RS will increase bandwidth at the expense of additional overshoot and ringing. Figure 7. Overdrive Recovery Comlinear CLC1605, CLC3605 Single and Triple, 1.5GHz Amplifiers Increased phase delay at the output due to capacitive loading can cause ringing, peaking in the frequency response, and possible unstable behavior. Use a series resistance, RS, between the amplifier and the load to help improve stability and settling performance. Refer to Figure 6. In general, avoid adding any additional parasitic capacitance at this node. In addition, stray capacitance across the Rf resistor can induce peaking and high frequency ringing. Refer to the Layout Considerations section for additional information regarding high speed layout techniques. Data Sheet PD = Psupply - Pload Supply power is calculated by the standard power equation. Psupply = Vsupply × IRMS supply Vsupply = VS+ - VS- SOIC-16 2 1.5 1 0.5 SOT23-5 0 -40 -20 0 20 40 60 80 Ambient Temperature (°C) Power delivered to a purely resistive load is: Pload = ((VLOAD)RMS2)/Rloadeff The effective load resistor (Rloadeff) will need to include the effect of the feedback network. For instance, Rloadeff in figure 3 would be calculated as: RL || (Rf + Rg) These measurements are basic and are relatively easy to perform with standard lab equipment. For design purposes however, prior knowledge of actual signal levels and load impedance is needed to determine the dissipated power. Here, PD can be found from PD = PQuiescent + PDynamic - PLoad Quiescent power can be derived from the specified IS values along with known supply voltage, VSupply. Load power can be calculated as above with the desired signal amplitudes using: (VLOAD)RMS = VPEAK / √2 The dynamic power is focused primarily within the output stage driving the load. This value can be calculated as: PDYNAMIC = (VS+ - VLOAD)RMS × ( ILOAD)RMS Assuming the load is referenced in the middle of the power rails or Vsupply/2. Figure 8 shows the maximum safe power dissipation in the package vs. the ambient temperature for the available packages. Better thermal ratings can be achieved by maximizing PC board metallization at the package pins. However, be careful of stray capacitance on the input pins. In addition, increased airflow across the package can also help to reduce the effective ӨJA of the package. In the event the outputs are momentarily shorted to a low impedance path, internal circuitry and output metallization are set to limit and handle up to 65mA of output current. However, extended duration under these conditions may not guarantee that the maximum junction temperature (+150°C) is not exceeded. Layout Considerations General layout and supply bypassing play major roles in high frequency performance. CADEKA has evaluation boards to use as a guide for high frequency layout and as aid in device testing and characterization. Follow the steps below as a basis for high frequency layout: • Include 6.8µF and 0.1µF ceramic capacitors for power supply decoupling • Place the 6.8µF capacitor within 0.75 inches of the power pin • Place the 0.1µF capacitor within 0.1 inches of the power pin • Remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitance • Minimize all trace lengths to reduce series inductances Refer to the evaluation board layouts below for more information. ©2007-2008 CADEKA Microcircuits LLC www.cadeka.com 17 Rev 1A ( ILOAD)RMS = ( VLOAD)RMS / Rloadeff Figure 8. Maximum Power Derating Comlinear CLC1605, CLC3605 Single and Triple, 1.5GHz Amplifiers In order to determine PD, the power dissipated in the load needs to be subtracted from the total power delivered by the supplies. Maximum Power Dissipation (W) 2.5 Where TAmbient is the temperature of the working environment. Data Sheet Evaluation Board Information The following evaluation boards are available to aid in the testing and layout of these devices: Products Comlinear CLC1605, CLC3605 Single and Triple, 1.5GHz Amplifiers Evaluation Board # CEB002 CEB013 CLC1605 CLC3605 Evaluation Board Schematics Evaluation board schematics and layouts are shown in Figures 9-14. These evaluation boards are built for dual- supply operation. Follow these steps to use the board in a single-supply application: 1. Short -Vs to ground. Figure 10. CEB002 Top View 2. Use C3 and C4, if the -VS pin of the amplifier is not directly connected to the ground plane. Figure 11. CEB002 Bottom View Rev 1A Figure 9. CEB002 Schematic ©2007-2008 CADEKA Microcircuits LLC www.cadeka.com 18 Data Sheet DIS1 16 2 IN1 1 RIN1 15 RF1 ROUT1 OUT1 Comlinear CLC1605, CLC3605 Single and Triple, 1.5GHz Amplifiers RG1 DIS2 13 5 IN2 4 RIN2 12 RF2 11,14 ROUT2 OUT2 3,6 RG2 DIS3 9 7 IN3 8 RIN3 10 RF3 ROUT3 OUT3 Figure 14. CEB013 Bottom View RG3 Board Mounting Holes Figure 12. CEB013 Schematic Rev 1A Figure 13. CEB013 Top View ©2007-2008 CADEKA Microcircuits LLC www.cadeka.com 19 Data Sheet Mechanical Dimensions SOT23-5 Package Comlinear CLC1605, CLC3605 Single and Triple, 1.5GHz Amplifiers SOIC-16 Package Rev 1A For additional information regarding our products, please visit CADEKA at: cadeka.com CADEKA Headquarters Loveland, Colorado T: 970.663.5452 T: 877.663.5452 (toll free) CADEKA, the CADEKA logo design, COMLINEAR, the COMLINEAR logo design, and ARCTIC are trademarks or registered trademarks of CADEKA Microcircuits LLC. All other brand and product names may be trademarks of their respective companies. CADEKA reserves the right to make changes to any products and services herein at any time without notice. CADEKA does not assume any responsibility or liability arising out of the application or use of any product or service described herein, except as expressly agreed to in writing by CADEKA; nor does the purchase, lease, or use of a product or service from CADEKA convey a license under any patent rights, copyrights, trademark rights, or any other of the intellectual property rights of CADEKA or of third parties. Copyright ©2007-2008 by CADEKA Microcircuits LLC. All rights reserved. A m p l i fy t h e H u m a n E x p e r i e n c e