FAIRCHILD FAN4272

www.fairchildsemi.com
FAN4272
Dual, Low Cost, +2.7V & +5V, Rail-to-Rail I/O Amplifier
Features at 2.7V
Description
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The FAN4272 is an ultra-low cost, low power, voltage feedback amplifier. At 5V, the FAN4272 uses only 160µA of
supply current per amplifier and is designed to operate from a
supply range of 2.5V to 5.5V (±1.25V to 2.75V). The input
voltage range exceeds the negative and positive rails.
130µA supply current per amplifier
4MHz bandwidth
Output swings to within 25mV of either rail
Input voltage range exceeds the rail by >250mV
4V/µs slew rate
16mA output current
22nV/√Hz input voltage noise
Operating temperature range: -40°C to +125°C
Directly replaces TLC2272 in single supply applications
Available in SOIC-8 and MSOP-8 package options
Available evaluation boards:
KEB006 (SOIC) and KEB010 (MSOP)
The FAN4272 offers high bipolar performance at a low CMOS
price. The FAN4272 offers superior dynamic performance
with a 4MHz small signal bandwidth and 4V/µs slew rate.
The combination of low power, high bandwidth, and rail-torail performance make the FAN4272 well suited for batterypowered communication/computing systems.
Large Signal Freq. Response Vs = +5V
Applications
Automotive applications
Portable/battery-powered applications
PCMCIA, USB
Mobile communications, cellular phones, pagers
Notebooks and PDA’s
Sensor Interface
A/D buffer
Active filters
Signal conditioning
Portable test instruments
Vo = 1Vpp
Magnitude (1dB/div)
•
•
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+In1
3
-Vs
4
+
+
+Vs
7
Out2
6
-In2
5
+In2
1
-In1
2
+In1
3
-Vs
4
RL = 1kΩ
1.5
1.0
RL = 75Ω
0.5
RL = 200Ω
RL = 100Ω
0
-0.5
-1.0
-1.5
-2.0
-3
+
RL = 10kΩ
2.0
-2.5
MSOP
Out1
10
Output Swing vs. Load Vs = +5V
Output Voltage (0.25V/div)
8
1
2
1
Frequency (MHz)
2.5
SOIC
-In1
Vo = 2Vpp
0.1
FAN4272 Packages
Out1
Vo = 4Vpp
+
8
+Vs
7
Out2
6
-In2
5
+In2
-2
-1
0
1
2
3
Input Voltage (V)
Rev. 2 December 2002
DATA SHEET
FAN4272
Absolute Maximum Ratings
Parameter
Supply Voltages
Maximum Junction Temperature
Storage Temperature Range
Lead Temperature, 10 seconds
Operating Temperature Range, recommended
Input Voltage Range
Min.
0
–
-65
–
-40
-Vs -0.5
Max.
+6
+175
+150
+260
+125
+Vs +0.5
Unit
V
°C
°C
°C
°C
V
Max.
Unit
Electrical Specifications
(Vs = +2.7V, G = 2, RL = 10kΩ to Vs/2, Rf = 5kΩ, Ta = 25°C; unless otherwise noted)
Parameter
AC Performance
-3dB Bandwidth1
Large Signal Bandwidth
Gain Bandwidth Product
Rise and Fall Time
Overshoot
Slew Rate
2nd Harmonic Distortion
3rd Harmonic Distortion
THD
Input Voltage Noise
Crosstalk
DC Performance
Input Offset Voltage
Average Drift
Input Bias Current
Average Drift
Power Supply Rejection Ratio2
Open Loop Gain
Quiescent Current Per Channel
Input Characteristics
Input Resistance
Input Capacitance
Input Common Mode Voltage Range
Common Mode Rejection Ratio
Output Characteristics
Output Voltage Swing
Conditions
Min.
G = +1, Vo = 0.02Vpp
G = +2, Vo = 0.2Vpp
G = +2, Vo = 2Vpp
4
3.7
1.1
1.7
215
<1
4
-74
-62
0.08
22
95
MHz
MHz
MHz
MHz
ns
%
V/µs
dBc
dBc
%
nV/√Hz
dB
<0.5
4
90
100
85
75
130
mV
µV/°C
nA
pA/°C
dB
dB
µA
12
1.8
-0.25 to 2.95
78
MΩ
pF
V
dB
0.06 to 2.64 0.025 to 2.68
0.07 to 2.645
0.198 to 2.59
±16
2.5
2.7
V
V
V
mA
V
1V step
1V step
1V step
1Vpp, 10kHz
1Vpp, 10kHz
1Vpp, 10kHz
>10kHz
>100kHz
DC
RL = 10kΩ
DC, Vcm = 0V to Vs
RL = 10kΩ to Vs/22
RL = 1kΩ to Vs/2
RL = 200Ω to Vs/2
Output Current
Power Supply Operating Range
Typ.
70
5.5
Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are
determined from tested parameters.
Notes:
1. For G = +1, Rf = 0.
2. Guaranteed by testing or statistical analysis at 25°C.
2
Rev. 2 December 2002
FAN4272
DATA SHEET
Electrical Specifications
(Vs = +5V, G = 2, RL = 10kΩ to Vs/2, Rf = 5kΩ, Ta = 25°C; unless otherwise noted)
Parameter
AC Performance
-3dB Bandwidth1
Large Signal Bandwidth
Gain Bandwidth Product
Rise and Fall Time
Overshoot
Slew Rate
2nd Harmonic Distortion
3rd Harmonic Distortion
THD
Input Voltage Noise
Crosstalk
DC Performance
Input Offset Voltage2
Average Drift
Input Bias Current2
Average Drift
Input Offset Current2
Power Supply Rejection Ratio2
Open Loop Gain
Quiescent Current Per Channel2
Input Characteristics
Input Resistance
Input Capacitance
Input Common Mode Voltage Range
Common Mode Rejection Ratio2
Output Characteristics
Output Voltage Swing
Conditions
Min.
G = +1, Vo = 0.02Vpp
G = +2, Vo = 0.2Vpp
G = +2, Vo = 2Vpp
-2
-420
DC, Vcm = 0V to Vs
RL = 10kΩ to Vs/22
RL = 1kΩ to Vs/2
RL = 200Ω to Vs/2
Output Current
Power Supply Operating Range
Max.
4
4.7
1.7
1.8
150
<1
6
-73
-75
0.03
23
95
1V step
1V step
1V step
2Vpp, 10kHz
2Vpp, 10kHz
2Vpp, 10kHz
>10kHz
>100kHz
DC
RL = 10kΩ
Typ.
-50
70
<0.5
8
90
100
MHz
MHz
MHz
MHz
ns
%
V/µs
dBc
dBc
%
nV/√Hz
dB
+2
420
+50
85
72
160
Unit
235
mV
µV/°C
nA
pA/°
nA
dB
dB
µA
12
1.7
-0.25 to 5.25
85
MΩ
pF
V
dB
0.09 to 4.91 0.031 to 4.976
0.094 to 4.94
0.315 to 4.865
±30
2.5
2.7
V
V
V
mA
V
58
5.5
Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are
determined from tested parameters.
Notes:
1. For G = +1, Rf = 0.
2. Guaranteed by testing or statistical analysis at 25°C.
3. RL = 10kΩ to Vs/2.
Package Thermal Resistance
Package
8 lead SOIC
8 lead MSOP
Rev. 2 December 2002
θJA
152°C/W
206°C/W
3
DATA SHEET
FAN4272
Typical Operating Characteristics
(Vs = +5V, G = 2, RL = 10kΩ to Vs/2, Rf = 5kΩ, Ta = 25°C; unless otherwise noted)
Inverting Freq. Response Vs = +5V
Normalized Magnitude (1dB/div)
Normalized Magnitude (1dB/div)
Non-Inverting Freq. Response Vs = +5V
Vo = 0.2Vpp
G=1
Rf = 0
G=2
Rf = 5kΩ
G = 10
Rf = 5kΩ
G=5
Rf = 5kΩ
0.01
0.1
1
Vo = 0.2Vpp
G = -2
Rf = 5kΩ
G = -10
Rf = 5kΩ
G = -5
Rf = 5kΩ
0.01
10
0.1
Normalized Magnitude (1dB/div)
Normalized Magnitude (1dB/div)
G=1
Rf = 0
G=2
Rf = 5kΩ
G=5
Rf = 5kΩ
0.01
0.1
1
Vo = 0.2Vpp
G = -2
Rf = 5kΩ
G = -5
Rf = 5kΩ
0.01
10
0.1
1
Frequency Response vs. RL Vs = +5V
CL = 200pf
RL = 10kΩ
RL = 100kΩ
Magnitude (3dB/div)
CL = 100pf
CL = 50pf
CL = 20pf
CL = 10pf
+
Rs
-
CL
5kΩ
10
Frequency (MHz)
Frequency Response vs. CL Vs = +5V
Magnitude (1dB/div)
G = -1
Rf = 5kΩ
G = -10
Rf = 5kΩ
Frequency (MHz)
Rs = 0
10
Inverting Freq. Response Vs = +2.7V
Non-Inverting Freq. Response Vs = +2.7V
G = 10
Rf = 5kΩ
1
Frequency (MHz)
Frequency (MHz)
Vo = 0.2Vpp
G = -1
Rf = 5kΩ
RL
RL = 2kΩ
RL = 1kΩ
5kΩ
0.01
0.1
1
0.01
10
0.1
Frequency (MHz)
1
10
Frequency (MHz)
Open Loop Gain & Phase vs. Frequency
Large Signal Freq. Response Vs = +5V
140
Open Loop Gain (dB)
Magnitude (1dB/div)
Vo = 4Vpp
Vo = 2Vpp
|Gain|
No Load
100
80
Phase
No Load
60
0
-45
40
-90
20
Phase
RL = 10kΩ
0
-135
-20
0.1
1
Frequency (MHz)
4
10
1
10
100
1k
10k
100k
1M
Open Loop Phase (deg)
|Gain|
RL = 10kΩ
120
Vo = 1Vpp
-180
10M 100M
Frequency (Hz)
Rev. 2 December 2002
FAN4272
DATA SHEET
Typical Operating Characteristics
(Vs = +5V, G = 2, RL = 10kΩ to Vs/2, Rf = 5kΩ, Ta = 25°C; unless otherwise noted)
2nd Harmonic Distortion vs. Vo for Vs = +5V
Harmonic Distortion vs. Freq. Vs = +5V
-40
-45
-55
-60
-65
2nd
RL = 10kΩ
-70
-45
3rd
RL = 1kΩ
-50
Distortion (dBc)
Distortion (dBc)
2nd
RL = 1kΩ
Vo = 1Vpp
-50
-75
-55
100kHz
-60
50kHz
-65
20kHz
-70
-75
3rd
RL = 10kΩ
-80
10kHz
-80
-85
-85
10
20
30
40
50
60
70
80
90
0.5
100
1
3rd Harmonic Distortion vs. Vo for Vs = +5V
100kHz
-10
-50
-20
-55
50kHz
-65
20kHz
-70
10kHz
-75
-30
-40
-50
-60
-70
-80
-80
-85
-90
0.5
1
1.5
2
100
2.5
1000
Output Amplitude (Vpp)
10000
100000
1000000
Frequency (Hz)
PSRR vs. Frequency
Output Swing vs. Load Vs = +5V
2.5
-10
2.0
Output Voltage (0.25V/div)
0
-20
PSRR (dB)
2.5
CMRR vs. Frequency
-45
-60
2
0
CMRR (dB)
Distortion (dBc)
-40
1.5
Output Amplitude (Vpp)
Frequency (kHz)
-30
-40
-50
-60
-70
-80
-90
RL = 10kΩ
RL = 1kΩ
1.5
1.0
RL = 75Ω
0.5
RL = 200Ω
RL = 100Ω
0
-0.5
-1.0
-1.5
-2.0
-2.5
100
1000
10000
100000
-3
1000000
Frequency (Hz)
-2
-1
0
1
2
3
Input Voltage (V)
Pulse Resp. vs. Common Mode Voltage
Input Voltage Noise Vs = +5V
45
42
No Offset
-1.2V Offset
39
36
nV/√Hz
Output Voltage (0.5V/div)
2.4V Offset
1.2V Offset
33
30
27
-2.4V Offset
24
21
18
Time (1µS/div))
0.1
1
10
100
Frequency (kHz)
Rev. 2 December 2002
5
DATA SHEET
FAN4272
Typical Operating Characteristics
(Vs = +5V, G = 2, RL = 10kΩ to Vs/2, Rf = 5kΩ, Ta = 25°C; unless otherwise noted)
Input Offset Voltage vs. Temp for 100 Parts
Input Offset Voltage vs. Vs for 20 Parts
2.0
1.8
1.5
1.2
1.0
0.8
0.4
0.5
mV
Input Offset Voltage (mV)
2.0
0
-0.5
-0.8
-1.0
-1.2
-1.5
-1.8
-2.0
-2.0
2.5 2.8 3.1 3.4 3.7 4.0 4.3 4.6 4.9 5.2 5.5
Supply Voltage (V)
6
0
-0.4
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (deg)
Rev. 2 December 2002
FAN4272
DATA SHEET
Application Information
degradation will occur. It the maximum junction temperature
exceeds 175°C for an extended time, device failure may occur.
General Description
The FAN4272 is single supply, general purpose, voltage-feedback amplifier. The FAN4272 is fabricated on a complementary
bipolar process, features a rail-to-rail input and output, and is
unity gain stable.
The typical non-inverting circuit schematic is shown in Figure 1.
Overdrive Recovery
Overdrive of an amplifier occurs when the output and/or
input ranges are exceeded. The recovery time varies based on
whether the input or output is overdriven and by how much
the ranges are exceeded. The FAN4272 will typically recover
in less than 50ns from an overdrive condition. Figure 3
shows the FAN4272 in an overdriven condition.
+Vs
6.8µF
5.5
G=5
+
Output
In
0.01µF
+
Out
FAN4272
-
AMPL (V)
4.5
3.5
2.5
1.5
Input
0.5
Rf
-0.5
0
Rg
10
20
30
40
50
60
70
80
Time (µs)
Figure 3: Overdrive Recovery
Figure 1: Typical Non-inverting Configuration
Input Common Mode Voltage
The common mode input range extends to 250mV below
ground and to 250mV above Vs, in single supply operation.
Exceeding these values will not cause phase reversal. However,
if the input voltage exceeds the rails by more than 0.5V, the
input ESD devices will begin to conduct. The output will
stay at the rail during this overdrive condition. If the absolute
maximum input voltage (700mV beyond either rail) is
exceeded, externally limit the input current to ±5mA as shown
in Figure 2.
Driving Capacitive Loads
The Frequency Response vs. CL plot, illustrates the response
of the FAN4272. A small series resistance (Rs) at the output
of the amplifier, illustrated in Figure 4, will improve stability
and settling performance. Rs values in the Frequency Response
vs. CL plot were chosen to achieve maximum bandwidth with
less than 2dB of peaking. For maximum flatness, use a larger
Rs. Capacitive loads larger than 200pF require the use of Rs.
+
Rs
Rf
FAN4272
Vin
Vo
CL
RL
Rg
+
10kΩ
Figure 4: Typical Topology for driving
a capacitive load
Figure 2: Circuit for Input Current Protection
Power Dissipation
The maximum internal power dissipation allowed is directly
related to the maximum junction temperature. If the maximum
junction temperature exceeds 150°C, some performance
Rev. 2 December 2002
Driving a capacitive load introduces phase-lag into the output
signal, which reduces phase margin in the amplifier. The
unity gain follower is the most sensitive configuration. In a
unity gain follower configuration, the FAN4272 requires a
75Ω series resistor to drive a 100pF load.
7
DATA SHEET
FAN4272
Layout Considerations
General layout and supply bypassing play major roles in high
frequency performance. Fairchild has evaluation boards to
use as a guide for high frequency layout and as aid in device
testing and characterization. Follow the steps below as a
basis for high frequency layout:
• Include 6.8µF and 0.01µF ceramic capacitors
• Place the 6.8µF capacitor within 0.75 inches of the
power pin
• Place the 0.01µF capacitor within 0.1 inches of the
power pin
• Remove the ground plane under and around the part,
especially near the input and output pins to reduce
parasitic capacitance
• Minimize all trace lengths to reduce series inductances
Refer to the evaluation board layouts shown in Figure 6 for
more information.
Evaluation Board Information
The following evaluation boards are available to aid in the
testing and layout of this device:
Eval Bd
Description
Products
KEB006
Dual Channel, Dual Supply,
8 lead SOIC
FAN4272AM8
KEB010
Dual Channel, Dual Supply,
8 lead MSOP
FAN4272AMU8
Figure 5: Evaluation Board Schematic
Evaluation board schematics and layouts are shown in Figure
5 and Figure 6.
8
Rev. 2 December 2002
FAN4272
DATA SHEET
FAN4272 Evaluation Board Layout
Figure 6a: KEB006 (top side)
Figure 6b: KEB006 (bottom side)
Figure 6c: KEB010 (top side)
Figure 6d: KEB010 (bottom side)
Rev. 2 December 2002
9
DATA SHEET
FAN4272
FAN4272 Package Dimensions
SOIC-8
D
SOIC
SYMBOL
A1
B
C
D
E
e
H
h
L
A
7°
e
ZD
CL
CL
Pin No. 1
E
H
B
ZD
A2
DETAIL-A
L
NOTE:
h x 45°
A
A1
DETAIL-A
1. All dimensions are in millimeters.
2. Lead coplanarity should be 0 to 0.10mm (.004") max.
3. Package surface finishing:
(2.1) Top: matte (charmilles #18~30).
(2.2) All sides: matte (charmilles #18~30).
(2.3) Bottom: smooth or matte (charmilles #18~30).
4. All dimensions excluding mold flashes and end flash
from the package body shall not exceed o.152mm (.006)
per side(d).
α
A2
C
e
MSOP
02
S
MSOP-8
t1
R1
t2
E/2 2X
–H–
R
Gauge
Plane
E1 3 7
0.25mm
–B–
L1
b
ccc A B C
2
01
L
03
2
E3
E4
1
c
Detail A
Scale 40:1
c1
2
4
6
–C–
D2
A2
A1
A
Detail A
E1
E
D
3
E2
A
–A–
b
bbb M A B C
b1
Section A - A
5
A
aaa A
4
NOTE:
1 All dimensions are in millimeters (angle in degrees), unless otherwise specified.
10
MIN
MAX
0.10
0.25
0.36
0.46
0.19
0.25
4.80
4.98
3.81
3.99
1.27 BSC
5.80
6.20
0.25
0.50
0.41
1.27
1.52
1.72
8
0
0.53 ref
1.37
1.57
2
Datums – B – and – C – to be determined at datum plane – H – .
3
Dimensions "D" and "E1" are to be determined at datum – H – .
4
Dimensions "D2" and "E2" are for top package and dimensions "D" and "E1" are for bottom package.
5
Cross sections A – A to be determined at 0.13 to 0.25mm from the leadtip.
6
Dimension "D" and "D2" does not include mold flash, protrusion or gate burrs.
7
Dimension "E1" and "E2" does not include interlead flash or protrusion.
SYMBOL
MIN
A
1.10
A1
0.10
A2
0.86
D
3.00
D2
2.95
E
4.90
E1
3.00
E2
2.95
E3
0.51
E4
0.51
R
0.15
R1
0.15
t1
0.31
t2
0.41
b
0.33
b1
0.30
c
0.18
c1
0.15
01
3.0°
02
12.0°
03
12.0°
L
0.55
L1
0.95 BSC
aaa
0.10
bbb
0.08
ccc
0.25
e
0.65 BSC
S
0.525 BSC
MAX
–
±0.05
±0.08
±0.10
±0.10
±0.15
±0.10
±0.10
±0.13
±0.13
+0.15/-0.06
+0.15/-0.06
±0.08
±0.08
+0.07/-0.08
±0.05
±0.05
+0.03/-0.02
±3.0°
±3.0°
±3.0°
±0.15
–
–
–
–
–
–
Rev. 2 December 2002
DATA SHEET
FAN4272
Ordering Information
Model
Part Number
Package
Container
Pack Qty
FAN4272
FAN4272AM8X
SOIC-8
Reel
2500
FAN4272
FAN4272AMU8X
MSOP-8
Reel
3000
Temperature range for all parts: -40°C to +125°C.
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICES TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN.
FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY
LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE
PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:
1.
Life support devices or systems are devices or systems which, (a) are intended for
surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform
when properly used in accordance with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury of the user.
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2.
A critical component in any component of a life support device or system whose failure
to perform can be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or effectiveness.
© 2002 Fairchild Semiconductor Corporation