TPA032D03 10-W MONO CLASS-D AUDIO POWER AMPLIFIER SLOS283A – DECEMBER 1999 – REVISED MARCH 2000 D D D D D D D D D Extremely Efficient Class-D Mono Operation Drives Mono Speaker, Plus Stereo Headphones 10-W BTL Output Into 4 Ω From 12 V 32-W Peak Music Power Fully Specified for 12-V Operation Low Shutdown Current Class-AB Headphone Amplifier Thermally-Enhanced PowerPAD SurfaceMount Packaging Thermal and Under-Voltage Protection description DCA PACKAGE (TOP VIEW) SHUTDOWN MUTE MODE INN INP COMP AGND VDD PVDD OUTP OUTP PGND PGND OUTN OUTN PVDD HPREG HPLOUT HPLIN AGND PVDD VCP HPDL CP1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 COSC AGND AGND AGND AGND AGND FAULT0 FAULT1 PVDD NC NC PGND PGND NC NC PVDD HPVCC HPROUT HPRIN V2P5 PVDD PGND HPDR CP2 The TPA032D03 is a monolithic power IC mono audio amplifier that operates in extremely efficient Class-D operation, using the high switching speed of power DMOS transistors to replicate the analog input signal through high-frequency switching of the output stage. This allows the TPA032D03 to be configured as a bridge-tied load (BTL) amplifier capable of delivering up to 10 W of continuous average power into a 4-Ω load at 0.5% THD+N from a 12-V power supply in the high-fidelity audio frequency range (20 Hz to 20 kHz). A BTL NC – No internal connection configuration eliminates the need for external coupling capacitors on the output. Included is a Class-AB headphone amplifier with interface logic to select between the two modes of operation. Only one amplifier is active at any given time, and the other is in power-saving sleep mode. Also, a chip-level shutdown control is provided to limit total supply current to 20 µA, making the device ideal for battery-powered applications. The output stage is compatible with a range of power supplies from 8 V to 14 V. Protection circuitry is included to increase device reliability: thermal and under-voltage shutdown, with a status feedback terminal for use when any error condition is encountered. The high switching frequency of the TPA032D03 allows the output filter to consist of three small capacitors and two small inductors per channel. The high switching frequency also allows for good THD+N performance. The TPA032D03 is offered in the thermally enhanced 48-pin PowerPAD TSSOP surface-mount package (designator DCA). Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a trademark of Texas Instruments Incorporated. Copyright 2000, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 + _ INP INN 10 kΩ MODE MUTE PVDD VCP POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 COMP + _ VDD SHUTDOWN CONTROL and STARTUP LOGIC 10 kΩ 1.5 V VDD THERMAL DETECT GATE DRIVE PVDD PVDD GATE DRIVE HPREG 5-V REGULATOR and BIASES HPVCC V2P5 COSC RAMP GENERATOR HPLIN VCP-UVLO DETECT _ + HPLOUT HPVCC DOUBLER CHARGE PUMP + _ HPROUT HPRIN HP DEPOP AGND CP1 CP2 VCP NOTE A: VDD and PVDD are externally connected. AGND and PGND are externally connected. PVDD PGND HPDL HPDR Template Release Date: 7–11–94 LPVDD TPA032D03 10-W MONO CLASS-D AUDIO POWER AMPLIFIER PVDD PVDD SLOS283A – DECEMBER 1999 – REVISED MARCH 2000 FAULT1 FAULT0 OUTN OUTP schematic 2 PVDD VCP TPA032D03 10-W MONO CLASS-D AUDIO POWER AMPLIFIER SLOS283A – DECEMBER 1999 – REVISED MARCH 2000 Terminal Functions TERMINAL NAME AGND DESCRIPTION NO. 7, 20, 43, 44, 45, 46, 47 Analog ground for headphone and Class-D analog sections COMP 6 Compensation capacitor terminal for Class-D amplifier COSC 48 Connect a capacitor from analog ground to this terminal to set the frequency of the ramp reference signal. CP1 24 First diode node for charge pump CP2 25 First inverter switching node for charge pump FAULT0 42 Logic level fault0 output signal. Lower order bit of the two fault signals with open drain output. FAULT1 41 Logic level fault1 output signal. Higher order bit of the two fault signals with open drain output. HPDL 23 Depop control for left headphone HPDR 26 Depop control for right headphone HPLIN 19 Headphone amplifier left input HPLOUT 18 Headphone amplifier left output HPREG 17 5-V regulator output. This terminal requires a 1-µF capacitor to ground for stability reasons. HPRIN 30 Headphone amplifier right input HPROUT 31 Headphone amplifier right output HPVCC INN 32 5V supply to headphone amplifier and logic. This terminal is typically connected to HPREG. 4 Class-D negative input INP 5 Class-D positive input MODE 3 TTL logic-level mode input signal. When MODE is held low, the main Class-D amplifier is active. When MODE is held > high, the head phone amplifier is active. MUTE 2 Active-low TTL logic-level mute input signal. When MUTE is held low, the selected amplifier is muted. When MUTE is held > high, the device operates normally. When the Class-D amplifier is muted, the low-side output transistors are turned on, shorting the load to ground. NC 34, 35, 38, 39 No connection OUTN 14, 15 Class-D amplifier negative output of H-bridge OUTP 10, 11 Class-D amplifier positive output of H-bridge PGND 12, 13 Power ground for H–bridge only PGND 27 PGND 36, 37 PVDD 9, 16, 21, 28, 33, 40 Power ground for charge pump only Power ground for H-bridge only VDD supply for charge-pump, headphone regulator, Class-D amplifier, and gate drive circuitry SHUTDOWN 1 Active-low TTL logic-level shutdown input signal. When SHUTDOWN is held low, the device goes into shutdown mode. When SHUTDOWN is held high, the device operates normally. V2P5 29 2.5V internal reference bypass. This terminal requires a capacitor to ground. VCP 22 Connect a capacitor from this terminal to power ground to provide storage for the charge pump output voltage. VDD 8 VDD bias supply for analog circuitry. This terminal needs to be well filtered to prevent degrading the device performance. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 TPA032D03 10-W MONO CLASS-D AUDIO POWER AMPLIFIER SLOS283A – DECEMBER 1999 – REVISED MARCH 2000 Class-D amplifier faults Table 1. Class-D Amplifier Fault Table FAULT 0 FAULT 1 1 1 No fault. The device is operating normally. DESCRIPTION 0 1 Charge pump under-voltage lock-out (VCP-UV) fault. All low-side transistors are turned on, shorting the load to ground. Once the charge pump voltage is restored, normal operation resumes, but FAULT1 is still active. This is not a latched fault, however. FAULT1 is cleared by cycling MUTE, SHUTDOWN, or the power supply. 0 0 Thermal fault. All the low-side transistors are turned on, shorting the load to ground. Once the junction temperature drops 20°C, normal operation resumes (not a latched fault). But the FAULTx terminals are still set and are cleared by cycling MUTE, SHUTDOWN, or the power supply. headphone amplifier faults The thermal fault remains active when the device is in head phone mode. This fault operation has exactly the same as it does for the Class-D amplifier (see Table 1). If HPVCC drops below approximately 4.5 V, the head phone is disabled. Once HPVCC exceeds approximately 4.5 V, the head phone amplifier is re-enabled. No fault is reported to the user. AVAILABLE OPTIONS TA PACKAGED DEVICES TSSOP† (DCA) – 40°C to 125°C TPA032D03DCA † The DCA package is available in left-ended tape and reel. To order a taped and reeled part, add the suffix R to the part number (e.g., TPA032D03DCAR). 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPA032D03 10-W MONO CLASS-D AUDIO POWER AMPLIFIER SLOS283A – DECEMBER 1999 – REVISED MARCH 2000 absolute maximum ratings over operating free-air temperature range, TC = 25°C (unless otherwise noted)† Supply voltage, (VDD, PVDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 V Headphone supply voltage, (HPVCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Input voltage, VI (MUTE, MODE, SHUTDOWN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 7 V Output current, IO (FAULT0, FAULT1), open drain terminated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 mA Supply/load voltage, (FAULT0, FAULT1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Charge pump voltage, VCP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PVDD + 20 V Continuous H-bridge output current (1 H-bridge conducting) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.5 A Pulsed H-Bridge output current, each output, Imax (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 A Continuous HPREG output current, IO (HPREG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 mA Continuous total power dissipation, TC = 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 150°C Operating case temperature range, TC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 125°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 260°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: Pulse duration = 10 ms, duty cycle 2% v DISSIPATION RATING TABLE PACKAGE TA ≤ 25°C‡ POWER RATING DERATING FACTOR ABOVE TA = 25°C TA = 70°C POWER RATING TA = 85°C POWER RATING DCA 5.6 W 44.8 mW/°C 3.6 W 2.9 W ‡ Please see the Texas Instruments document, PowerPAD Thermally Enhanced Package Application Report (literature number SLMA002), for more information on the PowerPAD package. The thermal data was measured on a PCB layout based on the information in the section entitled Texas Instruments Recommended Board for PowerPAD on page 33 of the before mentioned document. recommended operating conditions MIN Supply voltage, VDD, PVDD Headphone supply voltage, HPVCC High-level input voltage, VIH (MUTE, MODE, SHUTDOWN) Low-level input voltage, VIL (MUTE, MODE, SHUTDOWN) NOM 8 14 V 5.5 V 2 VDD + 0.3 V 0.8 V Audio inputs, LINN, LINP, RINN, RINP, HPLIN, HPRIN, differential input voltage 1 100 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 UNIT 4.5 – 0.3 PWM frequency MAX 250 500 V VRMS kHZ 5 TPA032D03 10-W MONO CLASS-D AUDIO POWER AMPLIFIER SLOS283A – DECEMBER 1999 – REVISED MARCH 2000 electrical characteristics Class-D amplifier, VDD = PVDD = 12 V, RL = 4 Ω to 8 Ω, TA = 25°C, See Figure 1 (unless otherwise noted) PARAMETER TEST CONDITIONS IDD IDD(Mute) Power supply rejection ratio Supply current VDD = PVDD = 11 V to 13 V No output filter connected Supply current, mute mode IDD(S/D) |IIH| MIN TYP MAX –40 UNIT dB 25 35 mA MUTE = 0 V 10 18 mA Supply current, shutdown mode SHUTDOWN = 0 V 20 30 µA High-level input current (MUTE, MODE, SHUTDOWN) VIH = 5.25 V 10 µA |IIL| Low-level input current (MUTE, MODE, SHUTDOWN) VIL = – 0.3 V 10 µA rDS(on) Static drain-to-source on-state resistance (high-side + low-side FETs) IDD = 0.5 A 800 mΩ rDS(on) Matching, high-side to high-side, low-side to low-side, same channel 720 95% 98% operating characteristics, Class-D amplifier, VDD = PVDD = 12 V, RL = 4 Ω, TA = 25°C, See Figure 1 (unless otherwise noted) PARAMETER PO AV TEST CONDITIONS Output power f = 1 kHz, THD = 0.5%, Device soldered on PCB, See Note 2 Efficiency PO = 10 W, f = 1 kHz MIN Dynamic range BOM f = 1 kHz 6 25 dB dB 80 dB –50 Maximum output power bandwidth POST OFFICE BOX 655303 10 • DALLAS, TEXAS 75265 W –60 20 ZI Input impedance NOTE 2: Output power is thermally limited, TA = 23°C UNIT 77% Noise floor Frequency response bandwidth, post output filter, – 3 dB MAX 10 Gain Crosstalk TYP dB 20 000 Hz 20 kHz kΩ TPA032D03 10-W MONO CLASS-D AUDIO POWER AMPLIFIER SLOS283A – DECEMBER 1999 – REVISED MARCH 2000 operating characteristics, Class-D amplifier, VDD = PVDD = 12 V, RL = 8 Ω, TA = 25°C, See Figure 2 (unless otherwise noted) PARAMETER PO AV TEST CONDITIONS Output power, THD = 0.5% Device soldered on PCB, See Note 2 Efficiency PO = 7.5 W, f = 1 kHz MIN Dynamic range f = 1 kHz Frequency response bandwidth, post output filter, – 3 dB UNIT W 85% Noise floor BOM MAX 7.5 Gain Crosstalk TYP 25 dB –60 dB 80 dB –50 dB 20 Maximum output power bandwidth ZI Input impedance NOTE 2: Output power is thermally limited, TA = 85°C 20 000 Hz 20 kHz 10 kΩ electrical characteristics, headphone amplifier, HPVCC = 5 V, RL = 32 Ω, TA = 25°C, See Figure 3 (unless otherwise noted) PARAMETER TEST CONDITIONS MIN Power supply rejection ratio TYP MAX –60 Uncompensated gain range –1 UNIT dB –10 V/V IDD IDD(MUTE) Supply current 9 12 mA Supply current, mute mode 9 12 mA IDD(S/D) Supply current, shutdown mode 20 30 µA operating characteristics, headphone amplifier, HPVCC = 5V, RL = 32 Ω, gain set at –10V/V, TA = 25°C, See Figure 3 (unless otherwise noted) PARAMETER PO TEST CONDITIONS Output power THD = 0.5%, f = 1 kHz Crosstalk f = 1 kHz Frequency response bandwidth, post output filter, – 3 dB BOM Maximum output power bandwidth ZI Input impedance MIN TYP MAX 50 mW –60 20 UNIT dB 20 kHz 20 kHz >1 MΩ operating characteristics, HPREG 5-V regulator, TA = 25°C (unless otherwise noted) PARAMETER VO TEST CONDITIONS VDD = PVDD = LPVDD = RPVDD = 8 V to 14 V, IO = 0 to 90 mA Output voltage MIN TYP 4.5 MAX 5.5 IOS Short-circuit output current VDD = PVDD = LPVDD = RPVDD = 8 V to 14 V† 90 † Pulse width must be limited to prevent exceeding the maximum operating virtual junction temperature of 150°C. UNIT V mA thermal shutdown PARAMETER TEST CONDITIONS Thermal shutdown temperature Thermal shutdown hysteresis POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MIN TYP MAX UNIT 165 °C 30 °C 7 TPA032D03 10-W MONO CLASS-D AUDIO POWER AMPLIFIER SLOS283A – DECEMBER 1999 – REVISED MARCH 2000 PARAMETER MEASUREMENT INFORMATION FAULT0 FAULT1 1 HPREG 2 HPREG 3 SHUTDOWN OUTN MUTE 42 41 14,15 MODE 15 µH 0.22 µF 1 µF 0.22 µF OUTP 1 µF 5 Balanced Differential Input Signal 4 1 µF 15 µH INP INN V2P5 6 10,11 29 COMP 1 µF 1000 pF 48 VDD COSC 1000 pF HPLOUT HPROUT HPREG 7,20,46,47 12,13,27,36,37 AGND HPDR 9, 16, 21, 28, 33, 34 19 500 kΩ 30 32 To HPREG 18 31 17 26 To HPVCC 0.1 µF CP1 23 24 PVDD 47 nF HPLIN CP2 HPRIN VCP 25 22 0.1 µF HPVCC 100 kΩ Figure 1. 12-V, 4-Ω Test Circuit 8 12 V PGND HPDL 12 V 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 4Ω TPA032D03 10-W MONO CLASS-D AUDIO POWER AMPLIFIER SLOS283A – DECEMBER 1999 – REVISED MARCH 2000 PARAMETER MEASUREMENT INFORMATION FAULT0 FAULT1 1 HPREG 2 HPREG 3 SHUTDOWN OUTN MUTE 42 41 14,15 MODE 30 µH 0.1 µF 1 µF 8Ω 0.1 µF OUTP 1 µF 5 Balanced Differential Input Signal 4 1 µF 30 µH INP INN V2P5 6 10,11 29 COMP 1 µF 1000 pF 48 COSC VDD 1000 pF HPLOUT HPROUT 7,20,46,47 12,13,27,36,37 AGND HPREG PGND HPDR 9, 16, 21, 28, 33, 34 12 V 19 500 kΩ CP1 HPLIN 12 V 18 31 17 26 To HPVCC 0.1 µF 23 24 47 nF 30 32 To HPREG HPDL PVDD 8 HPRIN CP2 HPVCC VCP 25 22 0.1 µF 100 kΩ Figure 2. 12-V, 8-Ω Test Circuit POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 TPA032D03 10-W MONO CLASS-D AUDIO POWER AMPLIFIER SLOS283A – DECEMBER 1999 – REVISED MARCH 2000 PARAMETER MEASUREMENT INFORMATION HPREG HPREG HPREG 1 2 3 SHUTDOWN FAULT0 MUTE MODE FAULT1 OUTN 5 4 6 INP OUTP 41 14,15 10,11 INN COMP V2P5 1000 pF 48 42 29 1 µF COSC 470 pF VDD 7,20,46,47 12,13,27,36,37 AGND PGND HPLOUT HPROUT HPREG HPDR 9, 16, 21, 28, 33, 34 12 V PVDD HPDL HPLOUT CP1 19 100 kΩ 0.1 µF VDD 500 kΩ To HPREG 17 CP2 HPLIN VCP 100 kΩ 30 32 32 µF 23 24 25 22 0.1 µF HPRIN HPVCC HPROUT 0.1 µF Figure 3. Headphone Test Circuit POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 32 µF 32 Ω HPVCC 26 100 kΩ 10 12 V 47 nF 100 kΩ Right SE HP Input 18 31 100 kΩ 0.1 µF Left SE HP Input 8 32 Ω TPA032D03 10-W MONO CLASS-D AUDIO POWER AMPLIFIER SLOS283A – DECEMBER 1999 – REVISED MARCH 2000 APPLICATION INFORMATION HPREG 1 To System Control 100 kΩ 12 V 100 kΩ MUTE 3 FAULT0 MODE 9,16 1 µF 1 µF 10 µF SHUTDOWN 2 FAULT1 PVDD 1 µF OUTN 5 Left Class-D Balanced Differential Input Signal To System Control 41 0.22 µF 1 µF INN 6 OUTP COMP 1000 pF 48 V2P5 COSC VDD 1000 pF 7,20,46,47 AGND 12,13,27,36,37 21, 28, 33, 34 1 µF PGND HPLOUT PVDD HPROUT HPLOUT Left SE HP Input HPREG HPDR 100 kΩ 0.1 µF 19 HPDL HPLIN 10,11 15 µH 29 8 12 V 100 kΩ 0.1 µF VDD 500 kΩ To HPREG 100 kΩ 32 HPVCC 100 kΩ 220 µF MODE 18 220 µF 31 17 HPVCC 26 23 1 kΩ 30 1 µF 1 µF 100 kΩ Right SE HP Input 4Ω 0.22 µF 1 µF 12 V 15 µH 14,15 INP 4 100 kΩ 42 1 kΩ HPRIN HPVCC CP1 24 47 nF HPROUT CP2 VCP 100 kΩ 25 22 0.1 µF 0.1 µF NOTE A: = power ground and = analog ground Figure 4. TPA032D03 Typical Configuration Application Circuit POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 TPA032D03 10-W MONO CLASS-D AUDIO POWER AMPLIFIER SLOS283A – DECEMBER 1999 – REVISED MARCH 2000 APPLICATION INFORMATION input capacitor, CI In the typical application an input capacitor, CI, is required to allow the amplifier to bias the input signal to the proper dc level for optimum operation. In this case, CI and ZI, the TPA032D03’s input resistance forms a high-pass filter with the corner frequency determined in equation 8. –3 dB f c(highpass) + 2 p Z1 C (8) I I ZI is nominally 10 kΩ fc The value of CI is important to consider as it directly affects the bass (low frequency) performance of the circuit. Consider the example where the specification calls for a flat bass response down to 40 Hz. Equation 8 is reconfigured as equation 9. CI + 2 p 1Z fc (9) I In this example, CI is 0.40 µF so one would likely choose a value in the range of 0.47 µF to 1 µF. A low-leakage tantalum or ceramic capacitor is the best choice for the input capacitors. When polarized capacitors are used, the positive side of the capacitor should face the amplifier input, as the dc level there is held at 1.5 V, which is likely higher than the source dc level. Please note that it is important to confirm the capacitor polarity in the application. differential input The TPA032D03 has differential inputs to minimize distortion at the input to the IC. Since these inputs nominally sit at 1.5 V, dc-blocking capacitors are required on each of the four input terminals. If the signal source is single-ended, optimal performance is achieved by treating the signal ground as a signal. In other words, reference the signal ground at the signal source, and run a trace to the dc-blocking capacitor, which should be located physically close to the TPA032D03. If this is not feasible, it is still necessary to locally ground the unused input terminal through a dc-blocking capacitor. power supply decoupling, CS The TPA032D03 is a high-performance Class-D CMOS audio amplifier that requires adequate power supply decoupling to ensure the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is achieved by using two capacitors of different types that target different types of noise on the power supply leads. For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-seriesresistance (ESR) ceramic capacitor, typically 0.1 µF placed as close as possible to the device’s various VDD leads, works best. For filtering lower-frequency noise signals, a larger aluminum electrolytic capacitor of 10 µF or greater placed near the audio power amplifier is recommended. The TPA032D03 has several different power supply terminals. This was done to isolate the noise resulting from high-current switching from the sensitive analog circuitry inside the IC. 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPA032D03 10-W MONO CLASS-D AUDIO POWER AMPLIFIER SLOS283A – DECEMBER 1999 – REVISED MARCH 2000 APPLICATION INFORMATION mute and shutdown modes The TPA032D03 employs both a mute and a shutdown mode of operation designed to reduce supply current, IDD, to the absolute minimum level during periods of non-use for battery-power conservation. The SHUTDOWN input terminal should be held high during normal operation when the amplifier is in use. Pulling SHUTDOWN low causes the outputs to mute and the amplifier to enter a low-current state, IDD = 20 µA. Mute mode alone reduces IDD to 10 mA. using low-ESR capacitors Low-ESR capacitors are recommended throughout this applications section. A real (as opposed to ideal) capacitor can be modeled simply as a resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes the beneficial effects of the capacitor in the circuit. The lower the equivalent value of this resistance the more the real capacitor behaves like an ideal capacitor. output filter components The output inductors are key elements in the performance of the class-D audio amplifier system. It is important that these inductors have a high enough current rating and a relatively constant inductance over frequency and temperature. The current rating should be higher than the expected maximum current to avoid magnetically saturating the inductor. When saturation occurs, the inductor loses its functionality and looks like a short circuit to the PWM signal, which increases the harmonic distortion considerably. A shielded inductor may be required if the class-D amplifier is placed in an EMI sensitive system; however, the switching frequency is low for EMI considerations and should not be an issue in most systems. The dc series resistance of the inductor should be low to minimize losses due to power dissipation in the inductor, which reduces the efficiency of the circuit. Capacitors are important in attenuating the switching frequency and high frequency noise, and in supplying some of the current to the load. It is best to use capacitors with low equivalent-series-resistance (ESR). A low ESR means that less power is dissipated in the capacitor as it shunts the high-frequency signals. Placing these capacitors in parallel also parallels their ESR, effectively reducing the overall ESR value. The voltage rating is also important, and, as a rule of thumb, should be 2 to 3 times the maximum rms voltage expected to allow for high peak voltages and transient spikes. These output filter capacitors should be stable over temperature since large currents flow through them. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13 TPA032D03 10-W MONO CLASS-D AUDIO POWER AMPLIFIER SLOS283A – DECEMBER 1999 – REVISED MARCH 2000 APPLICATION INFORMATION efficiency of class-D vs linear operation Amplifier efficiency is defined as the ratio of output power delivered to the load to power drawn from the supply. In the efficiency equation below, PL is power across the load and PSUP is the supply power. Efficiency + h + PP L SUP A high-efficiency amplifier has a number of advantages over one with lower efficiency. One of these advantages is a lower power requirement for a given output, which translates into less waste heat that must be removed from the device, smaller power supply required, and increased battery life. Audio power amplifier systems have traditionally used linear amplifiers, which are well known for being inefficient. Class-D amplifiers were developed as a means to increase the efficiency of audio power amplifier systems. A linear amplifier is designed to act as a variable resistor network between the power supply and the load. The transistors operate in their linear region and voltage that is dropped across the transistors (in their role as variable resistors) is lost as heat, particularly in the output transistors. The output transistors of a class-D amplifier switch from full OFF to full ON (saturated) and then back again, spending very little time in the linear region in between. As a result, very little power is lost to heat because the transistors are not operated in their linear region. If the transistors have a low on-resistance, little voltage is dropped across them, further reducing losses. The ideal class-D amplifier is 100% efficient, which assumes that both the on-resistance (rDS(on)) and the switching times of the output transistors are zero. the ideal class-D amplifier To illustrate how the output transistors of a class-D amplifier operate, a half-bridge application is examined first (see Figure 5). VDD M1 VA IL IOUT + L M2 RL CL C VOUT – Figure 5. Half-Bridge Class-D Output Stage Figures 6 and 7 show the currents and voltages of the half-bridge circuit. When transistor M1 is on and M2 is off, the inductor current is approximately equal to the supply current. When M2 switches on and M1 switches off, the supply current drops to zero, but the inductor keeps the inductor current from dropping. The additional inductor current is flowing through M2 from ground. This means that VA (the voltage at the drain of M2, as shown in Figure 5) transitions between the supply voltage and slightly below ground. The inductor and capacitor form a low-pass filter, which makes the output current equal to the average of the inductor current. The low pass filter averages VA, which makes VOUT equal to the supply voltage multiplied by the duty cycle. 14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPA032D03 10-W MONO CLASS-D AUDIO POWER AMPLIFIER SLOS283A – DECEMBER 1999 – REVISED MARCH 2000 APPLICATION INFORMATION the ideal class-D amplifier (continued) Control logic is used to adjust the output power, and both transistors are never on at the same time. If the output voltage is rising, M1 is on for a longer period of time than M2. Inductor Current Output Current Current Supply Current 0 M1 on M1 off M1 on M2 off M2 on M2 off Time Figure 6. Class-D Currents VDD Voltage VA VOUT 0 M1 on M1 off M1 on M2 off M2 on M2 off Time Figure 7. Class-D Voltages POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15 TPA032D03 10-W MONO CLASS-D AUDIO POWER AMPLIFIER SLOS283A – DECEMBER 1999 – REVISED MARCH 2000 APPLICATION INFORMATION the ideal class-D amplifier (continued) Given these plots, the efficiency of the class-D device can be calculated and compared to an ideal linear amplifier device. In the derivation below, a sine wave of peak voltage (VP) is the output from an ideal class-D and linear amplifier and the efficiency is calculated. CLASS-D V L(rms) + Ǹ2 V L(rms) ǒ Ǔ+ Average I DD PL LINEAR VP + VL + VDD P SUP + V DD V L(rms) PL V DD IL P SUP Efficiency I L(rms) V L(rms)2 RL +2 R ǒ Ǔ+p ǒ Ǔ P SUP V L(rms) Efficiency V DD L VP 2 + VDD RL ǒ Ǔ+ Average I DD V DD V P RL 2 p + h + PP L SUP + h + PP L Efficiency SUP Efficiency V P2 Average I DD Average I DD I L(rms) + + Ǹ2 VP V P2 2R L + h + VDD V 2 p + h +1 Efficiency + h + p4 V V P RL P DD In the ideal efficiency equations, assume that VP = VDD, which is the maximum sine wave magnitude without clipping. Then, the highest efficiency that a linear amplifier can have without clipping is 78.5%. A class-D amplifier, however, can ideally have an efficiency of 100% at all power levels. The derivation above applies to an H-bridge as well as a half-bridge. An H-bridge requires approximately twice the supply current but only requires half the supply voltage to achieve the same output power—factors that cancel in the efficiency calculation. The H-bridge circuit is shown in Figure 8. VDD M1 VA VDD IL IOUT M4 + VOUT – L M2 L RL CL CL Figure 8. H-Bridge Class-D Output Stage 16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 M3 TPA032D03 10-W MONO CLASS-D AUDIO POWER AMPLIFIER SLOS283A – DECEMBER 1999 – REVISED MARCH 2000 APPLICATION INFORMATION losses in a real-world class-D amplifier Losses make class-D amplifiers nonideal, and reduce the efficiency below 100%. These losses are due to the output transistors having a nonzero rDS(on), and rise and fall times that are greater than zero. The loss due to a nonzero rDS(on) is called conduction loss, and is the power lost in the output transistors at nonswitching times, when the transistor is on (saturated). Any rDS(on) above 0 Ω causes conduction loss. Figure 9 shows an H-bridge output circuit simplified for conduction loss analysis and can be used to determine new efficiencies with conduction losses included. VDD = 12 V rDS(on) 0.36 Ω 5 MΩ rDS(off) 0.36 Ω rDS(on) RL 4Ω rDS(off) 5 MΩ Figure 9. Output Transistor Simplification for Conduction Loss Calculation The power supplied, PSUP, is determined to be the power output to the load plus the power lost in the transistors, assuming that there are always two transistors on. Efficiency + h + PP L SUP Efficiency Efficiency + h + I2 2r + h + 2r DS(on) RL ǒ ǒ DS(on) + h + 95% Efficiency + h + 85% Efficiency I 2R L ) I2RL ) RL Ǔ + 0.1 Ω, RL + 4 Ω at all output levels r DS(on) + 0.36 Ω, R L + 4 Ω at all output levels r DS(on) POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Ǔ 17 TPA032D03 10-W MONO CLASS-D AUDIO POWER AMPLIFIER SLOS283A – DECEMBER 1999 – REVISED MARCH 2000 APPLICATION INFORMATION losses in a real-world class-D amplifier (continued) Losses due to rise and fall times are called switching losses. A diagram of the output, showing switching losses, is shown in Figure 10. 1 f tSWon SW tSWoff + = tSW Figure 10. Output Switching Losses Rise and fall times are greater than zero for several reasons. One is that the output transistors cannot switch instantaneously because (assuming a MOSFET) the channel from drain to source requires a specific period of time to form. Another is that transistor gate-source capacitance and parasitic resistance in traces form RC time constants that also increase rise and fall times. Switching losses are constant at all output power levels, which means that switching losses can be ignored at high power levels in most cases. At low power levels, however, switching losses must be taken into account when calculating efficiency. Switching losses are dominated by conduction losses at the high output powers, but should be considered at low powers. The switching losses are automatically taken into account if you consider the quiescent current with the output filter and load. class-D effect on power supply Efficiency calculations are an important factor for proper power supply design in amplifier systems. Table 2 shows Class-D efficiency at a range of output power levels (per channel) with a 1-kHz sine wave input. The maximum power supply draw from a stereo 10-W per channel audio system with 4-Ω loads and a 12-V supply is almost 26 W. A similar linear amplifier such as the TPA032D03 has a maximum draw of greater than 50 W under the same circumstances. Table 2. Efficiency vs Output Power in 12-V 4-Ω H-Bridge Systems Output Power (W) Efficiency (%) Peak Voltage (V) Internal Dissipation (W) 0.5 41.7 2 0.35 2 66.7 4 0.5 5 75.1 6.32 0.83 8 78 77.9 8 8.94† 1.13 10 † High peak voltages cause the THD to increase 18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1.42 TPA032D03 10-W MONO CLASS-D AUDIO POWER AMPLIFIER SLOS283A – DECEMBER 1999 – REVISED MARCH 2000 APPLICATION INFORMATION class-D effect on power supply (continued) There is a minor power supply savings with a class-D amplifier versus a linear amplifier when amplifying sine waves. The difference is much larger when the amplifier is used strictly for music. This is because music has much lower RMS output power levels, given the same peak output power (see Figure 11); and although linear devices are relatively efficient at high RMS output levels, they are very inefficient at mid-to-low RMS power levels. The standard method of comparing the peak power to RMS power for a given signal is crest factor, whose equation is shown below. The lower RMS power for a set peak power results in a higher crest factor Crest Factor + 10 log PP PK rms Power PPK PRMS Time Figure 11. Audio Signal Showing Peak and RMS Power POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 19 TPA032D03 10-W MONO CLASS-D AUDIO POWER AMPLIFIER SLOS283A – DECEMBER 1999 – REVISED MARCH 2000 APPLICATION INFORMATION crest factor and thermal considerations A typical music CD requires 12 dB to 15 dB of dynamic headroom to pass the loudest portions without distortion as compared with the average power output. From the TPA032D03 data sheet, one can see that when the TPA032D03 is operating from a 12-V supply into a 4-Ω speaker that 20-W peaks are available. Converting watts to dB: P dB + 10 Log ǒǓ PW P ref + 10Log ǒ Ǔ+ 20 1 6 dB (17) Subtracting the crest factor restriction to obtain the average listening level without distortion yields: * 18 dB + * 12 dB (15 dB crest factor) 6.0 dB * 15 dB + * 9 dB (15 dB crest factor) 6.0 dB * 12 dB + * 6 dB (12 dB crest factor) 6.0 dB * 9 dB + * 3 dB (9 dB crest factor) 6.0 dB * 6 dB + * 0 dB (6 dB crest factor) 6.0 dB * 3 dB + 3 dB (3 dB crest factor) 6.0 dB Converting dB back into watts: PW + 10PdBń10 Pref + 315 mW (18 dB crest factor) + 630 mW (15 dB crest factor) + 1.25 W (12 dB crest factor) + 2.5 W (9 dB crest factor) + 5 W (6 dB crest factor) + 10 W (3 dB crest factor) (18) This is valuable information to consider when attempting to estimate the heat dissipation requirements for the amplifier system. Comparing the absolute worst case, which is 10 W of continuous power output with a 3 dB crest factor, against 12 dB and 15 dB applications drastically affects maximum ambient temperature ratings for the system. Using the power dissipation curves for a 12-V, 4-Ω system, the internal dissipation in the TPA032D03 and maximum ambient temperatures are shown in Table 3. 20 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPA032D03 10-W MONO CLASS-D AUDIO POWER AMPLIFIER SLOS283A – DECEMBER 1999 – REVISED MARCH 2000 APPLICATION INFORMATION crest factor and thermal considerations (continued) Table 3. TPA032D03 Power Rating, 12-V, 4-Ω, Stereo PEAK OUTPUT POWER (W) AVERAGE OUTPUT POWER POWER DISSIPATION (W/Channel) MAXIMUM AMBIENT TEMPERATURE 20 10 W (3 dB) 2.84 87°C 20 5 W (6 dB) 1.66 113°C 20 2.5 W (9 dB) 1.12 125°C 20 1.25 W (12 dB) 0.87 125°C 20 630 mW (15 dB) 0.7 125°C 20 315 mW (18 dB) 0.6 125°C The maximum ambient temperature depends on the heatsinking ability of the PCB system. Using the 0 CFM data from the dissipation rating table, the derating factor for the DCA package with 6.9 in2 of copper area on a multilayer PCB is 44.8 mW/°C. Converting this to ΘJA: Θ JA 1 + Derating 1 + 0.0448 + 22.3°CńW (19) To calculate maximum ambient temperatures, first consider that the numbers from the dissipation graphs are per channel so the dissipated heat needs to be doubled for two channel operation. Given ΘJA, the maximum allowable junction temperature, and the total internal dissipation, the maximum ambient temperature can be calculated with the following equation. The maximum recommended junction temperature for the TPA032D03 is 150 °C. The internal dissipation figures are taken from the Efficiency vs Output Power graphs. T A Max + TJ Max * ΘJA PD + 150 * 22.3 (0.35) + 125°C (15 dB crest factor) + 150 * 22.3 (1.42) + 118°C (3dB crest factor) (20) (Maximum recommended case temperature is 125°C) NOTE: Internal dissipation of 0.7 W is estimated for a 10-W system with a 15 dB crest factor per channel. The TPA032D03 is designed with thermal protection that turns the device off when the junction temperature surpasses 150°C to prevent damage to the IC. Table 3 was calculated for maximum listening volume without distortion. When the output level is reduced the numbers in the table change significantly. Also, using 8-Ω speakers dramatically increases the thermal performance by increasing amplifier efficiency. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 21 TPA032D03 10-W MONO CLASS-D AUDIO POWER AMPLIFIER SLOS283A – DECEMBER 1999 – REVISED MARCH 2000 THERMAL INFORMATION The thermally enhanced DCA package is based on the 56-pin TSSOP, but includes a thermal pad (see Figure 12) to provide an effective thermal contact between the IC and the PWB. Traditionally, surface-mount and power have been mutually exclusive terms. A variety of scaled-down TO-220-type packages have leads formed as gull wings to make them applicable for surface-mount applications. These packages, however, have only two shortcomings: they do not address the very low profile requirements (< 2 mm) of many of today’s advanced systems, and they do not offer a terminal-count high enough to accommodate increasing integration. On the other hand, traditional low-power surface-mount packages require power-dissipation derating that severely limits the usable range of many high-performance analog circuits. The PowerPAD package (thermally enhanced TSSOP) combines fine-pitch surface-mount technology with thermal performance comparable to much larger power packages. The PowerPAD package is designed to optimize the heat transfer to the PWB. Because of the very small size and limited mass of a TSSOP package, thermal enhancement is achieved by improving the thermal conduction paths that remove heat from the component. The thermal pad is formed using a patented lead-frame design and manufacturing technique to provide a direct connection to the heat-generating IC. When this pad is soldered or otherwise thermally coupled to an external heat dissipator, high power dissipation in the ultra-thin, fine-pitch, surface-mount package can be reliably achieved. Thermal Pad DIE Side View (a) DIE End View (b) Bottom View (c) Figure 12. Views of Thermally Enhanced DCA Package 22 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPA032D03 10-W MONO CLASS-D AUDIO POWER AMPLIFIER SLOS283A – DECEMBER 1999 – REVISED MARCH 2000 MECHANICAL DATA DCA (R-PDSO-G**) PowerPAD PLASTIC SMALL-OUTLINE PACKAGE 48 PINS SHOWN 0,27 0,17 0,50 48 0,08 M 25 Thermal Pad (See Note D) 6,20 6,00 8,30 7,90 0,15 NOM Gage Plane 1 24 0,25 A 0°– 8° 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 48 56 64 A MAX 12,60 14,10 17,10 A MIN 12,40 13,90 16,90 DIM 4073259/A 01/98 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. The package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane. This pad is electrically and thermally connected to the backside of the die and possibly selected leads. E. Falls within JEDEC MO-153 PowerPAD is a trademark of Texas Instruments. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 23 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Customers are responsible for their applications using TI components. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof. Copyright 2000, Texas Instruments Incorporated