ES5129 4-1/2 digit with LCD Features • Max. ±19,999 counts • QFP-44L and DIP-40L package • Input full scale range: 200mV or 2V • Built-in multiplexed LCD display driver • Underrange/Overrange outputs • 10µV resolution on 200mV scale • Display Hold • Precise 10:1 range select • True differential input and reference • Single power supply • Built-in inverters for RC oscillation circuit Application Digital Multi-Meter Description ES5129 is a 19,999-count analog-to-digital converter (ADC) with multiplexed LCD display driver. It drives 4-1/2 digits, 4 decimal points, polarity, continuity and low battery indicator segments. ES5129 requires a typical 9V power supply for ADC operation. And it generates a COMMON reference for analog circuit and a DGND reference for digital circuit and LCD driver circuit. ES5129 has a ±19,999 counts resolution on both 200.00mV and 2.0000V ranges. It features high impedance inputs, excellent differential linearity, true ratiometric operation and auto polarity. The only external active component required is a reference. The underrange and overrange outputs and the 10:1 range changing inputs facilitate the design of autoranging systems. Other features include low battery detection, continuity check, Display Hold and controllable decimal points. 1 07/03/01 ES5129 4-1/2 digit with LCD Pin Assignment DIP-40L 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 ES5129E OSC1 OSC3 ANNUNC B1, C1, CONT A1, G1, D1 F1, E1, DP1 B2, C2, LBAT A2, G2, D2 F2, E2, DP2 B3, C3, MINUS A3, G3, D3 F3, E3, DP3 B4, C4, BC5 A4, G4, D4 F4, E4, DP4 BP3 BP2 BP1 VDISP DP4/OR 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 OSC2 DP1 DP2 RANGE DGND REF_LO REF_HI IN_HI IN_LO BUFFER CREFCREF+ COMMON CONTINUITY CINT CAZ V+ VHOLD DP3/UR Pin Description DIP-40L Pin No Symbol Type Description 1 OSC1 I Input to first clock inverter. 2 OSC3 O Output of second clock inverter. 3 ANNUNC O Backplane squarewave output for driving annunctors. 4 B1, C1, CONT O Output to LCD segment. 5 A1, G1, D1 O Output to LCD segment. 6 F1, E1, DP1 O Output to LCD segment. 7 B2, C2, LBAT O Output to LCD segment. 8 A2, G2 ,D2 O Output to LCD segment. 2 07/03/01 ES5129 4-1/2 digit with LCD 9 10 11 12 13 14 15 16 17 18 19 F2, E2, DP2 B3, C3, MINUS A3, G3, D3 F3, E3, DP3 B4, C4, BC5 A4, G4, D4 F4, E4, DP4 BP3 BP2 BP1 VDISP O O O O O O O O O O P 20 DP4/OR I/O 21 DP3/UR I/O 22 LATCH/HOLD I/O 23 24 25 26 VV+ CAZ CINT P P I/O I/O 27 CONTINUITY I/O 28 29 30 31 32 33 34 35 36 37 38 39 COMMON CREF+ CREFBUFFER IN_LO IN_HI REF_HI REF_LO DGND RANGE DP2 DP1 O I/O I/O O I I I I O I I I 40 OSC2 I/O Output to LCD segment. Output to LCD segment. Output to LCD segment. Output to LCD segment. Output to LCD segment. Output to LCD segment. Output to LCD segment. LCD backplane signal LCD backplane signal LCD backplane signal Negative supply for display drivers. Input: Turns on most significant decimal point when HI. Output: Pulled HI when result count exceeds ±19,999. Input: Turn on the 2nd significant decimal point when HI. Output: Pulled HI when result count is less than ±1,000. Input: when floating, ES5129 operates in the free-run mode. When pulled high, the last display reading is held. When pulled LO, the result counter contents are shown incrementing during the de-integrate phase of cycle. Output: Negative going edge occurs when the data latche are upgraded. Can be used as a converter status signal. Negative power supply terminal Positive power supply terminal Integrator amplifier input Integrator amplifier output Input: when LO, continuity flag on the display is off. When HI, continuity flag is on. Output: HI when voltage between inputs is less than +200mV. LO when voltage between inputs is more than +200mV. Set common-mode voltage of 3.2V below V+. Positive connection to external reference capacitor Negative connection to external reference capacitor Buffer amplifier output Negative input voltage terminal Positive input voltage terminal Positive reference voltage terminal Negative reference voltage terminal Ground reference for digital section Pulled HIGH externally for 2V scale. When HI, decimal point 2 will be on. When HI, decimal point 1 will be on. Output of first clock inverter. Input of second clock inverter. 3 07/03/01 ES5129 4-1/2 digit with LCD Pin Assignment 1 2 3 4 5 6 7 8 9 10 11 33 32 31 30 29 28 27 26 25 24 23 REF_LO REF_HI IN_HI IN_LO BUFFER NC CREFCREF+ COMMON CONTINUITY CINT BP3 BP2 BP1 VDISP DP4_OR TEST2 DP3_UR HOLD VV+ CAZ 12 13 14 15 16 17 18 19 20 21 22 ES5129F F1, E1, DP1 B2, C2, LBAT A2, G2, D2 F2, E2, DP2 B3, C3, MINUS NC A3, G3, D3 F3, E3, DP3 B4, C4, BC5 A4, G4, D4 F4, E4, DP4 44 43 42 41 40 39 38 37 36 35 34 A1, G1, D1 B1, C1, CONT ANNUNC OSC3 OSC1 INT100 OSC2 DP1 DP2 RANGE DGND QFP-44L Pin Description QFP-44L Pin No Symbol Type Description 1 F1, E1, DP1 O Output to LCD segment. 2 B2, C2, LBAT O Output to LCD segment. 3 A2, G2 ,D2 O Output to LCD segment. 4 F2, E2, DP2 O Output to LCD segment. 5 B3, C3, MINUS O Output to LCD segment. 6 NC 7 A3, G3, D3 O Output to LCD segment. 8 F3, E3, DP3 O Output to LCD segment. 9 B4, C4, BC5 O Output to LCD segment. 4 07/03/01 ES5129 4-1/2 digit with LCD 10 11 12 13 14 15 16 A4, G4, D4 F4, E4, DP4 BP3 BP2 BP1 VDISP DP4/OR O O O O O P I/O 17 18 TEST2 DP3/UR O I/O 19 LATCH/HOLD I/O 20 21 22 23 24 VP V+ P CAZ I/O CINT I/O CONTINUITY I/O 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 COMMON CREF+ CREFNC BUFFER IN_LO IN_HI REF_HI REF_LO DGND RANGE DP2 DP1 OSC2 INT100 O I/O I/O O I I I I O I I I I/O I OSC1 I/O OSC3 I/O ANNUNC O B1, C1, CONT O A1, G1, D1 O Output to LCD segment. Output to LCD segment. LCD backplane signal LCD backplane signal LCD backplane signal Negative supply for display drivers. Input: Turns on most significant decimal point when HI. Output: Pulled HI when result count exceeds ±19,999. TEST pin. Not connect. Input: Turn on the 2nd significant decimal point when HI. Output: Pulled HI when result count is less than ±1,000. Input: when floating, ES5129 operates in the free-run mode. When pulled high, the last display reading is held. When pulled LO, the result counter contents are shown incrementing during the de-integrate phase of cycle. Output: Negative going edge occurs when the data latches are upgraded. Can be used as a converter status signal. Negative power supply terminal Positive power supply terminal Integrator amplifier input Integrator amplifier output Input: when LO, continuity flag on the display is off. When HI, continuity flag is on. Output: HI when voltage between inputs is less than +200mV LO when voltage between inputs is more than +200mV. Set common-mode voltage of 3.2V below V+. Positive connection to external reference capacitor Negative connection to external reference capacitor Buffer amplifier output Negative input voltage terminal Positive input voltage terminal Positive reference voltage terminal Negative reference voltage terminal Ground reference for digital section Pulled HIGH externally for 2V scale. When HI, decimal point 2 will be on. When HI, decimal point 1 will be on. Output of first clock inverter. Input of second clock inverter. Reduce the integration time to 1/10 when RANGE is set to high. The polarity of ADC will be ignored also. Input of first clock inverter. Output of second clock inverter. Backplane squarewave output for driving annunctors. Output to LCD segment. Output to LCD segment. 5 07/03/01 ES5129 4-1/2 digit with LCD Absolute Maximum Ratings Characteristic Supply Voltage (V+ to V-) Analog Input Voltage V+ AGND/DGND Digital Input Power Dissipation. Flat Package Operating Temperature Storage Temperature Rating 15V V- -0.6 to V+ +0.6 V+ ≧ (AGND/DGND+0.5V) AGND/DGND ≧ (V- -0.5V) V- -0.6 to DGND +0.6 500mW 0℃ to 70℃ -25℃ to 125℃ Electrical Characteristics TA=25℃, 9V between V+ and V- Parameter Test Condition Zero input reading Vin=0, 200mV scale Ratiometric reading Vin=Vref=1V Range=2V Rollover Error Linearity Error Common Voltage Common Sink Current Common Source Current DGND Voltage DGND Sink Current Min. Typ. Max Units -1 0 1 counts 9998 9999 +Vin=-Vin=199mV — — 2 counts 200mV Scale V+ to Common Δcommon=+0.1V Sink current form V+ Δcommon=-0.1V Source current to VV+ to DGND, V+ to V- =9V ΔDGND=+0.5V Sink current form V+ — 2.8 — 3.2 1 3.5 counts V 0.1 2 mA 10 200 µA 4.5 5 0.6 - — 1.0 1.4 mA 6.7 6.9 9 7.2 14 7.5 V V Supply Current excluding V+ to V- = 9V LCD display current Supply Voltage Range V+ to VLow Battery Flag V+ to V- 6 10000 counts 5.5 V mA 07/03/01 ES5129 4-1/2 digit with LCD Function Description 1. Normal Operation When ES5129 operates at the oscillation frequency of 120KHz, the conversion period will be 500ms. And the less frequency it has, the longer time it takes to complete one conversion. ES5129 takes input signal from pins IN_LO and IN_HI differentially, and takes reference from pins REF_LO and REF_HI. The typical reference voltage is about 1V. A filter capacitor and a protective resistor are recommended at IN_HI and IN_LO terminal as the test circuit of page7. 2. Range Change Function ES5129 has 2 operation ranges such as 200.00mV and 2.0000V. When the pin RANGE is pulled to DGND or keep floating, ES5129 operates at 200.00mV full-scale range. When it is pulled to V+, ES5129 change the input full-scale range to 2.0000V. And the output data still remain the maximum counting number ±20,000. 3. Data Hold Function ES5129 support a data hold function to stop the LCD panel upgrading and hold the final data. When the pin HOLD keeps floating, ES5129 operates in free run mode, and the data upgrades automatically after every conversion. When it is pulled to V+, ES5129 enters HOLD mode, the LCD panel stops upgrading the output data, And the final data before the HOLD mode is activated is held. 4. Decimal Points Controlled ES5129 can drive 4 decimal points on LCD panel. It provides four pins DP1, DP2, DP3 and DP4 to control the decimal points. Connect these pins DP1~DP4 to V+ will turn on the relative decimal point. To turn it off, keep DP pin float or connect it to DGND. 5. Continuity An internal comparator with a 200mV threshold is connected directly between IN_LO and IN_HI pins. The continuity output will be pulled high whenever the voltage between the analog inputs is less than 200mV. And the “Continuity” annunciator on LCD panel will be turned on. To disable the continuity function, connect the pin continuity to DGND. 7 07/03/01 ES5129 4-1/2 digit with LCD 6. Low Battery Detection The Low Battery annunciator on the LCD panel turns on when the voltage drop between V+ and V- is below 7.2V. 7. LCD Display Configuration BP3 Low Battery Continuity BP1 BP2 B3, C3, MINUS B4, C4, BC5 F4, E4, DP4 A4, G4, D4 F3, E3, DP3 B1, C1, Continuity A1, G1, D1 F1, E1, DP1 B2, C2, Low Battery A2, G2, D2 F2, E2, DP2 A3, G3, D3 BP1 B1 A1 F1 B2 A2 F2 B3 A3 F3 B4 A4 F4 BP2 C1 G1 E1 C2 G2 E2 C3 G3 E3 C4 G4 E4 D3 DP3 BC5 D4 DP4 BP3 CONT D1 DP1 LBAT D2 DP2 MINUS V+ BP1 DGND V+ BP2 DGND V+ BP3 DGND 8 07/03/01 ES5129 4-1/2 digit with LCD Test Circuit - with 120KHz crystal oscillator 120K (40) OSC2 OSC3 DP1 ANNUNC DP2 50~330pF B1, C1, CONT RANGE 0.1µ A1, G1, D1 (5) DGND 1.2V (35) REF_LO F2, E2, DP2 B3, C3, MINUS (10) A3, G3, D3 F3, E3, DP3 B4, C4, BC5 A4, G4, D4 IN_HI IN_LO 100k (30) CREFCREF+ COMMON CINT BP3 (25) CAZ BP2 V+ BP1 V- VDISP - BUFFER 1µ CONTINUITY F4, E4, DP4 (15) + Vin 0.1µ 150K A2, G2, D2 20k REF_HI B2, C2, LBAT V+ 10K F1, E1, DP1 ES5129 LCD Display OSC1 (1) 0.1µ 9V HOLD DP4/OR (20) (21) DP3/UR 9 07/03/01 ES5129 4-1/2 digit with LCD Test Circuit - with RC oscillation circuit 75k (40) OSC2 OSC3 DP1 ANNUNC DP2 B1, C1, CONT RANGE 0.1µ A1, G1, D1 (5) DGND 1.2V F1, E1, DP1 (35) REF_LO REF_HI F2, E2, DP2 B3, C3, MINUS (10) A3, G3, D3 F3, E3, DP3 B4, C4, BC5 IN_HI IN_LO 100k (30) CREFCREF+ COMMON CINT F4, E4, DP4 (15) - BUFFER 1µ CONTINUITY A4, G4, D4 + Vin 0.1µ 150K B2, C2, LBAT A2, G2, D2 20k BP3 (25) CAZ BP2 V+ BP1 V- 10K OSC1 (1) ES5129 LCD Display 50p 0.1µ 9V HOLD VDISP (21) DP3/UR DP4/OR (20) 10 07/03/01 ES5129 4-1/2 digit with LCD Product Outline: DIP-40L 11 07/03/01 ES5129 4-1/2 digit with LCD Product Outline: QFP-44 12 07/03/01