EPA240D-CP083 High Efficiency Heterojunction Power FET UPDATED 07/19/2006 • • • • • • .096 .290±0.005 FEATURES NON-HERMETIC SURFACE MOUNT 160MIL METAL CERAMIC PACKAGE +32.5 dBm OUTPUT POWER AT 1dB COMPRESSION 18.5 dB GAIN AT 2 GHz 0.5x2400 MICRON RECESSED “MUSHROOM” GATE Si3N4 PASSIVATION ADVANCED EPITAXIAL HETEROJUNCTION PROFILE PROVIDES EXTRA HIGH POWER EFFICIENCY, AND HIGH RELIABILITY 2X .065 ±.015 .160 .010 MAX .075 .220 .200 .050 .008±0.001 All Dimensions in Inches Caution! ESD sensitive device. ELECTRICAL CHARACTERISTICS (Ta = 25°C) SYMBOL P1dB G1dB PAE PARAMETER/TEST CONDITIONS Output Power at 1dB Compression f= Vds = 8 V, Ids=50% Idss f= Gain at 1dB Compression f= Vds = 8 V, Ids=50% Idss f= Power Added Efficiency at 1dB Compression Vds = 8 V, Ids=50% Idss f= 2.0 GHz 4.0 GHz 2.0 GHz 4.0 GHz MIN TYP 31.0 32.5 32.5 18.5 13.5 16.0 MAX UNITS dBm dB 50 2.0 GHz IDSS Saturated Drain Current VDS = 3 V, VGS = 0 V 440 720 GM Transconductance VDS = 3 V, VGS = 0 V 480 760 VP Pinch-off Voltage VDS = 3 V, IDS = 6 mA -1.0 % 940 mA mS -2.5 V BVGD Drain Breakdown Voltage IGD = 2.4 mA -13 -15 V BVGS Source Breakdown Voltage IGS = 2.4 mA -7 -14 V RTH* Thermal Resistance 25 30 o C/W Notes: * Overall Rth depends on case mounting. MAXIMUM RATINGS AT 25OC SYMBOLS Vds Vgs Igsf Igsr Pin Tch Tstg Pt PARAMETERS Drain-Source Voltage Gate-Source Voltage Forward Gate Current Reverse Gate Current Input Power Channel Temperature Storage Temperature Total Power Dissipation ABSOLUTE1 CONTINUOUS2 10V -5V 10.8 mA -1.8 mA 29 dBm 175oC -65/175oC 5.0 W 8V -3V 3.6 mA -0.6 mA @ 3dB Compression 175oC -65/175oC 5.0 W Note: 1. Exceeding any of the above ratings may result in permanent damage. 2. Exceeding any of the above ratings may reduce MTTF below design goals. Specifications are subject to change without notice. Excelics Semiconductor, Inc. 310 De Guigne Drive, Sunnyvale, CA 94085 Phone: 408-737-1711 Fax: 408-737-1868 Web: www.excelics.com page 1 of 1 Revised July 2006