GSG 勁力 半導体 Gunter Semiconductor GmbH TFB3869 EDITION 09/00 One Chip Subscriber Line Interface (SLIC) For inquiry please contact : China Tel: 0086-755-3200442 Fax: 0086-755-3355520 Hong Kong Tel : 00852-26190748 Fax: 00852-24948080 e-mail [email protected] Preliminary Technical Data TFB3869T Edition 09/00 Subscriber Line Interface Circuit (SLIC) Features • High balance without external precession devices • Low supply current • Direct coupling with standard CODECs • Subscriber feeding by integrated constant current sources • Programmable constant current by external resistor • Hybrid function, programmable via external components • Logic output for ground key detection • Logic output for loop current detection Package • SOP 20 0.1 2.30 +- 0.05 12.85 ± 0.1 10.4 ± 0.2 ≤ 0.82 09/00 0.27 0.15 +0.05 -0.04 0.2 ± 0.1 0...10° ≤ 2.65 7.4 + 0.2 0.42 ±0.07 1.27 20 19 18 17 16 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 0.25 M ≥ 0.3 1 Pin Configuration 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 - HK n. c. ISET ZOUT ZIN ET LD LA n. c. VBAT LB n. c. GND n.c. +CR -CR +MIC - MIC VCC +HK Negative output for transmitter direction This pin is internally used. It is not permitted to connect any external components. Control input for loop current Output, network for hybrid function Input, network for hybrid funktion Output, ground key detection Output, loop current detection Line output This pin is internally used. It is not permitted to connect any external components. Negative supply voltage Line output This pin is internally used. It is not permitted to connect any external components. Ground This pin is internally used. It is not permitted to connect any external components. External capacitor for AC/DC selction External capacitor for AC/DC selction Positive input for receive direction Negative input for receive direction Positive supply voltage Positive output for transmitter direction Pin Description VBAT Supply voltage -24 V VCC Supply voltage +5 V GND Ground ISET Control input for loop current Voltage drop on grounded resistor of 23,3 V. LA, LB 23.3 V Subscriber line, ILA/LB = 120 (ISET) = 120 . R SET The subscriber line current is determined by the ISET current. +MIC; -MIC Differential input for the receive direction The input resistance is 10 kΩ per pin, the output voltage in receive direction line is four times the MIC voltage. +HK; -HK Differential output for the transmitter direction with unit gain of the input signal of the subscriber line with common mode offset voltage of + 2.5 V ZIN Current node input for hybrid amplifier ZNB = 50 (sum) ZOUT Driver output for hybrid function ET Logic output for ground key detection (low-aktiv) LD Logic output for loop current detection (low-aktiv) +CR; -CR External capacitor for hybrid function All Pin are ESD protected except PIN 2, 9, 12 and 14. 2 09/00 TFB3869T Pin Symbol 1 -HK Circuit Pin Symbol 7 LD Circuit VCC VCC LD -HK VBAT GND 3 ISET 8 LA 8 LA VBAT 3 4 VBAT ISET ZOUT 11 LB GND LB 11 VBAT 4 5 ZOUT ZIN 17 18 +MIC - MIC +MIC -MIC GND VBAT 5 6 VBAT ZIN ET 20 +HK VCC VCC ET VBAT 09/00 TFB3869T +HK GND 3 Block Diagram Hybrid-C +5V 19 VCC 20 +HK TRANSMIT 1 -HK x 15 16 6 7 13 + CR - CR ET LD GND x LB 11 LA 8 CODEC +5 V VBAT 2 17 + MIC 18 - MIC x TFB 3869 T CODEC RECEIVER ISET ZOUT ZIN 3 4 5 x VBAT 10 - 24 V RSET IMITATION LINE IMPEDANCE Absolute Maximum Ratings Absolute maximum ratings Ta = 0°C up to 70°C Symbol Min. Max. Unit Positive supply voltage +5V 0 5.25 V Negative supply voltage -24V -25.25 0 V Pin10 - 0.3 Pin19 + 0.3 V - 150 All other pins Junction temperature 4 Tj °C 09/00 TFB3869T Electrical Characteristics DC Characteristics VBAT = -24 V, VCC = +5 V, Ta = 25 °C Parameter Symbol Min. Max. Unit Supply current ICC - 1.0 mA Loop current ISCHL 20 24 mA Supply current IBAT-ISCHL -3 - mA Symmetrical voltage VSYM 11 13 V Biaspoint +HK V+HK 2 3 V Biaspoint -HK V-HK 2 3 V Offset HK V+HK - V-HK -250 250 mV LD-detection (low) ILD = 200 µA VLD - 0.4 V LD-detection (high) VLD = 5 V ILD - 2 µA ET-detection (low) IET = 200 µA VET - 0.4 V ET-detection (high) VET = 5 V IET - 2 µA Min. Max. Unit AC Characteristics VBAT = -24 V, VCC = +5 V, Ta = 25 °C Parameter Symbol Balance two wire a2-2 54 - dB Balance two wire to four wire a2-4 58 - dB Loss MIC/HK aMIC/HK 12 - dB Gain for receiver direction GR 10.5 13.5 dB Gain for transmitter direction GT -7.5 -4.5 dB 09/00 TFB3869T 5 Application Circuit +5V MIC 10k 20 19 LB 10µ 10k 18 17 16 15 14 13 12 11 221 +HK VCC -MIC +MIC -CR +CR N.C. GND N.C. LB 115n TFB 3869 T HK -HK N.C. ISET 1 2 3 ZOUT ZIN ET 909 LD LA N.C. VBAT 10µ 4 5 6 7 8 9 10 20k 120k LA 5.4k 4.7n ET LD - 24V Test Circuit, Base Block MIC +5V 1:1 10k 10k 20 19 LB 10µ 18 17 16 15 14 13 12 11 221 +HK VCC -MIC +MIC -CR +CR N.C. GND N.C. LB 115n TFB 3869 T HK -HK N.C. ISET 1 2 3 ZOUT ZIN ET 909 LD LA N.C. VBAT 10µ 4 5 120k 6 7 8 9 10 20k LA 5.4k 4.7n 6 ET LD -24V 09/00 TFB3869T Test Circuit, Balance, Two Wire LB 300 10 µ ~ VL EL 300 LA base block a 2-2 = 20 log EL VL Balance two wire a2-2 a2 - 2 ( dB ) 80 60 50 40 30 20 0.1 09/00 TFB3869T 0.2 0.3 0.6 1 2 3 6 10 f ( kHz ) 7 Test Circuit, Balance Two Wire To Four Wire LB +HK 300 10 µ 5k VHK EL LA base block a 2-4 = 20 log ~ 300 -HK EL VHK Balance two wire to four wire a2-4 a2 - 4 ( dB ) 80 60 50 40 30 20 0.1 8 0.2 0.3 0.6 1 2 3 6 10 f ( kHz ) 09/00 TFB3869T Test Circuit, Return Loss LB MIC 221 ~ EMIC 909 base block aR = 20 log +HK -HK 115 n LA 5k E MIC VHK VHK Return loss aR aR ( dB ) 0 10 15 20 25 30 35 40 0.1 09/00 TFB3869T 0.2 0.3 0.6 1 2 3 6 10 f ( kHz ) 9 Test Circuit, Receiver Gain LB MIC 221 ~ Va/b EMIC 909 base block GR = 115 n LA Va / b E MIC Receiver gain GR GR ( dB ) 14 12 11 10 9 8 7 6 0.1 10 0.2 0.3 0.6 1 2 3 6 10 f ( kHz ) 09/00 TFB3869T Test Circuit, Transmitter Gain LB +HK 221 ~ 5k Ea/b VHK -HK 909 GT = 115 n LA base block VHK Ea/b Transmitter gain GT GT ( dB ) -4 -5 -5.5 -6 -6.5 -7 -7.5 -8 0.1 09/00 TFB3869T 0.2 0.3 0.6 1 2 3 6 10 f ( kHz ) 11 Loop Conditions Loop conditions LD ET Loop connected, no gound key High High Loop connected, ground key aktiv High Low Loop disconnected, no ground key Low High Loop Detection Condition for switching of the logic output LD: ISCHL * RL = VBAT - 5V Status of the logic output LD depending on loop current: LD = Low LD = High ISCHL * RL > VBAT - 5V ISCHL * RL < VBAT - 5V Loop Resistance The useable loop resistance can be calculated as follows: RL < RL < (VBAT - 5V) ISCHL (VBAT - 5V) RSET 120 * 23.3V * In accordance with the conditions menioned above a reliable loop detection will be guaranteed for a closed loop resistance value lower than 815 Ω. 12 09/00 TFB3869T Ground Key Detection For ground key detection the LA or LB outputs have to be connected to ground. In this case the voltage drop on an internal differential amplifier reaches 1 V in minimum for switching the ET output from high to low. Protection Circuit GND < 1n 13 GND 8 a LB < 1n TFB 3869 T 11 b LA V BAT 10 V BAT Copying is generally permitted, indicating the source. However, our consent must be obtained in all cases. MEGAXESS reserves the right to make changes in specifications at any time and without notice. The information and suggestions are given without obligation and cannot give rise to any liability, they do not indicate the availability of the components mentioned. The information included herein is believed to be accurate and reliable. However, MEGAXESS assumes no responsibility for its use; nor for any infringements of patents or of other rights of third parties which may result from its use. Megaxess GmbH Deutschland • POB 1370 • 15236 Frankfurt(Oder) • Germany Phone +49 335 2005 • FAX +49 335 3251 • Internet http://www. megaxess.de 09/00 TFB3869T 13