DDX-2102 All-Digital High Efficiency Power Amplifier FEATURES 1.0 GENERAL DESCRIPTION • • HIGH OUTPUT CAPABILITY DDX® Mono-Mode: • DDX® Full-Bridge Mode: • Binary Half-Bridge Mode: • • • • • * 1 x 130 W, 4Ω, < 10% THD * 2 x 50 / 65 W, 6Ω / 8Ω, < 10% THD * The DDX-2102 power device is a monolithic, dual channel H-Bridge that can provide audio power up to 65 watts per channel @10%THD, 8Ω at very high efficiency. 4 x 32 W, 4Ω, < 10% THD SINGLE SUPPLY (+9V to +36V) MINI SURFACE MOUNT PACKAGE HIGH EFFICIENCY, > 90% @ 8Ω, 10%THD THERMAL OVERLOAD PROTECTION SHORT CIRCUIT PROTECTION BENEFITS • • COMPLETE SURFACE MOUNT DESIGN POWER SUPPLY SAVINGS APPLICATIONS • • • • • DIGITAL POWERED SPEAKERS PC SOUND CARDS CAR AUDIO SURROUND SOUND SYSTEMS DIGITAL AUDIO COMPONENTS The device contains a logic interface, integrated bridge drivers, high efficiency MOSFET output transistors and protection circuitry. It may be used in DDX® Mode as a dual bridge or reconfigured as a single bridge with double the output current capability. Alternatively, in Binary Mode, it may be configured as either a dual bridge or (at lower power output) a quad half-bridge or a combination of both types. The benefits of the DDX® amplification system are: an all-digital design that eliminates the need for a digital to analog converter (DAC), and the high efficiency operation derived from the use of Apogee’s patented damped ternary pulse width modulation (PWM). This approach provides an efficiency advantage over conventional PWM designs and more than three times the efficiency of Class A/B amplifiers with music input signal. VCC1P INLA BIAS CONFIG PWRDN FAULT TRISTATE PROTECTION AND DRIVER LOGIC FET DRIVE GNDREF OUTNL OUTNL PGND1N INLB INRA VCC2P VSIG FET DRIVE VREG2 VREG2 OUTPL PGND1P VCC1N FET DRIVE TWARN OUTPL VCC2N FET DRIVE VREG1 OUTPR PGND2P REGULATORS VREG1 GNDR1 OUTPR OUTNR OUTNR PGND2N INRB Figure 1. Block Diagram Specifications are subject to change without notice. 129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 CONTROLLED DOCUMENT: P_903-000055_Rev08 DDX-2102 Data Sheet.doc email: [email protected] DRN: PRELIMINARY Page 1 of 17 DDX-2102 1.1 Absolute Maximum Ratings [Note 1] SYMBOL PARAMETER VALUE VCC Power supply voltage 40 VL Input logic reference 5.5 PTOT Power Dissipation, Theat-spreader = 25°C [See Figure 5] 50 Tj Operating junction temperature range 0 to +150 Tstg Storage temperature range -40 to +150 Note 1 - Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 1.2 Recommended Operating Conditions [Note 2] SYMBOL PARAMETER VCC Power supply voltage VL Input logic reference TA Ambient Temperature Note 2 - Performance not guaranteed beyond recommended operating conditions. 1.3 MIN 9.0 2.7 0 TYP MIN TYP 1.1 150 130 25 3.3 MAX 36.0 5.0 70 UNIT V V °C MAX 2.5 UNIT °C/W °C °C °C Thermal Data SYMBOL PARAMETER Thermal resistance junction-case (heat spreader) Thermal shut-down junction temperature Thermal warning temperature Thermal shut-down hysteresis θJ-C Tj-SD TWARN ThSD 1.4 UNIT V V W °C °C Electrical Characteristics. [Refer to circuit in Figure 19] Unless otherwise specified, performance is measured using the DDX-8001/DDX-8229 processor family, VCC=32V, VL=3.3V, fsw=384kHz, TC=25°C, RL=8Ω. SYMBOL PARAMETER ® PO-DM (DDX Mono Mode) [Figure 20] PO-DF (DDX® Full Bridge Mode) VCC CONDITIONS THD+N RL Power Per Channel [Note 3][Note 4] 32V Power Per Channel [Note 4] 32V Power Per Channel [Note 4] 25V <1% 4Ω <10% [Figure 19] PO-DF (DDX® Full Bridge Mode) <10% <1% [Figure 19] PO-Bin (Binary HalfPower Per Channel [Note 4] Bridge Mode) [Figure 21] Note 3 – Maximum power limited to < 1 second Note 4 – Power Output Limited by Minimum Current Limit <1% 130 UNIT WRMS 100 WRMS 50 WRMS 38 32 4Ω WRMS 25 Specifications are subject to change without notice. 129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 CONTROLLED DOCUMENT: P_903-000055_Rev08 DDX-2102 Data Sheet.doc MAX 50 6Ω <10% 32V TYP 65 8Ω <10% <1% MIN email: [email protected] DRN: PRELIMINARY Page 2 of 17 DDX-2102 1.4 Electrical Characteristics (continued) [Refer to circuit in Figure 19] Unless otherwise specified, performance is measured using the DDX-8001/DDX-8229 processor family, VCC =32V, VL=3.3V, fsw=384kHz, TC=25°C, RL=8Ω. SYMBOL THD+N SNR PARAMETER Total Harmonic Distortion + Noise, [Note 5] Signal to Noise Ratio, DDX® Mode Signal to Noise Ratio, Binary Half-Bridge Mode, [Note 5] Peak Efficiency, DDX® Mode η ISC Rds-on gN gP Idss UVL IPD ICC-tri ICC Peak Efficiency, Binary Half-Bridge Mode Speaker Output Short-Circuit Protection Limit per Bridge [Note 6] Power MOSFET output resistance Power Nchannel Rds-on matching Power Pchannel Rds-on matching Power Pchannel/Nchannel leakage Under-voltage Lockout Threshold VCC supply current, Power-down VCC supply current, Tri-state DDX® mode VCC supply current Binary mode VCC supply current ton toff tr tf Turn-on delay time Turn-off delay time Rise time Fall Time Low logic input voltage: PWRDN, TRISTATE pins VIL Low logic input voltage: INLA, INLB, INRA, INRB pins High logic input voltage: PWRDN, TRISTATE pins VIH High logic input voltage: INLA, INLB, INRA, INRB pins CONDITION Po = 1 Wrms Po = 50 Wrms MIN % dB 90 % 87 3.5 6 8 A 200 270 mΩ % % uA V mA mA 95 95 7 1 22 50 9 3 86 mA 103 100 100 25 25 0.7 0.8 0.85 1.05 1.35 2.2 1.5 1.7 1.85 1.65 1.95 2.8 Output Sink Current, FAULT, Fault Active 1 TWARN pins PWmin Minimum output pulse width No load 70 150 Note 5 – Performance Characteristics obtained using a DDX-8001/DDX-8229 controller. Note 6 – If used in single BTL (Mono Mode) configuration, the device may not be short-circuit protected. Specifications are subject to change without notice. 129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 ns ns ns ns V Ifault CONTROLLED DOCUMENT: P_903-000055_Rev08 DDX-2102 Data Sheet.doc UNIT 92 Po=2 x 50 W, 10% THD, 8Ω Po=4 x 25 W, 10% THD, 4Ω PWRDN = 0 TRISTATE = 0 2-Channel switching at 384kHz. 4-Channel switching at 384kHz. Resistive load Resistive load Resistive load Resistive load VL = 2.7V VL = 3.3V VL = 5.0V VL = 2.7V VL = 3.3V VL = 5.0V VL = 2.7V VL = 3.3V VL = 5.0V VL = 2.7V VL = 3.3V VL = 5.0V MAX 100 A-Weighted relative to fullscale Id=1A Id = 1A Id = 1A VCC = 35 V TYP 0.09 0.13 V mA ns email: [email protected] DRN: PRELIMINARY Page 3 of 17 DDX-2102 1.5 Logic Truth Table TRISTATE 0 1 1 1 1 InxA X 0 0 1 1 INxB X 0 1 0 1 OUTPx OFF GND GND VCC VCC OUTNx OFF GND VCC GND VCC OUTPUT MODE Hi-Z DAMPED NEGATIVE POSITIVE Not Used 2.0 DDX-2102 Pin Function Description: 2.1 PWM Inputs Pin No. Description INLA 29 Left A logic input signal INLB 30 Left B logic input signal INRA 31 Right A logic input signal INRB 32 Right B logic input signal 2.2 Control/Miscellaneous Pin Name Pin No. Description PWRDN 25 Power Down (0=Shutdown, 1= Normal). TRI-STATE 26 FAULT [Note 7] 27 TWARN [Note 7] 28 CONFIG [Note 8] 24 Tri-State (0=All MOSFETS Hi-Z, 1=Normal). Fault output indicator; Overcurrent, Overvoltage or Overtemperature (0=Fault, 1=Normal). Thermal warning output (0=Warning TJ >= 130°C, 1=Normal). Configuration (0=Normal, 1=Parallel operation for mono). NC 18 Do not connect. Note 7: FAULT and TWARN outputs are open-drain Note 8: Connect CONFIG Pin 24 to VREG1 Pins 21, 22 to implement single bridge (mono mode) operation for high current. 2.3 Power Outputs for DDX® Mode or Binary Full Bridge Mode [Note 9] Pin Name Pin No. Description OUTPL 16, 17 Left output, positive reference OUTNL 10, 11 Left output, negative reference OUTPR 8, 9 Right output, positive reference OUTNR 2, 3 Right output, negative reference Note 9: DDX® outputs are bridged. The outputs OUTPx produce signals in phase with the input. 2.4 Power Outputs for Binary Half-Bridge Mode [Note 10] Pin Name OUTNR Pin No. Description 2, 3 CH4 output, positive reference OUTPR 8, 9 CH3 output, positive reference OUTNL 10, 11 CH2 output, positive reference OUTPL 16, 17 CH1 output, positive reference Note 10: Half-Bridge Binary Mode outputs are NOT bridged. All outputs produce signals in phase with the input. Specifications are subject to change without notice. 129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 CONTROLLED DOCUMENT: P_903-000055_Rev08 DDX-2102 Data Sheet.doc email: [email protected] DRN: PRELIMINARY Page 4 of 17 DDX-2102 2.5 Power Supplies Pin Name Pin No. Description VCC [1P, 1N, 2P, 2N] 4, 7, 12, 15 Power PGND [1P, 1N, 2P, 2N] 5, 6, 13, 14 Power grounds VREG1 21, 22 Internal regulator voltage requires bypass capacitor. VREG2 33, 34 Internal regulator voltage requires bypass capacitor. VSIG 35, 36 Signal Positive supply. VL [Note 13] 23 Logic reference voltage. GNDREF 19 Logic reference ground. GNDS 1 Substrate ground. GNDR1 20 Internal regulator ground. Note 11: VL (Logic Reference Voltage) is recommended to be powered and stable prior to Vcc achieving > 7V to assure proper power up sequence. VL is recommended to remain powered and stable until after Vcc has decayed below 7V during power removal. VSIG GNDS VSIG OUTNR VREG2 OUTNR VREG2 VCC2N INRB PGND2N INRA PGND2P INLB VCC2P INLA OUTPR TWARN OUTPR FAULT OUTNL TRISTATE OUTNL PWRDN VCC1N CONFIG PGND1N VL PGND1P VREG1 VCC1P VREG1 OUTPL GNDR1 OUTPL GNDREF NC Figure 2 – Pin Connection Diagram. NOTE: Pins numbers increase in the clockwise direction when looking at top of package. Specifications are subject to change without notice. 129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 CONTROLLED DOCUMENT: P_903-000055_Rev08 DDX-2102 Data Sheet.doc email: [email protected] DRN: PRELIMINARY Page 5 of 17 DDX-2102 3.0 DDX-2102 POWER DEVICE The DDX-2102 Power Device is a dual channel H-Bridge that can deliver more than 65 watts per channel (<10%THD) of audio output power at very high efficiency. It converts both DDX® and binarycontrolled PWM signals into audio power at the load. It includes a logic interface, integrated bridge drivers, high efficiency MOSFET outputs, and thermal and short circuit protection circuitry. In DDX® mode, two logic level signals per channel are used to control high-speed MOSFET switches to connect the speaker load to the input supply or to ground in a bridge configuration, according to Apogee's patented damped ternary PWM. In Binary Mode operation, both Full Bridge and Half Bridge Modes are supported. This device includes over-current and thermal protection as well as under-voltage lockout with automatic recovery. A thermal warning status is also provided. INL[1:2] INR[1:2] VL PWRDN OUTPL Logic I/F and Decode VL OUTNL TRI-STATE FAULT TWARN OUTPL LeftB ½-Bridge OUTNL Protection Circuitry RightA ½-Bridge OUTPR Regulators RightB ½-Bridge OUTNR Logic I/F and Decode PWRDN TRI-STATE Protection Circuitry OUTPR Right H-Bridge Regulators FAULT TWARN OUTNR Figure 3 - DDX-2102 Block Diagram, Full- Bridge DDX® or Binary Modes 3.1 LeftA ½-Bridge INL[1:2] INR[1:2] Left H-Bridge Figure 4 - DDX-2102 Block Diagram, Binary Half-Bridge Mode Logic Interface and Decode The DDX-2102 power outputs are controlled using one or two logic level timing signals. In order to provide a proper logic interface, the VL input must operate at the same voltage as the DDX® controller logic supply. VL (Logic Reference Voltage) is recommended to be powered and stable prior to Vcc achieving > 7V to assure proper power up sequence. VL is recommended to remain powered and stable until after Vcc has decayed below 7V during power removal. 3.2 Protection Circuitry The DDX-2102 includes protection circuitry for over-current and thermal overload conditions. A thermal warning pin TWARN is activated low (open-drain MOSFET) when the IC temperature exceeds 130°C, in advance of the thermal shutdown protection. When a fault condition is detected (logical OR of overcurrent and thermal), an internal fault signal acts to immediately disable the output power MOSFETs, placing both H-bridges in a high impedance state. At the same time an open-drain MOSFET connected to the FAULT pin is switched on. There are two possible modes subsequent to activating a fault. The first is a SHUTDOWN mode. With FAULT (pull-up resistor) and TRI-STATE pins independent, an activated fault will disable the device, signaling low at the FAULT output. The device may subsequently be reset to normal operation by toggling the TRI-STATE pin from High to Low to High using an external logic signal. The second is an AUTOMATIC recovery mode. This is depicted in the application circuit in Figure 19. The FAULT and TRI-STATE pins are shorted together and connected to a time constant circuit comprising of RT and CT. An activated FAULT will force a reset on the TRI-STATE pin causing normal operation to resume following a delay determined by the time constant of the circuit. If the fault condition is still present, the circuit operation will continue repeating until the fault condition is removed. Specifications are subject to change without notice. 129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 CONTROLLED DOCUMENT: P_903-000055_Rev08 DDX-2102 Data Sheet.doc email: [email protected] DRN: PRELIMINARY Page 6 of 17 DDX-2102 An increase in the time constant of the circuit will produce a longer recovery interval. Care must be taken in the overall system design so as not to exceed the protection thresholds under normal operation. 3.3 Power Outputs The DDX-2102 power and output pins are duplicated to provide a low impedance path for the device’s bridged outputs. All duplicate power, ground and output pins must be connected for proper operation. The PWRDN or TRI-STATE pins should be used to set all MOSFETS to the Hi-Z state during power-up until the logic power supply, VL, is settled. 3.4 Parallel Output/High Current Operation When using DDX® Mode output, the DDX-2102 outputs can be connected in parallel to increase the output current to a load. In this configuration the device can provide over 130W@4Ω (see Figure 7). This mode is enabled with the CONFIG pin connected to VREG1 and the inputs combined INLA = INLB, INRA = INRB and outputs combined OUTLA = OUTLB, OUTRA = OUTRB. 3.5 ADDITIONAL INFORMATION 3.6 Output Filter A passive two-pole low-pass filter is used on the DDX-2102 power outputs to reconstruct an analog signal. System performance can be significantly affected by the output filter design and choice of components. (See appnote: AN-15, Component Selection for DDX Amplifiers.) A filter design for 6Ω/8Ω loads is shown in the Typical Application Circuit in Figure 19. Figure 20 shows a filter design for 4Ω loads. Figure 22 shows a filter for ½ bridge mode, 4Ω loads. 3.7 The surface mount package of the DDX-2102 includes an exposed thermal slug on the top of the device to provide a direct thermal path from the integrated circuit to the heatsink. Careful consideration must be given to the overall thermal design. See Figure 5 for power derating. 60 Device Internal Dissipation (W) Power Dissipation & Heat Sink Requirements The power dissipated within the device will depend primarily on the supply voltage, load impedance, and output modulation level. 50 40 30 20 10 0 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 Slug Temperature Tc (°C) Figure 5 –Power Derating Curve (Typical) For additional thermal design considerations, see: AN19, Power Device Thermal Calculator. For additional design considerations with binary mode operation, see application note: AN-16, Applying the DDX-8000/DDX-8228 in Binary Mode. Specifications are subject to change without notice. 129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 CONTROLLED DOCUMENT: P_903-000055_Rev08 DDX-2102 Data Sheet.doc email: [email protected] DRN: PRELIMINARY Page 7 of 17 DDX-2102 Stereo Mode - Output Power vs Supply Voltage, <1% THD+N 90 80 6Ω 70 Output Power (RMS Watts) 4Ω 60 8Ω 50 40 30 20 10 0 9 12 15 18 21 24 27 30 33 36 Power Supply Voltage (VDC) LEGEND: Iout(min) = 3.5A Iout(typ) = 6A RL = 8Ω RL = 8Ω RL = 6Ω RL = 6Ω RL = 4Ω RL = 4Ω Figure 6. Output Power vs. Supply Voltage for Stereo Bridge. Figure 6 shows the full-scale output power (0dB FS digital input with unity amplifier gain) as a function of Power Supply Voltage for 4, 6, and 8 Ohm loads in either DDX® Mode or Binary Full Bridge Mode. Output power is constrained for higher impedance loads by the maximum voltage limit of the DDX-2102 IC and by the over-current protection limit for lower impedance loads. The minimum threshold for the over-current protection circuit is 3.5A (at 25 ºC) but the typical threshold is 6A. Solid curves depict typical output power capability of each device. Dotted curves depict the output power capability constrained to the minimum current specification of the DDX-2102. The output power curves assume proper thermal management of the power device’s internal dissipation. See Figure 5. NOTE: Output power at 10% THD is approximately 30% higher. Specifications are subject to change without notice. 129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 CONTROLLED DOCUMENT: P_903-000055_Rev08 DDX-2102 Data Sheet.doc email: [email protected] DRN: PRELIMINARY Page 8 of 17 DDX-2102 Mono Mode - Output Power vs Supply Voltage, <1% THD+N 160 150 140 2Ω Output Power (RMS Watts) 130 3Ω 120 4Ω 110 100 90 80 70 60 50 40 30 20 10 0 10 LEGEND: Iout(min) = 7.0A Iout(typ) = 12A 15 20 25 Power Supply Voltage (VDC) RL = 4Ω RL = 4Ω 30 RL = 3Ω RL = 3Ω 35 RL = 2Ω RL = 2Ω Figure 7. Mono Bridge Output, DDX® Mode Only, Power vs Supply <1% THD. Figure 7 depicts the mono mode output power as a function of power supply voltages for loads of 2, 3, and 4 Ohms. The same current limit observations from Figure 6 apply, except output current is 7A minimum, 12A typical in mono bridge configuration. Solid curves depict typical performance and dotted curves depict the minimum current limit for the DDX-2102. Again, the output power curves assume proper thermal management of the power device’s internal dissipation. NOTE: Output power at 10% THD is approximately 30% higher. Specifications are subject to change without notice. 129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 CONTROLLED DOCUMENT: P_903-000055_Rev08 DDX-2102 Data Sheet.doc email: [email protected] DRN: PRELIMINARY Page 9 of 17 DDX-2102 Binary Half-Bridge Mode - Output Power vs Supply Voltage, THD+N<1% 30 Output Power (RMS Watts) 25 4Ω 20 6Ω 15 8Ω 10 5 0 10 15 20 25 30 35 Power Supply Voltage (VDC) LEGEND: Iout(min) = 3.5A Iout(typ) = 6.0A RL = 8Ω RL = 8Ω RL = 6Ω RL = 6Ω RL = 4Ω RL = 4Ω Figure 8. Half-Bridge Binary Mode Output Power vs Supply <1% THD (NOTE: Curves taken at f = 1 kHz and using a 330uF blocking capacitor.) Figure 8 depicts the output power as a function of power supply voltages for loads of 4, 6, and 8 Ohms when the DDX-2102 is operated in a half-bridge Binary Mode. Solid curves depict typical performance and dotted curves depict the minimum current limit for the DDX-2102. Once again, the output power curves assume proper thermal management of the power device’s internal dissipation. NOTE: Output power at 10% THD is approximately 30% higher. Specifications are subject to change without notice. 129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 CONTROLLED DOCUMENT: P_903-000055_Rev08 DDX-2102 Data Sheet.doc email: [email protected] DRN: PRELIMINARY Page 10 of 17 DDX-2102 3.8 Typical Stereo Mode Performance Characteristics 1 10 5 0.5 2 1 0.2 0.5 % % 0.1 0.2 0.05 0.1 0.05 0.02 0.02 0.01 100m 200m 500m 1 2 5 10 20 50 0.01 20 100 50 100 200 500 W VCC = 32VDC, RL = 8Ω VCC = 25VDC, RL = 6Ω VCC = 32VDC, RL = 8Ω Figure 9. THD+N vs. Output Power @ 1kHz, using a DDX-8001 controller 3.9 1k 2k 5k 10k 20k Hz VCC = 25VDC, RL = 6Ω Figure 10. THD+N vs. Frequency, 1W, using a DDX-8001 controller Typical Mono Mode Performance Characteristics: VCC = 32VDC, RL = 4Ω 10 1 5 0.5 2 1 0.2 0.5 % % 0.1 0.2 0.05 0.1 0.05 0.02 0.02 0.01 100m 200m 500m 1 2 5 10 20 50 100 0.01 20 50 100 200 W Figure 11. THD+N vs. Output Power @ 1kHz 1k 2k 5k 10k 20k Hz Figure 12. THD+N vs. Frequency, 1W Specifications are subject to change without notice. 129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 CONTROLLED DOCUMENT: P_903-000055_Rev08 DDX-2102 Data Sheet.doc 500 email: [email protected] DRN: PRELIMINARY Page 11 of 17 DDX-2102 3.10 Typical Binary Half-Bridge Mode Performance Characteristics, VCC = 32 VDC, RL - 4Ω. 10 10 5 5 2 2 1 1 0.5 0.5 % % 0.2 0.2 0.1 0.1 0.05 0.05 0.02 0.02 0.01 100m 200m 500m 1 2 5 10 20 0.01 20 40 50 100 200 500 W 1k 2k 5k 10k 20k Hz Figure 13. THD+N vs. Output Power @ 1kHz Figure 14. THD+N vs. Frequency, 1W 3.11 Typical DDX-Mode Performance Characteristics at VCC = 36V, 8Ω Load, <1% THD+N. +3 100 90 Efficiency (%) 80 +1.5 70 60 d B r 50 -0 A 40 30 20 -1.5 10 0 0 10 20 30 40 50 60 70 80 90 100 110 120 -3 20 Total Output Power (Watts) 50 100 200 1k 500 2k 5k 10k 20k Hz Figure 15. Typical Efficiency vs. PowerEfficiency Figure 16. Typical Frequency Response +0 -10 -20 -30 -40 -50 d B r A -60 -70 -80 -90 -100 -110 -120 -130 -140 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure 17. Typical FFT @ -60 dB, using a DDX-8001 controller Specifications are subject to change without notice. 129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 CONTROLLED DOCUMENT: P_903-000055_Rev08 DDX-2102 Data Sheet.doc email: [email protected] DRN: PRELIMINARY Page 12 of 17 DDX-2102 4.0 APPLICATION REFERENCE DESIGNS. Apogee can provide reference designs for most applications. Contact Apogee Technical Support for more information. Figure 18 -. Example DDX® Layout (Stereo Mode) Specifications are subject to change without notice. 129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 CONTROLLED DOCUMENT: P_903-000055_Rev08 DDX-2102 Data Sheet.doc email: [email protected] DRN: PRELIMINARY Page 13 of 17 DDX-2102 4.1 STEREO MODE Figure 19. DDX® Stereo Mode Audio Application Circuit 4.2 MONO MODE. Figure 20. DDX® Mono Mode Audio Application Circuit Specifications are subject to change without notice. 129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 CONTROLLED DOCUMENT: P_903-000055_Rev08 DDX-2102 Data Sheet.doc email: [email protected] DRN: PRELIMINARY Page 14 of 17 DDX-2102 4.3 BINARY MODE, 2.1 CHANNEL Figure 21 Binary Mode, 2.1 Channel Audio Application Circuit (See Note 12) 4.4 BINARY MODE, 4 CHANNEL. Figure 22. Binary Mode, 4-Channel Audio Application Circuit (See Note 12) Note 12: Channel mappings in Binary mode schematics apply to DDX-8229 PWM output channels. Specifications are subject to change without notice. 129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 CONTROLLED DOCUMENT: P_903-000055_Rev08 DDX-2102 Data Sheet.doc email: [email protected] DRN: PRELIMINARY Page 15 of 17 DDX-2102 5.0 PACKAGE INFORMATION 5.1 Package Outline Drawing Specifications are subject to change without notice. 129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 CONTROLLED DOCUMENT: P_903-000055_Rev08 DDX-2102 Data Sheet.doc email: [email protected] DRN: PRELIMINARY Page 16 of 17 DDX-2102 5.2 Marking Configuration Packages with Date Code (YWW) = 514 & after LEGEND: LLWX COO Y WW Traceability Coding Country Of Origin Assembly Year Assembly Week Pb-Free (RoHS Compliant) (no symbol if not Pb-Free) Information furnished in this publication is believed to be accurate and reliable. However, Apogee Technology, Inc. assumes no responsibility for its use, or for any infringements of patents or other rights of third parties that may result from its use. Specifications in this publication are subject to change without notice. This publication supersedes and replaces all information previous supplied. Apogee Technology, Inc. All Rights Reserved Specifications are subject to change without notice. 129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 CONTROLLED DOCUMENT: P_903-000055_Rev08 DDX-2102 Data Sheet.doc email: [email protected] DRN: PRELIMINARY Page 17 of 17