TI 54F378

54F378,74F378
54F378 74F378 Parallel D Register with Enable
Literature Number: SNOS192A
54F/74F378
Parallel D Register with Enable
General Description
Features
The ’F378 is a 6-bit register with a buffered common Enable. This device is similar to the ’F174, but with common
Enable rather than common Master Reset.
Y
Y
Y
Y
Y
74F378PC
54F378DM (QB)
74F378SC (Note 1)
Package
Number
e
Military
Package Description
N16E
16-Lead (0.300× Wide) Molded Dual-In-Line
J16A
16-Lead Ceramic Dual-In-Line
et
Commercial
6-bit high-speed parallel register
Positive edge-triggered D-type inputs
Fully buffered common clock and enable inputs
Input clamp diodes limit high-speed termination effects
Full TTL and CMOS compatible
M16A
16-Lead (0.150× Wide) Molded Small Outline, JEDEC
M16D
16-Lead (0.300× Wide) Molded Small Outline, EIAJ
54F378FM (QB)
W16A
16-Lead Cerpack
54F378LM (QB)
E20A
20-Lead Ceramic Leadless Chip Carrier, Type C
74F378SJ (Note 1)
bs
ol
Note 1: Devices also available in 13× reel. Use suffix e SCX and SJX.
Logic Symbols
Connection Diagrams
Pin Assignment for
DIP, SOIC and Flatpak
Pin Assignment
for LCC
TL/F/9526–1
O
IEEE/IEC
TL/F/9526 – 2
TL/F/9526 – 3
TL/F/9526–4
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.
C1995 National Semiconductor Corporation
TL/F/9526
RRD-B30M75/Printed in U. S. A.
54F/74F378 Parallel D Register with Enable
January 1995
Unit Loading/Fan Out
54F/74F
Pin Names
E
D 0 – D5
CP
Q0 – Q5
Description
Enable Input (Active LOW)
Data Inputs
Clock Pulse Input (Active Rising Edge)
Outputs
U.L.
Input IIH/IIL
HIGH/LOW Output IOH/IOL
1.0/1.0
1.0/1.0
1.0/1.0
50/33.3
Functional Description
20 mA/b0.6 mA
20 mA/b0.6 mA
20 mA/b0.6 mA
b 1 mA/20 mA
Truth Table
The ’F378 consists of six edge-triggered D-type flip-flops
with individual D inputs and Q inputs. The Clock (CP) and
Enable (E) inputs are common to all flip-flops.
E
CP
Dn
Qn
When the E input is LOW, new data is entered into the
register on the LOW-to-HIGH transition of the CP input.
When the E input is HIGH the register will retain the present
data independent of the CP input.
H
L
L
L
L
L
X
H
L
No Change
H
L
Inputs
Output
e
H e HIGH Voltage Level
L e LOW Voltage Level
X e Immaterial
L e LOW-to-HIGH Clock Transition
bs
ol
et
Logic Diagram
TL/F/9526 – 5
O
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
2
Absolute Maximum Ratings (Note 1)
Recommended Operating
Conditions
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Storage Temperature
b 65§ C to a 150§ C
Ambient Temperature under Bias
Junction Temperature under Bias
Plastic
b 55§ C to a 125§ C
Free Air Ambient Temperature
Military
Commercial
b 55§ C to a 125§ C
0§ C to a 70§ C
Supply Voltage
Military
Commercial
b 55§ C to a 175§ C
b 55§ C to a 150§ C
a 4.5V to a 5.5V
a 4.5V to a 5.5V
VCC Pin Potential to
Ground Pin
b 0.5V to a 7.0V
b 0.5V to a 7.0V
Input Voltage (Note 2)
b 30 mA to a 5.0 mA
Input Current (Note 2)
Voltage Applied to Output
in HIGH State (with VCC e 0V)
b 0.5V to VCC
Standard Output
b 0.5V to a 5.5V
TRI-STATEÉ Output
Current Applied to Output
in LOW State (Max)
twice the rated IOL (mA)
e
Note 1: Absolute maximum ratings are values beyond which the device may
be damaged or have its useful life impaired. Functional operation under
these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
Symbol
Parameter
et
DC Electrical Characteristics
54F/74F
Min
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
VOH
Units
2.0
Input Clamp Diode Voltage
VCC
V
Recognized as a HIGH Signal
0.8
V
Recognized as a LOW Signal
b 1.2
V
Min
Min
IOH e b1 mA
IOH e b1 mA
IOH e b1 mA
0.5
0.5
V
Min
IOL e 20 mA
IOL e 20 mA
54F
74F
20.0
5.0
mA
Max
VIN e 2.7V
Input HIGH Current
Breakdown Test
54F
74F
100
7.0
mA
Max
VIN e 7.0V
Output HIGH
Leakage Current
54F
74F
250
50
mA
Max
VOUT e VCC
Input Leakage
Test
74F
V
0.0
IID e 1.9 mA
All Other Pins Grounded
IOD
Output Leakage
Circuit Current
74F
3.75
mA
0.0
VIOD e 150 mV
All Other Pins Grounded
IIL
Input LOW Current
IIH
IBVI
ICEX
Output LOW
Voltage
54F 10% VCC
74F 10% VCC
Input HIGH
Current
O
VID
54F 10% VCC
74F 10% VCC
74F 5% VCC
IOS
Output Short-Circuit Current
ICCL
Power Supply Current
2.5
2.5
2.7
IIN e b18 mA
V
VOL
Output HIGH
Voltage
Conditions
Max
bs
ol
VCD
Typ
4.75
b 60
30
3
b 0.6
mA
Max
VIN e 0.5V
b 150
mA
Max
VOUT e 0V
45
mA
Max
VO e LOW
AC Electrical Characteristics
Symbol
Parameter
74F
54F
74F
TA e a 25§ C
VCC e a 5.0V
CL e 50 pF
TA, VCC e Mil
CL e 50 pF
TA, VCC e Com
CL e 50 pF
Min
Typ
fmax
Maximum Input Frequency
80
100
tPLH
tPHL
Propagation Delay
CP to Qn
3.0
3.5
5.5
6.0
Max
Min
Max
Min
70
7.5
8.5
Max
80
3.0
3.5
10.0
10.5
Units
MHz
3.0
3.5
8.5
9.5
ns
AC Operating Requirements
Parameter
54F
74F
TA, VCC e Mil
TA, VCC e Com
Min
Min
Min
Max
Setup Time, HIGH or LOW
Dn to CP
4.0
4.0
5.0
5.0
th(H)
th(L)
Hold Time, HIGH or LOW
Dn to CP
0
0
2.0
2.0
ts(H)
ts(L)
Setup Time, HIGH or LOW
E to CP
6.0
10.0
th(H)
th(L)
Hold Time, HIGH or LOW
E to CP
0
0
tw(H)
tw(L)
CP Pulse Width
HIGH or LOW
Max
Max
4.0
4.0
ns
0
0
et
ts(H)
ts(L)
Units
e
Symbol
74F
TA e a 25§ C
VCC e a 5.0V
6.0
10.0
0
0
0
0
5.0
7.5
4.0
6.0
bs
ol
4.0
6.0
4.5
13.0
ns
ns
Ordering Information
The device number is used to form part of a simplified purchasing code where the package type and temperature range are
defined as follows:
74F
378
S
Temperature Range Family
74F e Commercial
54F e Military
C
X
Special Variations
QB e Military grade device with
environmental and burn-in
processing
X e Devices shipped in 13× reel
Device Type
Package Code
P e Plastic DIP
D e Ceramic DIP
F e Flatpak
L e Leadless Chip Carrier (LCC)
S e Small Outline SOIC JEDEC
SJ e Small Outline SOIC EIAJ
O
Temperature Range
C e Commercial (0§ C to a 70§ C)
M e Military (b55§ C to a 125§ C)
4
et
e
Physical Dimensions inches (millimeters)
O
bs
ol
20-Lead Ceramic Leadless Chip Carrier (L)
NS Package Number E20A
16-Lead Ceramic Dual-In-Line Package (D)
NS Package Number J16A
5
et
e
Physical Dimensions inches (millimeters) (Continued)
O
bs
ol
16-Lead (0.150× Wide) Molded Small Outline Package, JEDEC
NS Package Number M16A
16-Lead (0.300× Wide) Molded Small Outline Package, EIAJ (SJ)
NS Package Number M16D
6
e
Physical Dimensions inches (millimeters) (Continued)
O
bs
ol
et
16-Lead (0.300× Wide) Molded Dual-In-Line Package (P)
NS Package Number N16E
7
e
et
16-Lead Ceramic Flatpak (F)
NS Package Number W16A
bs
ol
54F/74F378 Parallel D Register with Enable
Physical Dimensions inches (millimeters) (Continued)
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O
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