Preliminary Specification PE9309 3.0 - 13.5 GHz Low Power UltraCMOS™ Divide-by-4 Prescaler Product Description The PE9309 is a high-performance dynamic UltraCMOS™ prescaler with a fixed divide ratio of 4. Its operating frequency range is 3.0 GHz to 13.5 GHz. The PE9309 operates on a single supply with a frequency-selecting bias resistor and draws only 16 mA. It is packaged in a small 8-lead Flat Pack and is also available in Die form for Hybrid application. The PE9309 is manufactured on Peregrine’s UltraCMOS™ process, a patented variation of silicon-on-insulator (SOI) technology on a sapphire substrate, offering the performance of GaAs with the economy and integration of conventional CMOS. Features • High-frequency operation: up to 13.5 GHz • Fixed divide ratio of 4 • Low-power operation:16 mA typical @ 2.6V • Small package: 8-lead Formed Flat pack • Available as Die Typical Industries Figure 2. Package Type • • • • • • • 8-lead CSOIC Medical Automotive Telecom Infrastructure Test Instrumentation Down-hole oil/gas Military Screening available for commercial space applications Figure 1. Functional Schematic Diagram D ESD SET CLR D Q Q SET CLR Q ESD Q Output Buffer Chip Boundary Table 1. Electrical Specifications (ZS = ZL = 50 Ω) -40° C ≤ TA ≤ 85° C, unless otherwise specified Parameter Conditions Frequency Minimum 3.0 Output Power (Pout) 0.75 GHz ≤ Fout ≤ 3.375 GHz 0 Input Power (Pin) 3.0 GHz ≤ Fin < 13.5 GHz 0 Document No. 70-0241-04 │ www.psemi.com Typical Maximum Units 13.5 GHz dBm 7 dBm ©2007-2009 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 6 PE9309 Preliminary Specification Figure 3. Pin Configuration (Top View) Table 4. Absolute Maximum Ratings Symbol Parameter/Conditions VBYPS 1 8 RBIAS VDD DC Supply voltage VBYPS 2 7 VDD TST Storage temperature range RF IN 3 6 RF OUT TOP Operating temperature range 5 NC 9309 Top View GND 4 Side View Max Units 3.0 V -65 150 °C -40 85 °C VESD ESD voltage (Human Body Model) 250 V PINMAX Maximum input power 14 dBm Exceeding absolute maximum ratings may cause permanent damage. Operation should be restricted to the limits in the Operating Ranges table. Operation between operating range maximum and absolute maximum for extended periods may reduce reliability. GND Table 2. Pin Descriptions Pin No. Pin Name Min Description Device Functional Considerations 1 VBYPS Prescaler Supply Bypass 2 VBYPS Prescaler Supply Bypass 3 IN RF Input 4 GND Ground 5 NC 6 OUT 7 VDD 8 RBIAS Frequency-Selecting Bias Resistor The PE9309 divides a 3.0 GHz to 13.5 GHz input signal by four, producing a 750 MHz to 3.375 GHz output signal. In order for the prescaler to work properly, several conditions need to be adhered to. It is crucial that pins 1, 2 and 7 be supplied with bypass capacitors to ground. In addition, the output signal (pins 6) needs to be ac coupled via an external capacitor as shown in the test circuit in Figure 5. GND GND Bottom of the package is Ground. Connecting the bottom of the package to ground is required The input frequency range is selected by the value of RBIAS according to Figure 4. Not Connected RF Output. Supply Voltage The ground pattern on the board should be made as wide as possible to minimize ground impedance. Table 3. Operating Ranges Parameter Min Typ Max Units Supply Voltage (VDD) 2.45 2.6 2.75 V Supply Current (IDD) 6 23 mA The bottom of the package is the primary ground connection and it needs to be soldered to the PCB ground. Figure 4. Frequency versus RBIAS 15 14 Electrostatic Discharge (ESD) Precautions Lower Freq Lim 13 Frequency (GHz) When handling this UltraCMOS™ device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the specified rating. 12 Optimal Freq Lim 11 10 Upper Freq Lim 9 8 7 6 Latch-Up Avoidance 5 Unlike conventional CMOS devices, UltraCMOS™ devices are immune to latch-up. 3 2 4 0 5 10 15 20 25 30 35 40 45 50 55 60 RBIAS (KOhm) ©2007-2009 Peregrine Semiconductor Corp. All rights reserved. Page 2 of 6 Document No. 70-0241-04 │ UltraCMOS™ RFIC Solutions PE9309 Preliminary Specification Figure 5. Test Circuit Block Diagram 0.01µF 1 VBYPS 2 VBYPS 10 pF 8 VDD 7 RBIAS 10 pF 9309 3 50Ω RBIAS VDD OUT IN 6 10 pF T Line* 4 GND NC 0.01µF 5 Spectrum Analyzer 50Ω 6.8 pF RF Source T Line* GND Side View *T Line = Transmission Line Figure 6. High Frequency System Application The wideband frequency of operation of the PE9309 makes it an ideal part for use in a DBS down converter system. INPUT DBS 1 st BPF SAW AGC IF FM DEMOD BASEBAND OUTPUT DIVIDE BY 4 PE97632 9309 LOW NOISE PLL SYNTH LPF Document No. 70-0241-04 │ www.psemi.com ©2007-2009 Peregrine Semiconductor Corp. All rights reserved. Page 3 of 6 PE9309 Preliminary Specification Figure 7. Evaluation Board Layouts Evaluation Kit Peregrine Specification 101-0392 The Ceramic SOIC Prescaler Evaluation Board was designed to help customers evaluate the PE9309 divide-by-4 prescaler. On this board, the device input (pin 3) is connected to the SMA connector J5 through a 50 Ω transmission line. The device output (pin 6) is connected to SMA connector J6 through a 50 Ω transmission line. J4 provides DC power to the device via pin 7. J2 powers U2. Multiple decoupling capacitors (C4,6,13,16=10pF, C3,5,14,15=0.01uF) are used. One out of eight different resistors for RBIAS is selected by toggling SW1, SW2 and SW3 according to the table shown in Figure 8. Jumper on J3 should be on to lower setting (1 and 2). It is the responsibility of the customer to determine proper supply decoupling for their design application. The board is constructed using 4 layers. The top and bottom layers are comprised of Rogers low loss 4350 material having a core thickness of 0.010"; while the internal layers are comprised of FR-4. The overall board thickness is 0.062". Applications Support If you have a problem with your evaluation kit or if you have applications questions call (858) 731-9400 and ask for applications support. You may also contact us by fax or e-mail: Fax: (858) 731-9499 E-Mail: [email protected] Figure 8. Evaluation Board Schematic Peregrine Specification 102-0468 VDD 1 VDD2 ADG708_16LEAD_TSSOP J4 J3 1 HEADER 2 1 HEADER 2 + 2 1 2 + C11 C8 10µF 10µF 2 Rbias 5.6K 8.2K 12.0K 18.0K 27.0K 39.0K 56.0K 82.0K Hi Z 1 A0 1 2 3 1 2 2 3 R8 5.6K 4 R9 8.2K 5 12.0K 6 18.0K 7 R10 VDD1 R1 1 A0 A1 EN A2 VSS GND S1 VDD S2 S5 S3 S6 S4 S7 D S8 16 A1 15 A2 VDD1 14 R16 13 12 R12 27.0K 11 R13 39.0K 10 R14 56.0K 9 R15 82.0K 0 OHM C5 C6 0.01uF 10pF 220 8 220 SW1 0 1 0 1 0 1 0 1 X 220 SW2 0 0 1 1 0 0 1 1 X U2 VDD1 J2 SW3 0 0 0 0 1 1 1 1 X C13 10pF C14 0.01uF VDD1 VDD2 4 3 2 1 2 3 4 5 DNI 6 4 R34 R33 6 DNI R18 DNI R 19 SW3 5 5 R21 DNI R20 0 OHM DNI R24 DNI R25 DNI R26 DNI A2 A1 A0 C3 C4 0.01uF 10pF U1 Prescaler 6 10 9 8 7 1 2 3 4 J5 R2 1 DNI J6 1 2 R3 R4 R5 R6 DNI DNI DNI DNI VDD2 10K 10K 10K 10pF C7 R 29 R 28 2 0.01uF C9 C10 10pF 0.01uF 1 D4 D3 1 8 7 6 5 C16 6.8pF D NI R 27 2 DNI 2 DNI D2 1 VBYPS RBIAS VDD VBYPS IN OUT GND NC C15 2 1 DNI 5 CA1 SW2 R22 SW1 J1 4 VDD1 6 4 R32 VDD1 MT4 1 1 1 1 1 J8 1 2 MT3 2 MT2 50 OHM J7 PCB MOUNTING HOLES MT1 NOTES: 1. USE 101-0392-01 PCB 2. CAUTION: CONTAINS PARTS AND ASSEMBLIES SUSCEPTIBLE TO DAMAGE BY ELECTROSTATIC DISCHARGE (ESD) 3. ALL TRANSMISION LINES ARE: 35MIL WIDTH, 14MIL GAPS, 20MIL CORE DIELECTRIC 3.48 Er AND 2.8MIL Cu THICKNESS. ©2007-2009 Peregrine Semiconductor Corp. All rights reserved. Page 4 of 6 Document No. 70-0241-04 │ UltraCMOS™ RFIC Solutions PE9309 Preliminary Specification Figure 9. Package Drawing 8-lead CSOIC .380 / .410 .210 / .250 Pin 1 .180 SQ MAX .050 TYP .150 TYP TOP VIEW .015 TYP SIDE VIEW .005 Typ .070 Max ALL DIMENSIONS ARE IN INCHES DRAWINGS ARE NOT TO SCALE Table 5. Ordering Information Order Code 9309-01 Part Marking 9309 Description PE9309-08CFPJ-B Engineering Samples Package Screening Specification 8-lead FLAT PACK Shipping Method 50 / Tray 1 9309-11 9309 PE9309-08CFPJ-B, Production Units 8-lead FLAT PACK 01-0015 50 / Tray 9309-99 PE9309A DIE, Production Units DIE 01-00322 100 / Waffle Pack 9309-00 PE9309-EK PE9309 Evaluation Kit Evaluation Board 1 / Box Notes: 1. Document 01-0015: Quality Requirements for Space Applications 2. Document 01-0032: Quality Requirements for the Evaluation of Semiconductor Dice for Space Applications Document No. 70-0241-04 │ www.psemi.com ©2007-2009 Peregrine Semiconductor Corp. All rights reserved. Page 5 of 6 PE9309 Preliminary Specification Sales Offices The Americas Peregrine Semiconductor Corporation Peregrine Semiconductor, Asia Pacific (APAC) 9380 Carroll Park Drive San Diego, CA 92121 Tel: 858-731-9400 Fax: 858-731-9499 Shanghai, 200040, P.R. China Tel: +86-21-5836-8276 Fax: +86-21-5836-7652 Europe Peregrine Semiconductor Europe Bâtiment Maine 13-15 rue des Quatre Vents F-92380 Garches, France Tel: +33-1-4741-9173 Fax : +33-1-4741-9173 Hi-Rel and Defense Products Peregrine Semiconductor, Korea #B-2607, Kolon Tripolis, 210 Geumgok-dong, Bundang-gu, Seongnam-si Gyeonggi-do, 463-943 South Korea Tel: +82-31-728-3939 Fax: +82-31-728-3940 Peregrine Semiconductor K.K., Japan Teikoku Hotel Tower 10B-6 1-1-1 Uchisaiwai-cho, Chiyoda-ku Tokyo 100-0011 Japan Tel: +81-3-3502-5211 Fax: +81-3-3502-5213 Americas: Tel: 858-731-9453 Europe, Asia Pacific: 180 Rue Jean de Guiramand 13852 Aix-En-Provence Cedex 3, France Tel: +33-4-4239-3361 Fax: +33-4-4239-7227 For a list of representatives in your area, please refer to our Web site at: www.psemi.com Data Sheet Identification Advance Information The product is in a formative or design stage. The data sheet contains design target specifications for product development. Specifications and features may change in any manner without notice. Preliminary Specification The data sheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. Product Specification The data sheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a DCN (Document Change Notice). ©2007-2009 Peregrine Semiconductor Corp. All rights reserved. Page 6 of 6 The information in this data sheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user’s own risk. No patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. Peregrine’s products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS, HaRP, MultiSwitch and DuNE are trademarks of Peregrine Semiconductor Corp. Document No. 70-0241-04 │ UltraCMOS™ RFIC Solutions