PI6C4512 PLL Clock Multiplier Features Description • Zero ppm multiplication error The PI6C4512 is a precision general-purpose clock synthesizer with fmax≤ 200MHz. The PI6C4512 uses an external low-cost crystal to generate a very accurate rate and stable system clocks. • Input crystal frequency range: 5 - 30MHz • Input clock frequency range: 4 - 50MHz • Output clock frequencies range ≤ 200MHz • Period jitter ≤ 100ps (typ) • 9 Selectable frequencies controlled by S0 and S1 pins • Supply voltage: 3.3V ±10% or 5.0V ±10% • Packaging (Pb-Free and Green): —8-pin SOIC (W) Block Diagram S0 Pin Configuration PLL Clock Synthesis and Control Circuit S1 Output Buffer CLK X1 / ICLK X2 Crystal Oscillator Output Buffer REF X1 / ICLK 1 8 X2 VCC 2 7 S1 GND 3 6 S0 REF 4 5 CLK Clock Output Table(1) S1 0 0 0 M M M 1 1 1 S0 0 M 1 0 M 1 0 M 1 CLK x4 x (16/3) x5 x 2.5 x2 x (10/3) x6 x3 x8 Notes: 1. M = Mid-level (unconnected, biases to VCC/2). 06-0034 1 PS8763B 03/30/06 PI6C4512 PLL Clock Multiplier Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested) Storage temperature ......................................................-65°C to +150ºC Ambient Operating Temperature ....................................... 0°C to +70ºC Supply Voltage to Ground Potential (VCC)..................... -0.3V to +7.0V Inputs (Referenced to GND)................................... -0.5V to VCC +0.5V Clock Output (Referenced to GND) ....................... -0.5V to VCC +0.5V Soldering Temperature (Max of 10 seconds).................................260ºC Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Pin Description Name X1/ICLK VCC GND REF CLK S0 S1 X2 Pin 1 2 3 4 5 6 7 8 Description Crystal connection or clock input. Supply voltage: 3.3V ±10% or 5.0V ±10% Connect to GND Buffered crystal oscillator output clock Clock output Multiplier select pin 0. Connect to GND or VCC or float (no connection). Multiplier select pin 1. Connect to GND or VCC or float (no connection). Crystal connection. Leave unconnected for clock input. External Components The PI6C4512 requires a minimum number of external components for proper operation. Decoupling capacitors of 0.1µF || 0.01µF should be connected between each VDD and GND and placed as close to the chip as possible. A series termination resistor of 33Ω may be used for clock outputs. If a crystal is used, it should be a fundamental mode, parallel resonant crystal. Crystal capacitors should be connected from X1 to ground and from X2 to ground to according to the crystal specifications. The value of capacitors is given by the following equation, where CL is the crystal load capacitance: Crystal caps (pF) = (CL -15) x 2. Recommended Operation Conditions Symbol VCC TA 06-0034 Description Test Condition Min. Typ. Max. Units Supply Voltage 3 5.5 V Operating Temperature 0 +70 °C 2 PS8763B 03/30/06 PI6C4512 PLL Clock Multiplier DC Electrical Characteristics (VCC = 3.3V ± 10% and 5.0V ± 10%, TA = 0°C to +70°C, unless otherwise noted) Symbol Description Test Condition Pin Min. VCC 3 VCC ` 12 (VCC/2) +1 VCC/2 VCC Supply voltage ICC Supply current VIH Input logic HIGH ICLK VIL Input logic LOW ICLK VIH Input logic HIGH S0, S1 VIM Input mid-level S0, S1 VIL Input logic LOW S0, S1 VOH High-level output voltage IOH = -12mA CLK, REF VOL Low-level output voltage IOL = +12mA CLK, REF IS No load, 20MHz crystal Short circuit current Typ. Max. Units 5.5 V 30 mA V VCC/2 (VCC/2)-1 VCC-0.5 V VCC/2 V 0.5 2.4 V V 0.4 CLK V ±70 V mA AC Electrical Characteristics (VCC = 3.3V ±10% and 5.0V ± 10%, TA = 0°C to +70°C, unless noted) Symbol FIN Parameter Input Frequency FOUT Output frequency(1) Test Condition Pin Min. Crystal ICLK Clock Typ. Max. Unit 5 30 MHz ICLK 4 50 MHz VCC: 4.5V to 5.5V CLK 20 200 MHz VCC: 3.0V to 3.6V CLK 20 180 MHz TR Output clock rise time 0.8V to 2.0V, CL = 15pF load CLK 1 ns TF Output clock fall time 2.0V to 0.8V, CL = 15pF load CLK 1 ns At VCC/2, f ≤ 150MHz CLK 45 50 55 At VCC/2, f > 150MHz CLK 40 50 60 10 100 250 TDC Output clock duty-cycle BW PLL bandwidth f ≤ 150MHz CLK TPJ Period Jitter 100MHz to 200MHz CLK % kHz ps Notes: 1. The phase relationship between input and output clocks can change at power up. Recommended Crystal Pericom recommends the Pericom 49S SMD series crystal, which is a low cost, low profile SMD crystal packaged in a HC-49/u short SMD package. 06-0034 Recommended Crystal Specifications Parameter Value Units Fundamental AT 5 - 30 MHz Frequency Tolerance ±50 PPM Temperature and Aging Stability ±50 PPM CO/CI Ratio 240 Load Cap 18 pF Equivalent Series Resistance 30 Ω Mode of Oscillation Frequency 3 PS8763B 03/30/06 PI6C4512 PLL Clock Multiplier Packaging Mechanical: 8-Pin SOIC (W) � ���� ���� ���� ���� ����� ����� � ���� ���� ���� ����� ���� ����� ����� ���� ���� ���� ����� ���� ����� ����� ���� ���� ���� ���� ���� ���� ���� ���� ���� ���� ������������� ��� ���� ��� ���� ����� ����� ���� ���� ����� ���� ����� ���� ���� ����� ���� ����� ���� ������������������ ���� �������������� Ordering Information(1,2) Ordering Code Package Code Package Description PI6C4512W W 8-pin SOIC PI6C4512WE WE Pb-Free and Green 8-pin SOIC Note: 1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/ 2. E = Pb-free and Green Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com 06-0034 4 PS8763B 03/30/06