PI6C490086

PI6C490086
PLL Clock Multiplier
Features
Description
ÎÎSupport XTAL or Clock input at 25MHz
The PI6C490086 is a low jitter clock generator supporting
either XTAL or reference input. Two of its buffered outputs can
support wide operating voltage from 1.8V to 3.3V. It is a cost effective way to generate multiple outputs for all kinds of applications that need 25MHz with different power supplies and a 8.192
MHz clock signal.
ÎÎThree buffered outputs support VDD operation
ÎÎOne 8.192 MHz output
ÎÎVery low phase jitter(RMS), 25MHz : < 2ps
ÎÎVery low additive jitter: <500fs (typ)
ÎÎ3.3V supply voltage for Core
ÎÎ1.8V ~ 3.3V supply voltage for
two outputs
ÎÎPackaging: 16-pin TSSOP
ÎÎCommercial & Industrial Temperature support
Applications
ÎÎNetworking Systems
ÎÎFemtocell BTS
ÎÎPeripheral
Block Diagram
Pin Configuration (16-Pin TSSOP)
VDD
VDDO
PLL
X1/CLKIN
X2
Crystal
Oscillator
1
16
X2
VDD
2
15
GND
CLK8
GND
3
14
VDD
4
13
CLK3
VDD
CLK1
VDDO8
5
12
CLK2
CLK2
CLK8
6
11
VDDO
GND
7
10
CLK3
OE#
8
9
GND
CLK1
GND
12-0165
X1/ICLKIN
VDDO8
16-pin (173 mil) TSSOP
OE#
1
www.pericom.com
PI6C490086
RevB
2/16/2012
PI6C490086
PLL Clock Multiplier
Pin number
Pin Name
Type
Description
1
X1/CLKIN
Input
Crystal connection or clock input
2, 4, 14
VDD
Power
3.3V Core and CLK1 supply voltage
5
VDDO8
Power
Supply voltage for CLK8
6
CLK8
Output
8.192 MHz output
7, 9, 15
GND
Power
Connect to Ground
8
OE#
Input
Global output enable when low. Internal pull-down
resistor.
10
CLK3
Output
Clock Output 3
11
VDDO
Power
Supply voltage from 1.8V to 3.3V for CLK2 and CLK3
12
CLK2
Output
Clock Output 2
13
CLK1
Output
Clock Output 1
16
X2
Output
Crystal connection
Function Table
OE#
CLK1/CLK2/CLK3/CLK8
0
Enabled
1
Hi-Z, weak pull down
12-0165
2
www.pericom.com
PI6C490086
RevB
2/16/2012
PI6C490086
PLL Clock Multiplier
Maximum Ratings
(Above which useful life may be impaired. For user guidelines, not tested.)
Note: Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these
or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
reliability.
Storage Temperature........................................................... –65°C to +150°C
Supply Voltage to Ground Potential, VDD .........................–0.5V to +4.6V
Power Requirements(Over operating free-air temperature range)
Symbol
Parameter
Min.
Typ.
Max.
Units
VDD
Power Supply Voltage
3.135
3.3
3.465
V
VDDO, VDDO8
Power Supply Voltage for outputs
1.71
3.465
V
IDD
Power supply current, no load
TA
Ambient Operating Temperature
tUP
Power Supply Ramp Time
20
mA
0
+70
-40
+85
°C
4
ms
DC Electrical Characteristics
Symbol
Parameter
Condition
Min.
VIH
Input High Voltage
CLKIN, OE#
VDD/2+1
VIL
Input Low Voltage
CLKIN, OE#
VOH
Output High Voltage
VOL
Output Low Voltage
ZO
Nominal Output Impedance
R PD
Internal Pull-down Resistor
CIN
Input Capacitance
12-0165
IOH = -4mA
and -8mA
Typ.
Max.
V
VDD/2-1
V
8MHz output
VDDo8 – 0.4
V
25MHz
output
VDDo – 0.4
V
0.4
IOL = 4mA and 8mA
OE#
200
CLKIN
230
Inputs
4
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PI6C490086
V
W
20
3
Units
kW
pF
RevB
2/16/2012
PI6C490086
PLL Clock Multiplier
AC Electrical Characteristics
Symbol
Parameter
FIN
Input Frequency
tR
(Note 4)
Conditions
Min.
Typ.
Max.
Units
Fundamental Crystal
25
Input Clock
25
Output Rise Time
20% to 80% 25MHz, Note 1
1
tF
Output Fall Time
80% to 20% 25MHz, Note 1
1
tR
Output Rise Time
20% to 80% 8.192MHz, Note 1
2
tF
Output Fall Time
80% to 20% 8.192MHz, Note 1
2
tDC
Duty Cycle
Note 2
50
Ferror
Output Frequency Synthesis Error
Jphase
Clock Phase Jitter (RMS)
25MHz only, Note 2
0.5
Jadd
Additive Jitter
25MHz, Note 3
500
fs
Jadd
Absolute Period Jitter (pk-pk)
8.192MHz
+/-100
ps
MHz
ns
53
0
%
ppm
1.5
ps
1. Note 1: Measured with 7 pF lump load.
2. Note 2: 12 kHz to 20 MHz offset frequency using a crystal input.
3. Note 3: CLKIN input with X2 floating.
4. Note 4: Do not drive this device without a crystal or valid clock input
Crystal Oscillator Circuit
X1
C1
20pF
Crystal�(CL�=�16pF)
X2
C2
20pF
0.1µF
VDD
OUTPUTS
0.1µF
CLOAD
VDD
GND
CLK out
GND
CMOS Test Configuration
12-0165
4
www.pericom.com
PI6C490086
RevB
2/16/2012
PI6C490086
PLL Clock Multiplier
Packaging Mechanical: 16-Pin TSSOP (L)
DOCUMENT CONTROL NO.
PD - 1310
REVISION: E
16
DATE: 03/09/05
.169
.177
1
1
.0256
BSC
0.65
.193
.201
4.9
5.1
4.3
4.5
.004
.008
.047
max.
1.20
.002
.006
.007
.012
0.09
0.20
0.45 .018
0.75 .030
SEATING
PLANE
.252
BSC
6.4
0.05
0.15
0.19
0.30
Pericom Semiconductor Corporation
3545 N. 1st Street, San Jose, CA 95134
1-800-435-2335 • www.pericom.com
Note:
1. Package Outline Exclusive of Mold Flash and Metal Burr
2. Controlling dimentions in millimeters
3. Ref: JEDEC MO-153F/AB
DESCRIPTION: 16-Pin, 173-Mil Wide, TSSOP
PACKAGE CODE: L
Ordering Information
Ordering Code
Package Code
Package Type
Operating Temperature
PI6C490086LE
L
Pb-free & Green, 16-pin TSSOP
Commercial
PI6C490086LIE
L
Pb-free & Green, 16-pin TSSOP
Industrial
Notes:
• Thermal characteristics can be found on the company web site at www.pericom.com/packaging/
• E = Pb-free and Green
• X suffix = Tape/Reel
Pericom Semiconductor Corporation • 1-800-435-2336
12-0165
5
www.pericom.com
PI6C490086
RevB
2/16/2012