PLL PLL103-04SI

Preliminary
PLL103-04
1-to-4 Clock Distribution Buffer
FEATURES
•
•
4 outputs identical to FIN.
Low skew (< 250 ps between outputs).
Input / Output frequency range 0 – 160 MHz
25mA drive capability at TTL levels.
70mA drive capability at CMOS levels.
Output enable mode available to tri-state all
outputs.
3.3V operation.
Available in 8-Pin 150mil SOIC.
FIN
1
CLK1
2
CLK2
3
CLK3
4
PLL103-04
•
•
•
•
•
•
PIN CONFIGURATION
8
OE^
7
VDD
6
GND
5
CLK4
FIN = 0 ~ 160 Mhz
Note: ^: Internal pull-up (30kΩ)
DESCRIPTIONS
The PLL103-04 is a 1-to-4 Clock Distribution Buffer,
reproducing the reference input frequency (FIN) at 4
different outputs. It is designed to minimize skew
between outputs and provides TTL and CMOS
compatible output levels. An output enable selector is
available to tri-state all outputs.
BLOCK DIAGRAM
OE^
CLK1
FIN
CLK2
CLK3
CLK4
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 09/26/00 Page 1
Preliminary
PLL103-04
1-to-4 Clock Distribution Buffer
PIN DESCRIPTIONS
Name
Number
Type
Description
FIN
1
I
Input Clock Frequency (FIN range 0 ~ 160MHz).
CLK1
2
O
Buffered Clock Output.
CLK2
3
O
Buffered Clock Output.
CLK3
4
O
Buffered Clock Output.
CLK4
5
O
Buffered Clock Output.
GND
6
P
Ground.
VDD
7
P
3.3V Power Supply.
OE
8
I
Output Enable. Tri-states all outputs if low. Internal pull-up resistor of 30 kΩ
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 09/26/00 Page 2
Preliminary
PLL103-04
1-to-4 Clock Distribution Buffer
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS
SYMBOL
MIN.
MAX.
UNITS
V CC
- 0.5
7
V
Input Voltage Range
VI
- 0.5
V CC + 0.5
V
Output Voltage Range
VO
- 0.5
V CC + 0.5
V
260
°C
-65
150
°C
0
70
°C
2
kV
Supply Voltage Range
Soldering Temperature
Storage Temperature
TS
Ambient Operating Temperature
ESD Voltage
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other
conditions above the operational limits noted in this specification is not implied.
2. Electrical Characteristics
V DD = 3.0~3.6V, unless otherwise stated
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
0.8
V
Input Low Voltage
V IL
Input High Voltage
V IH
Input Low Current
I IL
V IN = 0V
19
50.0
µA
Input High Current
I IH
V IN = V DD
0.10
100.0
µA
Output Low Current
I OL
V OL = 1.5 V
50
mA
Output High Current
I OH
V OH = 1.5 V
50
mA
Power Down Supply Current
I DD
REF = 0MHz
0.3
50.0
µA
Supply Current
I DD
Unloaded outputs at 75MHz,
SEL inputs at V DD or GND
30.0
40.0
mA
MIN.
TYP.
MAX.
UNITS
2.0
V
3. TIMING CHARACTERISTICS
PARAMETERS
SYMBOL
CONDITIONS
Rise Time
Tr
Measured at 0.8V ~ 2.0V @ 3.3V
0.8
0.95
1.1
ns
Fall Time
Tf
Measured at 2.0V ~ 0.8V @ 3.3V
0.78
0.85
0.9
ns
Propagation
T PROP
1
4
6
ns
Output Duty Cycle
DT
45
50
55
%
Output-to-Output skew
T skew
250
ps
V T = 1.5 V
Rising edges at VDD/2
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 09/26/00 Page 3
PLL103-04
Preliminary
1-to-4 Clock Distribution Buffer
PACKAGE INFORMATION
8 PIN Narrow SOIC ( mm )
SOIC
Symbol
Min.
Max.
A
1.55
1.73
A1
B
0.15
0.35
0.18
0.49
C
D
0.19
4.80
0.25
4.98
E
H
3.81
5.84
3.99
6.20
L
e
0.41
0.89
1.27 BSC
E
H
D
A
A
1
C
L
B
e
ORDERING INFORMATION
For part ordering, please contact our Sales Department:
47745 Fremont Blvd., Fremont, CA 94538, USA
Tel: (510) 492-0990 Fax: (510) 492-0991
PART NUMBER
The order number for this device is a combination of the following:
Device number, Package type and Operating temperature range
PLL103-04 S C
PART NUMBER
TEMPERATURATURE
C=COMMERCIAL
M=MILITARY
I=INDUSTRAL
PACKAGE TYPE
S=SOIC
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information
furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said
information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.
LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the
express written approval of the President of PhaseLink Corporation.
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 09/26/00 Page 4