PLL PLL650-10SM

PRELIMINARY
PLL650-10
Network LAN Clock for Gigabit Ethernet
FEATURES
•
•
Full CMOS output swing with 40-mA output drive
capability. 25-mA output drive at TTL level.
Advanced, low power, sub-micron CMOS processes.
25MHz fundamental crystal or clock input.
Two outputs fixed at 125MHz..
Zero PPM synthesis error in all clocks.
Ideal for Network switches.
3.3V operation.
Available in 8-Pin 150mil SOIC.
XIN
1
XOUT
2
GND
3
125MHz
4
P LL 650-10
•
•
•
•
•
•
PIN CONFIGURATION
8
VDD
7
GND
6
VDD
5
125MHz
DESCRIPTIONS
The PLL 650-10 is a low cost, low jitter, and high
performance clock synthesizer. With PhaseLink’s
proprietary analog Phase Locked Loop techniques, the chip
accepts 25MHz crystal, and produces multiple output
clocks for networking chips, and ASICs.
BLOCK DIAGRAM
125MHz
XIN
XO UT
XTAL
OS C
C ontrol
Logic
125MHz
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 12/10/02 Page 1
PRELIMINARY
PLL650-10
Network LAN Clock for Gigabit Ethernet
PIN DESCRIPTIONS
Name
Number
Type
Description
XIN
1
I
25MHz fundamental crystal input (20pF C L parallel resonant). C L have been
integrated into the chip. No external C L capacitor is required.
XOUT
2
O
Crystal connection pin.
125MHz
4,5
O
125MHz outputs.
VDD
6,8
P
3.3V power supply
GND
3,7
P
Ground.
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 12/10/02 Page 2
PRELIMINARY
PLL650-10
Network LAN Clock for Gigabit Ethernet
Electrical Specifications
1. Absolute Maximum Ratings
PARAMETERS
SYMBOL
MIN.
MAX.
UNITS
V CC
- 0.5
7
V
Input Voltage Range
VI
- 0.5
V CC + 0.5
V
Output Voltage Range
VO
- 0.5
V CC + 0.5
V
260
°C
-65
150
°C
0
70
°C
Supply Voltage Range
Soldering Temperature
Storage Temperature
TS
Ambient Operating Temperature
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause
permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional
operations of the device at these or any other conditions above the operational limits noted in this specification is not implied.
2. AC Specification
PARAMETERS
CONDITIONS
MIN.
TYP.
MAX.
UNITS
10
25
27
MHz
Input Frequency
Output Rise Time
0.8V to 2.0V with no load
1.5
ns
Output Fall Time
2.0V to 0.8V with no load
1.5
ns
Duty Cycle
At VDD/2
55
%
Max. Absolute Jitter
Short term
Max. Jitter, cycle to cycle
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
45
50
±150
ps
80
ps
Rev 12/10/02 Page 3
PRELIMINARY
PLL650-10
Network LAN Clock for Gigabit Ethernet
3. DC Specification
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
Operating Voltage
VDD
3.13
Input High Voltage
V IH
VDD/2
Input Low Voltage
V IL
VDD/2
Input High Voltage
V IH
For all normal input
Input Low Voltage
V IL
For all normal input
Output High Voltage
V OH
I OH = -25mA
Output Low Voltage
V OL
I OL = 25mA
Output High Voltage At
CMOS Level
V OH
I OH = -8mA
Operating Supply Current
I DD
No Load
Short-circuit Current
IS
Nominal output current*
I out
CMOS output level
Nominal output current*
I out
TTL output level
MAX.
UNITS
3.47
V
V
VDD/2 - 1
2
V
V
0.8
2.4
V
V
0.4
VDD-0.4
V
V
35
mA
±100
mA
35
40
mA
20
25
mA
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 12/10/02 Page 4
PRELIMINARY
PLL650-10
Network LAN Clock for Gigabit Ethernet
PACKAGE INFORMATION
8 PIN Narrow SOIC ( mm )
SOIC
E
Symbol
Min.
Max.
A
1.35
1.75
A1
0.10
0.25
B
0.33
0.51
C
0.19
0.25
D
9.80
10.00
E
3.80
4.00
H
5.80
6.20
L
0.40
e
1.27
1.27 BSC
H
D
A
A1
C
e
B
L
ORDERING INFORMATION
For part ordering, please contact our Sales Department:
47745 Fremont Blvd., Fremont, CA 94538, USA
Tel: (510) 492-0990 Fax: (510) 492-0991
PART NUMBER
The order number for this device is a combination of the following:
Device number, Package type and Operating temperature range
PLL650-10 S C
PART NUMBER
TEMPERATURATURE
C=COMMERCIAL
M=MILITARY
I=INDUSTRAL
PACKAGE TYPE
S=SOIC
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information
furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said
information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.
LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the
express written approval of the President of PhaseLink Corporation.
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Re v 12/10/02 Page 5