PULSECORE ASM3P2180AF-08TR

ASM3P2180A
February 2008
rev 1.2
Peak Reducing EMI Solution
Features
clock and data dependent signals. ASM3P2180A allows
•
Generates a 1x EMI optimized clock output.
significant system cost savings by reducing the number
•
Input frequency: 6MHz - 10MHz
of circuit board layers, and shielding that are traditionally
18MHz - 30MHz
•
required
to
pass
EMI
regulations.
ASM3P2180A
Output frequency: 6MHz - 10MHz
modulates the output of a single PLL in order to
18MHz - 30MHz
“spread” the bandwidth of a synthesized clock, thereby
•
Two selectable down spread options.
decreasing the peak amplitudes of its harmonics. This
•
Selectable frequency range.
results in significantly lower system EMI compared to
•
Integrated loop filter components.
the typical narrow band signal produced by oscillators
•
Operates with a 3.3V supply.
and most clock generators. Lowering EMI by increasing
•
Low-power CMOS design.
a signal’s bandwidth is called spread spectrum clock
•
Commercial temperature range
generation. ASM3P2180A uses the most efficient and
•
8-pin SOIC and 8-pin TSSOP packages.
optimized modulation profile approved by the FCC and
is implemented by using a proprietary all-digital method.
Product Description
Applications
The ASM3P2180A is a versatile spread spectrum
The ASM3P2180A is targeted towards notebook LCD
frequency modulator designed specifically for a wide
displays, other displays using an LVDS interface, PC
range of clock frequencies. ASM3P2180A reduces
peripheral devices and embedded systems.
electromagnetic interference (EMI) at the clock source,
allowing system wide reduction of EMI of down stream
Block Diagram
VDD
FS
Modulation
CLKIN / XIN
XOUT
SS%
Crystal
Oscillator
CLKOUT
PLL
GND
PulseCore Semiconductor Corporation
1715 S. Bascom Ave Suite 200, Campbell, CA 95008 • Tel: 408-879-9077 • Fax: 408-879-9018
www.pulsecoresemi.com
Notice: The information in this document is subject to change without notice.
ASM3P2180A
February 2008
rev 1.2
Pin Diagram
CLKIN / XIN 1
8
XOUT 2
3P2180A
NC
7 FS
GND 3
6 VDD
SS% 4
5 CLKOUT
Pin Description
Pin#
Pin Name
Type
Description
1
CLKIN / XIN
I
Crystal connection or external reference clock input.
2
XOUT
O
Connection for an external crystal. If using an external reference, this pin must
be left unconnected.
3
GND
P
Ground to entire chip.
4
SS%
I
Spread Selection Input. Has an internal pull-up resistor.
5
CLKOUT
O
Modulated Clock Output.
6
VDD
P
Power supply for the entire chip.
7
FS
I
Frequency selection bit. This pin selects the frequency range of operation.
(Refer to the Frequency Range Selection Table). Has an internal pull-up
resistor.
8
NC
-
No connect.
Frequency Range Selection
FS
Frequency Range (MHz)
0
6 -10
1
18-30
Spread Selection table
SS%
0
1
Frequency (MHz)
FS=0
FS=1
6
18
8
24
10
30
6
18
8
24
10
30
Deviation (%) (typ)
-2
-1.5
-1
-4
-3
-2
Peak Reducing EMI Solution
Notice: The information in this document is subject to change without notice.
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ASM3P2180A
February 2008
rev 1.2
Absolute Maximum Ratings
Symbol
VDD, VIN
TSTG
Rating
Unit
Voltage on any pin with respect to Ground
Parameter
-0.5 to +4.6
V
Storage temperature
-65 to +125
°C
Ts
Max. Soldering Temperature (10 sec)
260
°C
TJ
Junction Temperature
150
°C
2
KV
TDV
Static Discharge Voltage (As per JEDEC STD22- A114-B)
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability.
DC Electrical Characteristics
Symbol
Max
Unit
VIL
Input low voltage
Parameter
GND – 0.3
Min
Typ
0.8
V
VIH
Input high voltage
2.0
VDD + 0.3
V
IIL
Input low current (pull-up resistors on inputs SS%, FS)
-27
µA
IIH
Input high current
18
µA
IXOL
XOUT output low current (@ 0.4V, VDD = 3.3V)
3
mA
IXOH
XOUT output high current (@2.5V, VDD = 3.3V)
4
mA
VOL
Output low voltage (VDD = 3.3V, IOL = 4mA)
VOH
2.5
IDD *
Output high voltage (VDD = 3.3V, IOH = 4mA)
Dynamic supply current normal mode (3.3V and 10pF
loading)
Static supply current standby mode
VDD
Operating voltage
2.8
ICC
tON
ZOUT
0.4
10
Power up time (first locked clock cycle after power up)
Clock output impedance
V
V
15
3.3
25
mA
7
mA
3.7
V
0.18
mS
50
Ω
*CLKIN pin pulled to GND
Peak Reducing EMI Solution
Notice: The information in this document is subject to change without notice.
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ASM3P2180A
February 2008
rev 1.2
AC Electrical Characteristics
Symbol
CLKIN
CLKOUT
tLH*
Parameter
Input frequency
Output frequency
Min
Typ
Max
FS=0
6
10
FS=1
18
30
FS=0
6
10
FS=1
18
30
Output rise time (measured at 0.8V to 2.0V)
1.2
tHL*
Output fall time (measured at 2.0V to 0.8V)
0.8
tJC
Jitter (cycle to cycle)
tD
Output duty cycle
MHz
MHz
1.3
1.4
nS
0.9
1.0
nS
325
45
Unit
50
pS
55
%
*tLH and tHL are measured into a capacitive load of 15pF
Typical Test Circuit
+3.3V
Crystal
XIN
VDD
C1
0.1uF
XOUT
C2
CLKOUT
GND
Spread spectrum output
(EMI suppressed)
CLOAD
Peak Reducing EMI Solution
Notice: The information in this document is subject to change without notice.
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ASM3P2180A
February 2008
rev 1.2
Package Information
8-Pin SOIC Package
H
E
D
A2
A
C
A1
D
θ
e
L
B
Dimensions
Symbol
Inches
Min
Max
Millimeters
Min
Max
A1
0.004
0.010
0.10
0.25
A
0.053
0.069
1.35
1.75
A2
0.049
0.059
1.25
1.50
B
0.012
0.020
0.31
0.51
C
0.007
0.010
0.18
0.25
D
0.193 BSC
4.90 BSC
E
0.154 BSC
3.91 BSC
e
0.050 BSC
1.27 BSC
H
0.236 BSC
6.00 BSC
L
0.016
0.050
0.41
1.27
θ
0°
8°
0°
8°
Peak Reducing EMI Solution
Notice: The information in this document is subject to change without notice.
5 of 8
ASM3P2180A
February 2008
rev 1.2
8-Pin TSSOP Package
H
E
D
A2
A
C
θ
e
A1
L
B
Dimensions
Symbol
Inches
Min
Millimeters
Max
A
Min
Max
0.043
1.10
A1
0.002
0.006
0.05
0.15
A2
0.033
0.037
0.85
0.95
B
0.008
0.012
0.19
0.30
c
0.004
0.008
0.09
0.20
D
0.114
0.122
2.90
3.10
E
0.169
0.177
4.30
4.50
e
0.026 BSC
0.65 BSC
H
0.252 BSC
6.40 BSC
L
0.020
0.028
0.50
0.70
θ
0°
8°
0°
8°
Peak Reducing EMI Solution
Notice: The information in this document is subject to change without notice.
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ASM3P2180A
February 2008
rev 1.2
Ordering Codes
Part number
Marking
Package Type
Temperature
ASM3P2180AF-08ST
ASM3P2180AF
8-pin SOIC, tube, Pb Free
Commercial
ASM3P2180AF-08SR
ASM3P2180AF
8-pin SOIC, tape and reel, Pb Free
Commercial
ASM3P2180AF-08TT
ASM3P2180AF
8-pin TSSOP, tube, Pb Free
Commercial
ASM3P2180AF-08TR
ASM3P2180AF
8-pin TSSOP, tape and reel, Pb Free
Commercial
ASM3P2180AG-08ST
ASM3P2180AG
8-pin SOIC, tube, Green
Commercial
ASM3P2180AG-08SR
ASM3P2180AG
8-pin SOIC, tape and reel, Green
Commercial
ASM3P2180AG-08TT
ASM3P2180AG
8-pin TSSOP, tube, Green
Commercial
ASM3P2180AG-08TR
ASM3P2180AG
8-pin TSSOP, tape and reel, Green
Commercial
Device Ordering Information
ASM 3P
2180A F- 08 S R
R = Tape & Reel, T = Tube or Tray
O = SOT
S = SOIC
T = TSSOP
A = SSOP
V = TVSOP
B = BGA
Q = QFN
U = MSOP
E = TQFP
L = LQFP
U = MSOP
P = PDIP
D = QSOP
X = SC-70
DEVICE PIN COUNT
F = LEAD FREE AND RoHS COMPLIANT PART
G = GREEN PACKAGE, LEAD FREE, and RoHS
PART NUMBER
X= Automotive
I= Industrial
P or n/c = Commercial
(-40C to +125C) (-40C to +85C)
(0C to +70C)
1 = Reserved
2 = Non PLL based
3 = EMI Reduction
4 = DDR support products
5 = STD Zero Delay Buffer
6 = Power Management
7 = Power Management
8 = Power Management
9 = Hi Performance
0 = Reserved
PulseCore Semiconductor Mixed Signal Product
Licensed under US patent #5,488,627, #6,646,463 and #5,631,920.
Peak Reducing EMI Solution
Notice: The information in this document is subject to change without notice.
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ASM3P2180A
February 2008
rev 1.2
PulseCore Semiconductor Corporation
1715 S. Bascom Ave Suite 200
Campbell, CA 95008
Tel: 408-879-9077
Fax: 408-879-9018
www.pulsecoresemi.com
Copyright © PulseCore Semiconductor
All Rights Reserved
Part Number: ASM3P2180A
Document Version: 1.2
Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003
Many PulseCore Semiconductor products are protected by issued patents or by applications for patent
© Copyright 2006 PulseCore Semiconductor Corporation. All rights reserved. Our logo and name are trademarks or registered trademarks
of PulseCore Semiconductor. All other brand and product names may be the trademarks of their respective companies. PulseCore reserves
the right to make changes to this document and its products at any time without notice. PulseCore assumes no responsibility for any errors
that may appear in this document. The data contained herein represents PulseCore’s best data and/or estimates at the time of issuance.
PulseCore reserves the right to change or correct this data at any time, without notice. If the product described herein is under
development, significant changes to these specifications are possible. The information in this product data sheet is intended to be general
descriptive information for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any
user or customer. PulseCore does not assume any responsibility or liability arising out of the application or use of any product described
herein, and disclaims any express or implied warranties related to the sale and/or use of PulseCore products including liability or warranties
related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in
PulseCore’s Terms and Conditions of Sale (which are available from PulseCore). All sales of PulseCore products are made exclusively
according to PulseCore’s Terms and Conditions of Sale. The purchase of products from PulseCore does not convey a license under any
patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of PulseCore or third parties. PulseCore
does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be
expected to result in significant injury to the user, and the inclusion of PulseCore products in such life-supporting systems implies that the
manufacturer assumes all risk of such use and agrees to indemnify PulseCore against all claims arising from such use.
Peak Reducing EMI Solution
Notice: The information in this document is subject to change without notice.
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