RT9263 Preliminary High Efficiency, Low Supply Current, Step-up DC/DC Converter General Description Features The RT9263 is a compact, high efficient, step-up z 1.0V Low Start-up Input Voltage DC/DC converter with an adaptive current mode z High Supply Capability to Deliver 3.3V 100mA PWM control loop, providing a stable and high with 1V Input Voltage efficient operation over a wide range of load z currents. It operates in both continuous and z 17µ µA Quiescent (Switch-off) Supply Current 90% Efficiency discontinuous current modes in stable waveforms z 550KHz Fixed Switching Rate without external compensation. z Providing Flexibility for Using Internal and The low start-up input voltage below 1V makes z External Power Switches SOT89-5 Package RT9263 suitable for 1 to 4 battery cell applications providing up to 400mA output current. The 550KHz Applications high switching rate minimized the size of external z PDA components. Besides, the 17µA low quiescent z Portable Instrument current together with high efficiency maintains long z DSC battery lifetime. Pin Configurations Ordering Information Part Number RT9263 Pin Configurations TOP VIEW RT9263CCX5 Package type X5 : SOT89-5 (Plastic SOT89-5) Operating temperature range C: Commercial standard 1 C : Chip enable control E : Driver for external power devices + VDD L1 4.7µH CE VDD FB LX GND 4 2 3 1. 2. 3. 4. 5. EXT VDD FB LX GND 3.3V VOUT1 R2 980K D1 1N5819 C2 1µF + FB 3 1. 2. 3. 4. 5. 100µF R1 1.6M CE RT9263CCX5 LX GND 2 5 1 Typical Application Circuit 100pF 4 TOP VIEW RT9263ECX5 (Plastic SOT89-5) VIN 5 C1 100µF Fig. 1 RT9263CCX5 Typical Application for Portable Instruments below 400mA DS9263-00 November 2001 www.richtek-ic.com.tw 1 RT9263 Preliminary + 100pF VDD RT9263ECX5 GND 100µF R1 1.6M L1 4.7µH LX EXT Q1 NMOS FB R2 980K 3.3V VOUT1 D1 1N5819 + VIN C2 1µF C1 100µF Fig. 2 0.4A ~ 1A Output Current Application D1 L1 10µH 100µF VDD EXT RT9263ECX5 LX GND FB Q1 NMOS 15V VOUT1 R1 2.2M 0.1µF R2 C2 200K 1µF Rm 0.05~0.1Ω + + 3.3/5V VIN C1 100µF Fig. 3 High Voltage Application (Rm should be added when IL > 100mA) D1 L1 10µH 100µF Q1 NMOS VDD RT9263CCX5 LX Chip Enable CE GND FB 0.1µF 15V VOUT1 R1 2.2M R2 C2 200K 1µF + + 3.3/5V VIN C1 100µF Fig.4 High Voltage Application with Shutdown Control www.richtek-ic.com.tw 2 DS9263-00 November 2001 RT9263 Preliminary Function Block Diagram RT9263CCX5 VDD LX + 1.25V _ FB Loop Control Circuit Q1 NMOS R1 CE GND RT9263ECX5 VDD EXT LX + 1.25V _ FB Loop Control Circuit Q1 NMOS R1 GND DS9263-00 November 2001 www.richtek-ic.com.tw 3 RT9263 Preliminary Pin Description Pin No. RT9263CCX5 RT9263ECX5 Pin Name Pin Function Output pin for driving external NMOS or NPN -- 1 EXT 1 -- CE 2 2 VDD 3 3 FB 4 4 LX Pin for switching 5 5 GND Ground When driving an NPN, a resistor should be added for limiting base Chip enable RT9263CCX5 gets into shutdown mode when CE pin set to low. Input positive power pin of RT9263 Feedback input pin Internal reference voltage for the error amplifier is 1.25V. Absolute Maximum Ratings z Supply Voltage -0.3V to 6V z LX Pin Switch Voltage -0.3V to (VDD + 0.8V) z Other I/O Pin Voltages -0.3V to (VDD + 0.3V) z LX Pin Switch Current 2.5A z EXT Pin Driver Current 30mA z Power Dissipation, PD @ TA = 25°C SOT89-5 0.5W • Package Thermal Resistance SOT89-5, θJA 300°C/W z Operating Junction Temperature 150°C z Storage Temperature Range -65°C ~ +150°C www.richtek-ic.com.tw 4 DS9263-00 November 2001 RT9263 Preliminary Electrical Characteristics (VIN = 1.5V, VDD set to 3.3V, Load Current = 0, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Units -- 0.98 1.05 V Start-UP Voltage VST IL = 1mA Operating VDD Range VDD Start-up to IDD1 > 250µA 0.8 -- 6 V No Load Current I (VIN) INO LOAD VIN = 1.5V, VOUT = 3.3V -- 47 -- µA Switch-off Current I (VDD) ISWITCH OFF VIN = 6V -- 17 -- µA Shutdown Current I (VIN) IOFF CE Pin = 0V, VIN = 4.5V -- 0.1 1 µA Feedback Reference Voltage VREF Close Loop, VDD = 3.3V 1.225 1.25 1.275 V Switching Rate FS VDD = 3.3V -- 550 -- KHz Maximum Duty DMAX VDD = 3.3V -- 92 -- % VDD = 3.3V -- 0.25 -- Ω VDD = 3.3V -- 2 -- A EXT ON Resistance to VDD VDD = 3.3V -- 40 -- Ω EXT ON Resistance to GND VDD = 3.3V -- 30 -- Ω LX ON Resistance Current Limit Setting ILIMIT Line Regulation ∆VLINE VIN = 1.5 ~ 2.5V, IL = 1mA -- 10 -- mV/V Load Regulation ∆VLOAD VIN = 2.5V, IL = 1 ~ 100mA -- 0.25 -- mV/mA 0.2 0.8 1.4 V CE Pin Trip Level VDD = 3.3V Temperature Stability for FB, LFB, LBI TS Guaranteed by Design -- 50 -- ppm/°C Thermal Shutdown TSD Guaranteed by Design -- 165 -- °C Thermal Shutdown Hysterises ∆TSD Guaranteed by Design -- 10 -- °C DS9263-00 November 2001 www.richtek-ic.com.tw 5 RT9263 Preliminary Typical Operating Charateristics Efficiency Efficiency VOUT = 3.3V ; TA = 25°C VOUT= 5.0V; TA = 25°C No Load Current No Load Current 140 90 TA = 25°C VOUT = 3.3V 80 70 100 IDD ( µ A) 60 IDD ( µ A) TA = 25°C VOUT = 5.0V 120 50 40 30 80 60 40 20 20 10 Refer to Application Circuit Fig.1 0 1 1.2 1.5 2 Refer to Application Circuit Fig.1 0 2.5 3 1 1.2 1.5 Input Voltage (V) Start Up Voltage 3 4 1.25 TA = 25°C 1.3 VOUT = 3.3V TA = 25°C VOUT= 5.0V 1.20 Input Voltage (V) 1.15 Input Voltage (V) 2.5 Start Up Voltage 1.4 1.2 1.1 1.0 1.10 1.05 1.00 0.95 0.90 0.9 Refer to Application Circuit Fig.1 0.85 0.8 0 20 40 60 80 ILOAD (mA) ILOAD (mA) in constant resistance load www.richtek-ic.com.tw 6 2 Input Voltage (V) 100 Refer to Application Circuit Fig.1 0.80 0 25 50 75 ILOAD (mA) ILOAD (mA) in constant resistance load 100 DS9263-00 November 2001 RT9263 Preliminary Application Note Output Voltage Setting Referring to application circuits Fig.1 to Fig.4, the output voltage of the switching regulator (VOUT1) can PRECAUTION 1: Improper probing to FB pin will be set with Eq.1. cause fluctuation at VOUT1. It may damage RT9263 and system chips because VOUT1 may drastically rise R1 VOUT1 = (1 + ) × 1.25 V R2 Eq.1 or parasitics being added to FB pin. Feedback Loop Design Referring to application circuits Fig.1 to Fig.4, The selection of R1 and R2 based on the trade-off between quiescent current to an over-rated level due to unexpected interference consumption and PRECAUTION 2: Disconnecting R1 or short circuit across R2 may also cause similar IC damage as described in precaution 1. interference immunity is stated below: PRECAUTION 3: When large R values were used in • Follow Eq.1 feedback loops, any leakage in FB node may also • Higher R reduces the quiescent current (Path cause VOUT1 voltage fluctuation, and IC damage. To current = 1.25V/R2), however resistors beyond be especially highlight here is when the air moisture 5MΩ are not recommended. frozen and re-melt on the circuit board may cause • Lower R gives better noise immunity, and is less several µA leakage between IC or component pins. sensitive to interference, layout parasitics, FB So, when large R values are used in feedback loops, node leakage, and improper probing to FB pins. post coating, or some other moisture-preventing • A proper value of feed forward capacitor parallel processes are recommended. with R1 on Fig.1 to Fig.4 can improve the noise VOUT1 immunity of the feedback loops, especially in an improper layout. An empirical suggestion is around 100pF ~ 1nF for feedback resistors of MΩ, and 10nF ~ 0.1µF for feedback resistors of tens to hundreds KΩ. Prober Parasitics R1 _ Q + R2 FB Pin For applications without standby or suspend modes, lower values of R1, and R2 are preferred. For applications concerning the current consumption in standby or suspend modes, the higher values of R1, and R2 are needed. Such “high impedance feedback loops” are sensitive to any interference, which require careful layout and avoid any interference, e.g. probing to FB pins. Layout Guide • A full GND plane without gap break. • VOUT1 to GND noise bypass – Short and wide connection for C2 to Pin2 and Pin5. • VIN to GND noise bypass – Add a 100µF capacitor close to L1 inductor, when VIN is not an idea voltage source. • Minimized FB node copper area and keep far away from noise sources. • Minimized parasitic capacitance connecting to LX and EXT nodes, which may cause additional switching loss. DS9263-00 November 2001 www.richtek-ic.com.tw 7 RT9263 Preliminary Package Information D A D1 H B C C1 e e A b Symbol b1 b Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 1.400 1.600 0.055 0.063 b 0.360 0.520 0.014 0.020 B 2.400 2.600 0.094 0.102 b1 0.406 0.533 0.016 0.021 C -- 4.250 -- 0.167 C1 0.800 -- 0.031 -- D 4.400 4.600 0.173 0.181 D1 -- 1.700 -- 0.067 e 1.400 1.600 0.055 0.063 H 0.380 0.430 0.014 0.017 5-Lead SOT-89 Surface Mount www.richtek-ic.com.tw 8 DS9263-00 November 2001 Preliminary DS9263-00 November 2001 RT9263 www.richtek-ic.com.tw 9 RT9263 Preliminary RICHTEK TECHNOLOGY CORP. RICHTEK TECHNOLOGY CORP. Headquarter Taipei Office (Marketing) 6F, No. 35, Hsintai Road, Chupei City 8F-1, No. 137, Lane 235, Paochiao Road, Hsintien City Hsinchu, Taiwan, R.O.C. Taipei County, Taiwan, R.O.C. Tel: (8863)5510047 Fax: (8863)5537749 Tel: (8862)89191466 Fax: (8862)89191465 Email: [email protected] www.richtek-ic.com.tw 10 DS9263-00 November 2001