PS231S Version Issue Date File Name Total Pages : A.002 : 2009/06/30 : SP-PS231S-A.002.doc : 11 5-Channel Secondary Monitoring IC 新竹市科學園區展業一路 9 號 7 樓之 1 SILICON TOUCH TECHNOLOGY INC. 9-7F-1, Prosperity Road I, Science Based Industrial Park, Hsin-Chu, Taiwan 300, R.O.C. Tel:886-3-5645656 Fax:886-3-5645626 PS231S PS231S 5-Channel Secondary Monitoring IC General Description PS231S is specially designed for switching power supply system. Four important functions of PS231S are the followings: over-voltage protection, over-current protection, under-voltage protection and power good signal generating. OVP/UVP (Over-Voltage/Under-Voltage Protection) monitors 3.3V, 5V and triple 12V to protect our power supply and PC, FPO/ goes to high when one of these supply voltages exceeds their normal operation voltage range. OCP (Over Current Protection) monitors IS33, IS5, IS12A, IS12B, IS12C input current sense. An adjustable over-current condition composed of Iref and “protection current range resistor” helps users design OCP easily. An additional protection input pin provides the flexibility for design protection circuit. Power good signal generating notifies personal computer when power supply is ready or power supply is going to shutdown, therefore it can provide a reliable power supply environment. Features • • • • • • • • • • Over/Under-voltage protection and lock out Over-current protection and lock out Additional protection input Fault protection output with open drain output stage Open drain power good output signal for power good input Built-in 300mS power good delay AC on 75ms delay for UV/OC protection 38mS PSON/ control de-bounce Wide power supply range (3.8V~16V) Special care for AC power off 5-Channel Secondary Monitoring IC Version:A.002 未經授權而逕予重製、複製、使用或公開本文件,行為人得被追究侵權之相關民刑事責任 Unauthorized reproduction, duplication, use or disclosure of this document will be deemed as infringement. Page 1 PS231S Block Diagram FPO/ delay VS S Q 155KΩ 73uS VS12A VS12B VS12C R 1MΩ UV Vref 9KΩ delay 38mS De-bounce OV Vref H : 4mS L : 4.5uS 16KΩ VCC 30KΩ VCCI 2KΩ PSON/ 1.25V 12 OV 4.5V 90KΩ 12 UV Pext VS5 2.6V 58KΩ 5 UV 13.5KΩ Vref delay 1 0 5 OV H : 75mS L : 4.5uS 18.5KΩ Vref 1.13V PGI 0.63V R Q S VS33 38.5KΩ 1.25V 3.3 UV 23.5KΩ Vref VCCI 3.3 OV 28KΩ Vref 1MΩ PGO delay 73uS De-bounce H : 300mS L : 4.5uS VCCI VS IS IS12A IS12B Step Down to near 2.5V OC delay Iref X 8 1mS IS12C 12 OC delay VCCI IS5 Step Down to near 2.5V 5 OC H : 20mS L : 4.5uS Power On Reset POR Internal Power Constant Current Source Iref VCCI = 4V VCC Iref X 8 VCCI IS33 Step Down to near 2.5V 3.3 OC Band-Gap Reference RI Vref 1.25V Clock Generator CLK VCC GND Iref X 8 5-Channel Secondary Monitoring IC Version:A.002 未經授權而逕予重製、複製、使用或公開本文件,行為人得被追究侵權之相關民刑事責任 Unauthorized reproduction, duplication, use or disclosure of this document will be deemed as infringement. Page 2 PS231S Timing Chart Vcc PSON/ FPO/ PGI VS12A VS12B VS12C VS5 VS33 Pext IS12A IS12B IS12C IS5 IS33 PGO Td1 Tb1 Td3 Td2 AC turn on VPGI UVP/OVP/OCP Pext protect PSON/ turn on PSON/ turn off PSON/ turn on AC turn off 1.25V 1.13V 0.63V Td1 Td2 OVP 5-Channel Secondary Monitoring IC OVP/UVP/OCP/Pext OVP Version:A.002 未經授權而逕予重製、複製、使用或公開本文件,行為人得被追究侵權之相關民刑事責任 Unauthorized reproduction, duplication, use or disclosure of this document will be deemed as infringement. Page 3 PS231S Pin Descriptions Pin No 1 PIN NAME PGI Descriptions Power good input signal pin 2 GND Ground 3 FPO/ Inverted fault protection output ,open drain output stage 4 PSON/ Remote ON/OFF control input pin 5 IS12A 12V(1) over current protection input pin 6 RI Current sense setting 7 IS12B 12V(2) over current protection input pin 8 VS12B 12V(2) over/under voltage protection input pin 9 VS12C 12V(3) over/under voltage protection input pin 10 IS12C 12V(3) over current protection input pin 11 Pext External protection detect input pin 12 IS5 5.0V over current protection input pin 13 IS33 3.3V over current protection input pin 14 VS12A 12V(1) over/under voltage protection input pin 15 VS33 3.3V over/under voltage protection input pin 16 VS5 5.0V over/under voltage protection input pin 17 VCC Power supply 18 PGO Power good output signal pin , open drain output stage Absolute Maximum Ratings Parameter Rating Unit Storage Temperature (Tstg) -40 to +125 °C Operating Temperature (Topr) -30 to +90 °C Supply Voltage (VCC) VCC -0.5 to +16.0 V VS12(A,B,C), IS12(A,B,C) -0.5 to +16.0 V VS5, IS5 -0.5 to +9.0 V VS33, IS33 -0.5 to +7.0 V PGI -0.5 to +16.0 V PSON/, Pext -0.5 to Vcc+0.5 V FPO/ -0.5 to +16.0 V PGO -0.5 to Vcc+0.5 V RI 12.5 to 62.5 uA Input Voltage Range (VI) Output Voltage Range (VO) Output Current for RI (IRI) 5-Channel Secondary Monitoring IC Version:A.002 未經授權而逕予重製、複製、使用或公開本文件,行為人得被追究侵權之相關民刑事責任 Unauthorized reproduction, duplication, use or disclosure of this document will be deemed as infringement. Page 4 PS231S Electrical Characteristics, Vcc=12V, Ta = 25℃. (unless otherwise specified) Power Supply Section Parameter Conditions Supply Voltage MIN 3.8 Supply Current Power On Reset Hysteresis (VHYST) MAX Unit 5.0 16.0 V 4.5 5.0 mA 3.2 3.4 3.6 V -0.15 -0.3 -0.45 V VPSON/ = 5V Power On Reset Threshold Voltage (VPOR) TYP Over-Voltage Section Parameter Conditions MIN TYP MAX Unit VS33 3.7 3.9 4.1 V VS5 5.7 6.1 6.5 V VS12A/B/C 13.1 13.8 14.5 V Over-Voltage Threshold Under-Voltage Section Parameter Conditions MIN TYP MAX Unit VS33 2.0 2.2 2.4 V VS5 3.3 3.5 3.7 V VS12A/B/C 8.5 9.0 9.5 V Under-Voltage Threshold PGI, Analog Input Parameter Conditions MIN TYP MAX Unit Threshold Voltage for start Td1 1.16 1.25 1.33 V Threshold Voltage for start Td2 0.60 0.63 0.75 V Threshold Voltage for mask OC,UV 1.05 1.13 1.21 V Hysteresis (VHYST)* -20 -50 -80 mV * All of the comparator for PGI input in block diagram. 5-Channel Secondary Monitoring IC Version:A.002 未經授權而逕予重製、複製、使用或公開本文件,行為人得被追究侵權之相關民刑事責任 Unauthorized reproduction, duplication, use or disclosure of this document will be deemed as infringement. Page 5 PS231S Electrical Characteristics (Continued) PGO, Open Drain Digital Output Parameter Conditions Leakage Current (ILKG) VPGO=5V Low Level Output Voltage (VOL) ISINK=10mA MIN TYP MAX Unit 5 uA 0.3 V FPO/, Open Drain Digital Output Parameter Conditions Leakage Current (ILKG) VFPO/=5V Low Level Output Voltage (VOL) ISINK=20mA MIN TYP MAX Unit 5 uA 0.4 V PSON/, Analog Input Parameter Conditions MIN TYP MAX Threshold Voltage 1.16 1.25 1.33 Hysteresis (VHYST) 20 50 80 Unit V mV External Protection Detect Section Parameter Conditions MIN TYP MAX Unit Threshold(VTH) 2.5 2.6 2.7 V Hysteresis (VHYST) 20 50 80 mV Switching Characteristics, Vcc=12V, Ta = 25℃. Parameter Conditions MIN TYP MAX Unit PGI to PGO Delay Time (Td1) 200 300 480 mS Short Circuit Delay Time (Td2) 49 75 114 mS PGO to FPO/ Delay Time (Td3) 2 4 6 mS Under Voltage Delay Time (Td4) 0.6 1 1.4 mS Over Current Delay Time (Td5) 13 20 27 mS Over Voltage Delay Time (Td6) 47 73 110 uS Pext Delay Time (Td7) 24 38 52 mS PSON/ De-bounce Time (Tb1) 24 38 52 mS PGO Noise De-glitch Time (Tb2) 47 73 110 uS 5-Channel Secondary Monitoring IC Version:A.002 未經授權而逕予重製、複製、使用或公開本文件,行為人得被追究侵權之相關民刑事責任 Unauthorized reproduction, duplication, use or disclosure of this document will be deemed as infringement. Page 6 PS231S Application Typical 5 rails SPS S.P.S. Secondary Side RS5 +5V Output RS33 +3.3V Coil +3.3V Output RS12(1) +12V(1) Coil +12V(1) Output RS12(2) +12V(2) Coil +12V(2) Output RS12(3) +12V(3) Coil +12V(3) Output ROC12(3) ROC5 ROC33 or ROC12(1) ROC12(2) = RPGO 4.7K +5VSB 1 PGI PGO 18 2 GND Vcc 17 3 FPO/ VS5 16 PGO +5VSB 1K 4 PSON/ PSON 5 IS12A VS12A 14 IS33 13 RI RPGI CPGI 7 IS12B IS5 12 8 VS12B Pext 11 9 VS12C IS12C 10 Cby 6 RI VS33 15 Pext PS231S Notes: 1. Zener diode or resistor or both of them can be used in component X. 2. The bypass capacitor Cby suggests to be 0.1uF~ 10uF and layout nearby pin VCC. 3. The recommend sense values of RS12(1), RS12(2), RS5 and RS33 are ≥ 0.002Ω. 4. Over-Current Protection design example: V 1.25 (1) I ref = 20 μA , RI = RI = = 62.5 K (Ω ) I RI 20μ (2) RS5=0.002 Ω , ΔV5V = 0.002 × I +5V = ROC 5 × 8 × I ref (3) If +5V OCP trip point is 20A, ROC 5 = 5-Channel Secondary Monitoring IC 0.002 × 20 = 250(Ω ) 8 × 20 μ Version:A.002 未經授權而逕予重製、複製、使用或公開本文件,行為人得被追究侵權之相關民刑事責任 Unauthorized reproduction, duplication, use or disclosure of this document will be deemed as infringement. Page 7 PS231S Package Specification ( 18-pin DIP ) E1 E EB θ° D A2 A Seating Plane A1 b b1 e 0 5 10 0.0 Symbol Dimension in mm Min Normal Max 0.381 A2 3.175 Normal 3.302 3.429 0.457 22.352 22.860 23.368 E 7.620 6.223 mm 1.0 inch NOTE Max 0.210 0.125 6.350 0.130 0.135 0.060 D 0.018 0.880 0.900 0.920 0.300 6.477 0.245 2.540 e 25 0.015 b1 E1 20 Dimension in inch Min 1.524 b 15 0.5 5.334 A A1 L 0.250 0.255 0.100 EB 8.509 9.017 9.525 0.335 0.355 0.375 L 2.921 3.302 3.810 0.115 0.130 0.150 θ° 0 7 15 0 7 15 5-Channel Secondary Monitoring IC Version:A.002 未經授權而逕予重製、複製、使用或公開本文件,行為人得被追究侵權之相關民刑事責任 Unauthorized reproduction, duplication, use or disclosure of this document will be deemed as infringement. Page 8 PS231S Package Specification ( 18-pin SOP ) E H 0.020 x 45° D A A1 b L 0 5 0.0 Symbol Dimension in mm Min Normal Dimension in inch Max Min A 2.362 2.642 0.093 0.102 0.305 0.004 0.406 Normal mm 0.4 inch NOTE Max 0.104 0.012 0.016 D 11.354 11.760 0.447 E 7.391 7.595 0.291 1.270 e 10 0.2 A1 b θ° e 0.463 0.299 0.050 H 10.008 10.643 0.394 0.419 L 0.406 1.270 0.016 0.050 θ° 0 8 0 8 5-Channel Secondary Monitoring IC Version:A.002 未經授權而逕予重製、複製、使用或公開本文件,行為人得被追究侵權之相關民刑事責任 Unauthorized reproduction, duplication, use or disclosure of this document will be deemed as infringement. Page 9 PS231S The products listed herein are designed for ordinary electronic applications, such as electrical appliances, audio-visual equipment, communications devices and so on. Hence, it is advisable that the devices should not be used in medical instruments, surgical implants, aerospace machinery, nuclear power control systems, disaster/crime-prevention equipment and the like. Misusing those products may directly or indirectly endanger human life, or cause injury and property loss. Silicon Touch Technology, Inc. will not take any responsibilities regarding the misusage of the products mentioned above. Anyone who purchases any products described herein with the above-mentioned intention or with such misused applications should accept full responsibility and indemnify. Silicon Touch Technology, Inc. and its distributors and all their officers and employees shall defend jointly and severally against any and all claims and litigation and all damages, cost and expenses associated with such intention and manipulation. Silicon Touch Technology, Inc. reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. 5-Channel Secondary Monitoring IC Version:A.002 未經授權而逕予重製、複製、使用或公開本文件,行為人得被追究侵權之相關民刑事責任 Unauthorized reproduction, duplication, use or disclosure of this document will be deemed as infringement. Page 10