SSM03N70GH/GJ N-CHANNEL ENHANCEMENT MODE POWER MOSFET PRODUCT SUMMARY D Repetitive Avalanche Rated Fast Switching Speed Simple Drive Requirement G BVDSS 600V RDS(ON) 3.6Ω ID 3.3A S DESCRIPTION G D The TO-252 package is universally preferred for all commercialIndustrial surface mount applications and suited for AC/DC converters. The through-hole version (SSM03N70GH/GJ) is available for low-profile applications. G RoHS-compliant TO-252(H) S D S TO-251(J) ABSOLUTE MAXIMUM RATINGS Parameter Symbol Units VDS Drain-Source Voltage V VGS Gate-Source Voltage ID@TC=25℃ Continuous Drain Current, V GS @ 10V A ID@TC=100℃ Continuous Drain Current, V GS @ 10V A ±30 1 IDM Pulsed Drain Current PD@TC=25℃ Total Power Dissipation Linear Derating Factor 2 V 13.2 A 45 W 0.36 W/℃ 85 mJ EAS Single Pulse Avalanche Energy IAR Avalanche Current 3.3 A EAR Repetitive Avalanche Energy 3.3 mJ TSTG Storage Temperature Range -55 to 150 ℃ TJ Operating Junction Temperature Range -55 to 150 ℃ THERMAL DATA Symbol Parameter Value Units Rthj-c Thermal Resistance Junction-case Max. 2.8 ℃/W Rthj-a Thermal Resistance Junction-ambient Max. 110 ℃/W 09/06/2007 Rev.1.00 www.SiliconStandard.com 1 SSM03N70GH/GJ ELECTRICAL CHARACTERISTICS @ TJ=25oC ( unless otherwise specified ) Symbol Parameter Test Conditions Typ. Max. Units 600 - - V BVDSS Drain-Source Breakdown Voltage ∆BVDSS/∆Tj Breakdown Voltage Temperature Coefficient Reference to 25℃, ID=1mA - 0.6 - V/℃ RDS(ON) Static Drain-Source On-Resistance VGS=10V, ID=1.6A - - 3.6 Ω VGS(th) Gate Threshold Voltage VDS=VGS, ID=250uA 2 - 4 V gfs Forward Transconductance VDS=10V, ID=1.6A - 2 - S VDS=600V, VGS=0V - - 10 uA Drain-Source Leakage Current (Tj=150 C) VDS=480V, VGS=0V - - 100 uA Gate-Source Leakage VGS=±30V - - ±100 nA ID=3.3A - 11.4 - nC o IDSS Drain-Source Leakage Current (Tj=25 C) o IGSS 3 VGS=0V, ID=250uA Min. Qg Total Gate Charge Qgs Gate-Source Charge VDS=480V - 3.1 - nC Qgd Gate-Drain ("Miller") Charge VGS=10V - 4.2 - nC 3 td(on) Turn-on Delay Time VDD=300V - 8.4 - ns tr Rise Time ID=3.3A - 6 - ns td(off) Turn-off Delay Time RG=10Ω,VGS=10V - 17.7 - ns tf Fall Time RD=91Ω - 5.9 - ns Ciss Input Capacitance VGS=0V - 600 - pF Coss Output Capacitance VDS=25V - 45 - pF Crss Reverse Transfer Capacitance f=1.0MHz - 4 - pF Min. Typ. IS=3A, VGS=0V - - 1.5 V SOURCE-DRAIN DIODE Symbol VSD Parameter Forward On Voltage 3 2 Test Conditions Max. Units trr Reverse Recovery Time IS=3A, VGS=0V, - 422 - ns Qrr Reverse Recovery Charge dI/dt=100A/µs - 2580 - nC Notes: 1.Pulse width limited by safe operating area. o 2.Starting Tj=25 C , VDD=50V , L=15mH , RG=25Ω , IAS=3A. 3.Pulse width <300us , duty cycle <2%. 09/06/2007 Rev.1.00 www.SiliconStandard.com 2 SSM03N70GH/GJ 4 10V 6.0V o T C =25 C o T C =150 C 2 10V 5.0V ID , Drain Current (A) ID , Drain Current (A) 3 2 5.0V 1 2 4.5V 1 4.0V 1 4.5V V G =4.0V V G =3.5V 0 0 0 5 10 15 20 25 0 5 Fig 1. Typical Output Characteristics 15 20 25 Fig 2. Typical Output Characteristics 1.2 2.5 I D =1.6A V G =10V 2.1 1.1 Normalized RDS(ON) Normalized BVDSS (V) 10 V DS , Drain-to-Source Voltage (V) V DS , Drain-to-Source Voltage (V) 1.0 1.7 1.3 0.9 0.9 0.5 0.1 0.8 -50 0 50 100 -50 150 0 50 100 150 T j , Junction Temperature ( o C) T j , Junction Temperature ( o C) Fig 3. Normalized BVDSS v.s. Junction Fig 4. Normalized On-Resistance Temperature v.s. Junction Temperature 100 5 4 1 T j = 150 o C VGS(th) (V) IS (A) 10 T j = 25 o C 3 2 0.1 1 0.01 0 0.1 0.3 0.5 0.7 0.9 1.1 1.3 -50 Fig 5. Forward Characteristic of Reverse Diode 09/06/2007 Rev.1.00 0 50 100 150 T j , Junction Temperature ( o C) V SD , Source-to-Drain Voltage (V) Fig 6. Gate Threshold Voltage v.s. Junction Temperature www.SiliconStandard.com 3 SSM03N70GH/GJ f=1.0MHz 16 10000 I D =3.3A V DS =480V 12 C iss 10 C (pF) VGS , Gate to Source Voltage (V) 14 8 100 C oss 6 4 C rss 2 1 0 1 0 4 8 12 5 9 17 21 25 29 V DS , Drain-to-Source Voltage (V) Q G , Total Gate Charge (nC) Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics 1 Normalized Thermal Response (Rthjc) 100 10 10us ID (A) 13 16 100us 1 1ms 10ms 0.1 T c =25 o C Single Plude 100ms 0.01 DUTY=0.5 0.2 0.1 0.05 0.1 0.02 PDM 0.01 t Single Pulse T Duty factor = t/T Peak Tj = PDM x Rthjc + T C 0.01 1 10 100 1000 10000 0.00001 0.0001 0.001 V DS , Drain-to-Source Voltage (V) 0.01 0.1 1 10 t , Pulse Width (s) Fig9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance VG VDS 90% QG 10V QGS QGD 10% VGS td(on) tr td(off) tf Charge Fig 11. Switching Time Waveform 09/06/2007 Rev.1.00 Q Fig 12. Gate Charge Waveform www.SiliconStandard.com 4 SSM03N70GH/GJ Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, expressed or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 09/06/2007 Rev.1.00 www.SiliconStandard.com 5