SSM60T03GP,S N-channel Enhancement-mode Power MOSFET Low gate-charge D Simple drive requirement Fast switching G Pb-free, RoHS compliant. BV DSS 30V R DS(ON) 12mΩ ID 45A S DESCRIPTION The SSM60T03GS is in a TO-263 package, which is widely used for commercial and industrial surface-mount applications. This device is suitable for low-voltage applications such as DC/DC converters. The through-hole version, the SSM60T03GP in TO-220, is available for vertical-mounting, where a small footprint is required on the board, and/or an external heatsink is to be attached. These devices are manufactured with an advanced process, permitting operation up to a maximum junction temperature of 175°C. ABSOLUTE MAXIMUM RATINGS Symbol Parameter G G D D S TO-263 (S) TO-220(P) S Rating Units VDS Drain-Source Voltage 30 V VGS Gate-Source Voltage ±20 V ID @ TC=25°C Continuous Drain Current 45 A ID @ TC=100°C Continuous Drain Current 32 A 120 A 44 W 1 IDM Pulsed Drain Current PD @ TC=25°C Total Power Dissipation Linear Derating Factor 0.352 W/°C TSTG Storage Temperature Range -55 to 175 °C TJ Operating Junction Temperature Range -55 to 175 °C THERMAL DATA Symbol RΘJC RΘJA 9/16/2005 Rev.3.1 Parameter Maximum Thermal Resistance Junction-case Maximum Thermal Resistance Junction-ambient www.SiliconStandard.com Value Units 3.4 °C/W 62 °C/W 1 of 5 SSM60T03GP,S ELECTRICAL CHARACTERISTICS (at Tj=25°C, unless otherwise specified) Symbol Parameter Test Conditions Typ. Max. Units 30 - - V BVDSS Drain-Source Breakdown Voltage ∆ BV DSS/∆ Tj Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=1mA - 0.03 - V/°C RDS(ON) Static Drain-Source On-Resistance2 VGS=10V, ID=20A - - 12 mΩ VGS=4.5V, ID=15A - - 25 mΩ VDS=VGS, ID=250uA 1 - 3 V VDS=10V, ID=10A - 25 - S VDS=30V, VGS=0V - - 1 uA Drain-Source Leakage Current (T j=175 C) VDS=24V ,VGS=0V - - 250 uA Gate-Source Leakage VGS= ±20V - - ±100 nA ID=20A - 11.6 19 nC VGS(th) Gate Threshold Voltage Forward Transconductance gfs 2 o IDSS Drain-Source Leakage Current (T j=25 C) o IGSS 2 VGS=0V, ID=250uA Min. Qg Total Gate Charge Qgs Gate-Source Charge VDS=24V - 3.9 - nC Qgd Gate-Drain ("Miller") Charge VGS=4.5V - 7 - nC VDS=15V - 8.8 - ns 2 td(on) Turn-on Delay Time tr Rise Time ID=20A - 57.5 - ns td(off) Turn-off Delay Time RG=3.3Ω , VGS=10V - 18.5 - ns tf Fall Time RD=0.75Ω - 6.4 - ns Ciss Input Capacitance VGS=0V - 1135 1816 pF Coss Output Capacitance VDS=25V - 200 - pF Crss Reverse Transfer Capacitance f=1.0MHz - 135 - pF Min. Typ. IS=45A, VGS=0V - - 1.3 V IS=20A, VGS=0V, - 23.3 - ns dI/dt=100A/µs - 16 - nC Source-Drain Diode Symbol VSD Parameter 2 Forward On Voltage 2 trr Reverse Recovery Time Qrr Reverse Recovery Charge Test Conditions Max. Units Notes: 1.Pulse width limited by safe operating area. 2.Pulse width <300us, duty cycle <2%. 9/16/2005 Rev.3.1 www.SiliconStandard.com 2 of 5 SSM60T03GP,S 90 125 6.0V 75 5.0V 50 25 6.0V 60 5.0V 30 V G =4.0V V G =4.0V 0 0 0 1 2 3 0 4 V DS , Drain-to-Source Voltage (V) 2 3 4 5 Fig 2. Typical Output Characteristics 2 80 I D =20A V G =10V I D =15A T C =25 ° C 1.6 Normalized R DS(ON) 60 RDS(ON) (m Ω ) 1 V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics 40 1.2 0.8 20 0.4 0 2 4 6 8 -50 10 25 V GS , Gate-to-Source Voltage (V) 100 175 T j , Junction Temperature ( o C) Fig 3. On-Resistance vs. Gate Voltage Fig 4. Normalized On-Resistance vs. Junction Temperature 3 100 10 2 o o VGS(th) (V) T j =25 C IS(A) T j =175 C 1 1 0.1 0 0 0.5 1 1.5 V SD , Source-to-Drain Voltage (V) Fig 5. Forward Characteristic of Reverse Diode 9/16/2005 Rev.3.1 10V 8.0V o T C =175 C ID , Drain Current (A) T C =25 o C 100 ID , Drain Current (A) 10V 8.0V -50 25 100 175 o T j , Junction Temperature ( C ) Fig 6. Gate Threshold Voltage vs. Junction Temperature www.SiliconStandard.com 3 of 5 SSM60T03GP,S f=1.0MHz 10000 12 V DS =16V V DS =20V V DS =24V 9 C (pF) VGS , Gate to Source Voltage (V) I D =20A C iss 1000 6 3 C oss C rss 0 100 0 6 12 18 24 1 8 Q G , Total Gate Charge (nC) 15 22 29 V DS , Drain-to-Source Voltage (V) Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics 1000 ID (A) 100 100us 10 1ms 10ms 100ms Normalized Thermal Response (Rthjc) 1 Duty factor = 0.5 0.2 0.1 0.1 0.05 PDM 0.02 t T 0.01 Single Pulse Duty Factor = t/T Peak Tj = PDM x Rthjc + T C DC 1 0.01 0.1 1 10 100 0.00001 0.0001 V DS , Drain-to-Source Voltage (V) Fig 9. Maximum Safe Operating Area 0.001 0.01 0.1 1 t , Pulse Width (s) Fig 10. Effective Transient Thermal Impedance VG VDS 90% QG 4.5V QGS QGD 10% VGS td(on) tr td(off) tf Fig 11. Switching Time Waveform 9/16/2005 Rev.3.1 Charge Q Fig 12. Gate Charge Waveform www.SiliconStandard.com 4 of 5 SSM60T03GP,S Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 9/16/2005 Rev.3.1 www.SiliconStandard.com 5 of 5