SSM9972GP,S N-CHANNEL ENHANCEMENT-MODE POWER MOSFET Low gate-charge D Simple drive requirement BV DSS 60V R DS(ON) 18mΩ Fast switching 60A ID G S Description G D The SSM9972GS is in a TO-263 package, which is widely used for commercial and industrial surface mount applications, and is well suited for low voltage applications such as DC/DC converters. The through-hole version, the SSM9972GP in TO-220, is available for low-footprint vertical mounting. These devices are manufactured with an advanced process, providing improved on-resistance and switching performance. G Pb-free lead finish (second-level interconnect) D S TO-263 (S) TO-220(P) S Absolute Maximum Ratings Symbol Parameter VDS Drain-Source Voltage VGS Gate-Source Voltage 3 Rating Units 60 V ±25 V ID @ TC=25°C Continuous Drain Current, VGS @ 10V 60 A ID @ TC=100°C Continuous Drain Current, VGS @ 10V 38 A 230 A 1 IDM Pulsed Drain Current PD @ TC=25°C Total Power Dissipation 89 W Linear Derating Factor 0.7 W/°C TSTG Storage Temperature Range -55 to 150 °C TJ Operating Junction Temperature Range -55 to 150 °C Thermal Data Symbol Parameter Value Units Rthj-c Thermal Resistance Junction-case Max. 1.4 °C/W Rthj-a Thermal Resistance Junction-ambient Max. 62 °C/W 2/16/2005 Rev.1.1 www.SiliconStandard.com 1 of 5 SSM9972GP,S Electrical Characteristics @ T j=25oC (unless otherwise specified) Symbol Parameter Test Conditions Min. Typ. 60 - - V - 0.06 - V/°C VGS=10V, ID=35A - - 18 mΩ VGS=4.5V, ID=25A - - 22 mΩ VDS=VGS, ID=250uA 1 - 3 V VDS=10V, ID=35A - 55 - S Drain-Source Leakage Current (Tj=25 C) VDS=60V, VGS=0V - - 10 uA Drain-Source Leakage Current (Tj=150oC) VDS=48V ,VGS=0V - - 25 uA Gate-Source Leakage VGS=±25V - - ±100 nA ID=35A - 32 51 nC BVDSS Drain-Source Breakdown Voltage ∆ BV DSS/ ∆ Tj Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=1mA RDS(ON) Static Drain-Source On-Resistance VGS(th) Gate Threshold Voltage gfs Forward Transconductance o IDSS IGSS 2 VGS=0V, ID=250uA 2 Max. Units Qg Total Gate Charge Qgs Gate-Source Charge VDS=48V - 8 - nC Qgd Gate-Drain ("Miller") Charge VGS=4.5V - 20 - nC VDS=30V - 11 - ns 2 td(on) Turn-on Delay Time tr Rise Time ID=35A - 58 - ns td(off) Turn-off Delay Time RG=3.3Ω,VGS=10V - 45 - ns tf Fall Time RD=0.86Ω - 80 - ns Ciss Input Capacitance VGS=0V - 3170 5070 pF Coss Output Capacitance VDS=25V - 280 - pF Crss Reverse Transfer Capacitance f=1.0MHz - 230 - pF Rg Gate Resistance f=1.0MHz - 1.7 - Ω Min. Typ. Source-Drain Diode Symbol Parameter 2 Test Conditions Max. Units VSD Forward On Voltage IS=35A, VGS=0V - - 1.2 V trr Reverse Recovery Time IS=35A, VGS=0V, - 50 - ns Qrr Reverse Recovery Charge dI/dt=100A/µs - 48 - nC Notes: 1.Pulse width limited by max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 2/16/2005 Rev.1.1 www.SiliconStandard.com 2 of 5 SSM9972GP,S 200 150 10V 7.0V 150 ID , Drain Current (A) ID , Drain Current (A) 10V 7.0V 5.0V 100 4.5V 5.0V 100 4.5V 50 50 V G =3.0V o T C = 150 C V G =3.0V o T C =25 C 0 0 0 2 4 6 8 10 12 0 14 2 4 6 8 10 12 14 V DS , Drain-to-Source Voltage (V) V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 1.6 20 I D = 25 A T C =25 o C I D =35A V G =10V Normalized RDS(ON) 1.4 RDS(ON) (mΩ ) 18 16 1.2 1.0 0.8 14 0.6 2 4 6 8 10 -50 V GS , Gate-to-Source Voltage (V) 0 50 100 150 T j , Junction Temperature ( o C) Fig 3. On-Resistance v.s. Gate Voltage Fig 4. Normalized On-Resistance vs. Junction Temperature 20 1.7 IS(A) T j =150 o C Normalized VGS(th) (V) 15 T j =25 o C 10 1.2 0.7 5 0.2 0 0 0.2 0.4 0.6 0.8 1 1.2 -50 0 Fig 5. Forward Characteristic offf Reverse Diode 2/16/2005 Rev.1.1 50 100 150 T j , Junction Temperature ( o C) V SD , Source-to-Drain Voltage (V) Fig 6. Gate Threshold Voltage vs. Junction Temperature www.SiliconStandard.com 3 of 5 SSM9972GP,S f=1.0MHz 12 10000 VGS , Gate to Source Voltage (V) I D = 35 A 10 C iss V DS =48V V DS =38V V DS =30V C (pF) 8 6 1000 4 C oss C rss 2 0 100 0 20 40 1 60 5 Q G , Total Gate Charge (nC) 9 13 17 21 25 29 V DS , Drain-to-Source Voltage (V) Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics 1 Normalized Thermal Response (R thjc) 1000 100 ID (A) 100us 1ms 10ms 10 o T C =25 C Single Pulse 100ms DC 1 Duty factor=0.5 0.2 0.1 0.1 0.05 PDM t 0.02 T 0.01 Duty factor = t/T Peak Tj = PDM x Rthjc + TC Single Pulse 0.01 0.1 1 10 100 1000 0.00001 0.0001 0.001 0.01 0.1 1 10 t , Pulse Width (s) V DS , Drain-to-Source Voltage (V) Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance 100 VG V DS =5V ID , Drain Current (A) 80 T j =25 o C QG T j =150 o C 4.5V 60 QGS QGD 40 20 Charge Q 0 0 2 4 6 8 V GS , Gate-to-Source Voltage (V) Fig 11. Transfer Characteristics 2/16/2005 Rev.1.1 Fig 12. Gate Charge Waveform www.SiliconStandard.com 4 of 5 SSM9972GP,S Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 2/16/2005 Rev.1.1 www.SiliconStandard.com 5 of 5