SSM2030GM N- and P-channel Enhancement-mode Power MOSFETs Simple drive requirement Lower gate charge Fast switching characteristics N-CH BV DSS D2 D2 D1 D2 D1 D1 D1 Pb-free; RoHS compliant. SO-8 G2 G2 S2 G1 S2 S1 G1 S1 20V R DS(ON) 30mΩ ID 6A P-CH BVDSS DESCRIPTION -20V RDS(ON) 50mΩ ID -5A Advanced Power MOSFETs from Silicon Standard provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. D2 D1 G2 G1 The SSM2030GM is in an SO-8 package, which is widely preferred for commercial and industrial surface mount applications. This device is suitable for low voltage applications requiring complementary N and P MOSFETs. S1 S2 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Rating N-channel VDS Drain-Source Voltage VGS Gate-Source Voltage I D @ TA=25°C ID @ TA=70°C Units P-channel 20 -20 V ±8 ±8 V 3 +6 -5 A 3 +4.8 -4 A +20 -20 A Continuous Drain Current Continuous Drain Current 1,2 IDM Pulsed Drain Current PD @ TA=25°C Total Power Dissipation 2.0 W Linear Derating Factor 0.016 W/°C TSTG Storage Temperature Range -55 to 150 °C TJ Operating Junction Temperature Range -55 to 150 °C THERMAL DATA Symbol Rthj-amb 2/10/2005 Rev.2.01 Parameter Thermal Resistance Junction-ambient www.SiliconStandard.com Max. Value Unit 62.5 °C/W 1 of 11 SSM2030GM N-channel ELECTRICAL CHARACTERISTICS @ Tj = 25o C Symbol Parameter Test Conditions (unless otherwise specified) Min. Typ. Max. Units 20 - - V BVDSS Drain-Source Breakdown Voltage ∆ BV DSS/ ∆Tj Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=1mA - 0.037 - V/°C RDS(ON) Static Drain-Source On-Resistance VGS=4.5V, ID=6A - - 30 mΩ VGS=2.5V, ID=5.2A - - 45 mΩ VDS=VGS, ID=250uA 0.5 - 1.2 V VGS(th) Gate Threshold Voltage gfs Forward Transconductance IDSS VGS=0V, ID=250uA VDS=10V, ID=6A - 18.5 - S o VDS=20V, VGS=0V - - 1 uA o Drain-Source Leakage Current (Tj=70 C) VDS=16V, VGS=0V - - 25 uA Gate-Source Leakage VGS=±8V - - ±100 nA ID=6A - 9 - nC Drain-Source Leakage Current (Tj=25 C) IGSS 2 Qg Total Gate Charge Qgs Gate-Source Charge VDS=10V - 1.8 - nC Qgd Gate-Drain ("Miller") Charge VGS=4.5V - 4.2 - nC VDS=10V - - 29 ns 2 td(on) Turn-on Delay Time tr Rise Time ID=1A - - 65 ns td(off) Turn-off Delay Time RG=6Ω, VGS=4.5V - - 60 ns tf Fall Time RD=10Ω - - 50 ns Ciss Input Capacitance VGS=0V - 300 - pF Coss Output Capacitance VDS=8V - 255 - pF Crss Reverse Transfer Capacitance f=1.0MHz - 115 - pF Min. Typ. - - 1.7 A - - 20 A - 0.75 1.2 V SOURCE-DRAIN DIODE Symbol IS ISM VSD Parameter Test Conditions VD=VG=0V , VS=1.2V Continuous Source Current ( Body Diode ) Pulsed Source Current ( Body Diode ) 1 2 Forward On Voltage Tj=25°C, IS=1.7A, VGS=0V Max. Units Notes: 1.Pulse width limited by max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on FR4 board, t<10sec. 2/10/2005 Rev.2.01 www.SiliconStandard.com 2 of 11 SSM2030GM o P-channel ELECTRICAL CHARACTERISTICS @ Tj = 25 C Symbol Parameter (unless otherwise specified) Test Conditions Min. Typ. Max. Units -20 - - V BVDSS Drain-Source Breakdown Voltage ∆ BV DSS/∆Tj Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=-1mA - -0.037 - V/°C RDS(ON) Static Drain-Source On-Resistance VGS=-4.5V, ID=-2.2A - - 50 mΩ VGS=-2.5V, ID=-1.8A - - 80 mΩ Gate Threshold Voltage VDS=VGS, ID=-250uA -0.5 - -1 V gfs Forward Transconductance VDS=-10V, ID=-2.2A - 2.5 - S IDSS Drain-Source Leakage Current (Tj=25oC) VDS=-20V, VGS=0V - - -1 uA Drain-Source Leakage Current (Tj=70oC) VDS=-16V, VGS=0V - - -25 uA Gate-Source Leakage VGS= ± 8V - - ±100 nA VGS(th) IGSS VGS=0V, ID=250uA 2 Qg Total Gate Charge ID=-2.2A - 11.5 - nC Qgs Gate-Source Charge VDS=-6V - 3.2 - nC Qgd Gate-Drain ("Miller") Charge VGS=-4.5V - 1.5 - nC VDS=-10V - - 10 ns 2 td(on) Turn-on Delay Time tr Rise Time ID=-2.2A - - 25 ns td(off) Turn-off Delay Time RG=6Ω ,VGS=-4.5V - - 50 ns tf Fall Time RD=4.5Ω - - 30 ns Ciss Input Capacitance VGS=0V - 940 - pF Coss Output Capacitance VDS=-15V - 440 - pF Crss Reverse Transfer Capacitance f=1.0MHz - 130 - pF Min. Typ. - - -1.8 A - - -20 A - -0.75 -1.2 V SOURCE-DRAIN DIODE Symbol IS ISM VSD Parameter Test Conditions VD=VG=0V , VS=-1.2V Continuous Source Current ( Body Diode ) 1 Pulsed Source Current ( Body Diode ) 2 Forward On Voltage Tj=25°C, IS=-1.8A, VGS=0V Max. Units Notes: 1.Pulse width limited by max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on FR4 board, t<10sec. 2/10/2005 Rev.2.01 www.SiliconStandard.com 3 of 11 SSM2030GM N-channel 25 25 o T C =25 C V G =4.5V V G =4.5V 20 V G =3.5V V G =3.0V ID , Drain Current (A) ID , Drain Current (A) 20 T C =150 o C 15 V G =2.5V 10 V G =3.5V V G =3.0V 15 V G =2.5V 10 V G =2.0V V G =2.0V 5 5 0 0 0 1 2 3 4 5 6 0 2 3 4 5 V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 45 6 1.8 Id=6A T c =25°C I D =6A V G =4.5V 1.6 Normalized RDS(ON) 40 35 RDSON (mΩ ) 1 V DS , Drain-to-Source Voltage (V) 30 1.4 1.2 1.0 25 0.8 0.6 20 2 3 4 5 -50 0 Fig 3. On-Resistance vs. Gate Voltage 2/10/2005 Rev.2.01 50 100 150 T j , Junction Temperature ( o C) V GS (V) Fig 4. Normalized On-Resistance vs. Junction Temperature www.SiliconStandard.com 4 of 11 SSM2030GM N-channel 3 8 7 6 ID , Drain Current (A) 2 PD (W) 5 4 3 1 2 1 0 0 25 50 75 100 125 0 150 50 100 150 T c ,Case Temperature ( o C) T c , Case Temperature ( o C) Fig 5. Maximum Drain Current vs. Case Temperature Fig 6. Typical Power Dissipation 1 100 Normalized Thermal Response (Rthja) DUTY=0.5 1ms 10 ID (A) 10ms 100ms 0.2 0.1 0.1 0.05 0.02 0.01 P DM 0.01 1 10us T c =25 o C Single Pulse t T SINGLE PULSE Duty factor = t/T Peak Tj = PDM x Rthja + Ta 0.001 0.1 0.1 1 10 100 0.0001 0.001 Fig 7. Maximum Safe Operating Area 2/10/2005 Rev.2.01 0.01 0.1 1 10 100 1000 t , Pulse Width (s) V DS (V) Fig 8. Effective Transient Thermal Impedance www.SiliconStandard.com 5 of 11 SSM2030GM N-channel 6 I D =6A V DS =10V 5 Ciss 4 C (pF) VGS , Gate to Source Voltage (V) f=1.0MHz 1000 3 Coss 100 Crss 2 1 0 0 2 4 6 8 10 10 12 1 5 9 13 17 21 25 29 V DS (V) Q G , Total Gate Charge (nC) Fig 9. Gate Charge Characteristics Fig 10. Typical Capacitance Characteristics 1.5 100.00 10.00 1 T j =25 o C VGS(th) (V) IS(A) T j =150 o C 1.00 0.5 0.10 0.01 0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5 0 -50 0 Fig 11. Forward Characteristic of Reverse Diode 2/10/2005 Rev.2.01 50 100 150 T j ,Junction Temperature ( o C) V SD (V) Fig 12. Gate Threshold Voltage vs. Junction Temperature www.SiliconStandard.com 6 of 11 SSM2030GM N-channel VDS 90% RD VDS D 0.5x RATED VDS G RG TO THE OSCILLOSCOPE 10% VGS S + VGS 4..5V - td(on) Fig 13. Switching Time Circuit td(off) tr tf Fig 14. Switching Time Waveform VG VDS D 4.5V 0.5 x RATED VDS G S QG TO THE OSCILLOSCOPE QGS QGD VGS + 1~ 3 mA I G I D Charge Fig 15. Gate Charge Circuit 2/10/2005 Rev.2.01 Q Fig 16. Gate Charge Waveform www.SiliconStandard.com 7 of 11 SSM2030GM P-channel 25 25 o T C =25 C T C =150 o C V G =-4.5V V G =-4.0V 20 V G =-4.5V V G =-4.0V 20 15 -ID , Drain Current (A) -ID , Drain Current (A) V G =-3.5V V G =-3.5V V G =-3.0V 10 V G =-2.5V 15 V G =-3.0V 10 V G =-2.5V 5 5 0 0 0 1 2 3 4 5 0 6 1 2 3 4 5 6 -V DS , Drain-to-Source Voltage (V) -V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 1.8 100 Id=-2.2A T c =25°C 90 I D =-2.2A V G = -4.5V 1.6 Normalized RDS(ON) RDSON (mΩ ) 80 70 60 1.4 1.2 1 50 0.8 40 0.6 30 -50 2 3 4 0 100 150 o -V GS (V) T j , Junction Temperature ( C) Fig 3. On-Resistance vs. Gate Voltage 2/10/2005 Rev.2.01 50 5 Fig 4. Normalized On-Resistance vs. Junction Temperature www.SiliconStandard.com 8 of 11 SSM2030GM 6 3 5 2.5 4 2 PD (W) -ID , Drain Current (A) P-channel 3 1.5 2 1 1 0.5 0 0 25 50 75 100 125 0 150 50 100 150 T c ,Case Temperature ( o C) T c , Case Temperature ( o C) Fig 5. Maximum Drain Current vs. Fig 6. Typical Power Dissipation Case Temperature 1 100 Normalized Thermal Response (R thja) DUTY=0.5 1ms 10 -ID (A) 10ms 100ms 1 1s T c =25 o C Single Pulse 0.2 0.1 0.1 0.05 0.02 0.01 PDM t 0.01 T SINGLE PULSE Duty factor = t/T Peak Tj = P DM x Rthja + Ta 0.001 0.1 0.1 1 10 100 0.0001 0.001 Fig 7. Maximum Safe Operating Area 2/10/2005 Rev.2.01 0.01 0.1 1 10 100 1000 t , Pulse Width (s) -V DS (V) Fig 8. Effective Transient Thermal Impedance www.SiliconStandard.com 9 of 11 SSM2030GM P-channel 6 I D =-2.2A V DS =-6V 5 4 1000 Ciss C (pF) -VGS , Gate to Source Voltage (V) f=1.0MHz 10000 3 Coss 2 Crss 100 1 0 10 0 2 4 6 8 10 12 14 1 5 9 13 17 21 25 29 -V DS (V) Q G , Total Gate Charge (nC) Fig 9. Gate Charge Characteristics Fig 10. Typical Capacitance Characteristics 1 100.00 0.8 10.00 0.6 T j =25 o C -VGS(th) (V) -IS(A) T j =150 o C 1.00 0.4 0.10 0.2 0.01 0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5 0 -50 0 -V SD (V) Fig 11. Forward Characteristic of Reverse Diode 2/10/2005 Rev.2.01 50 100 150 T j ,Junction Temperature ( o C) Fig 12. Gate Threshold Voltage vs. Junction Temperature www.SiliconStandard.com 10 of 11 SSM2030GM P-channel VDS 90% RD VDS D RG TO THE OSCILLOSCOPE 0.5 x RATED VDS G 10% S -4.5 V VGS VGS td(on) Fig 13. Switching Time Circuit td(off) tf tr Fig 14. Switching Time Waveform VG VDS D -4.5V 0.3 x RATED VDS G S QG TO THE OSCILLOSCOPE QGS QGD VGS -1~-3mA I G ID Charge Fig 15. Gate Charge Circuit Q Fig 16. Gate Charge Waveform Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 2/10/2005 Rev.2.01 www.SiliconStandard.com 11 of 11