SSM4501GM N AND P-CHANNEL ENHANCEMENT MODE POWER MOSFET PRODUCT SUMMARY N-CH BVDSS D2 Simple Drive Requirement Low On-resistance Fast Switching 30V RDS(ON) D2 D1 D1 28mΩ ID P-CH BVDSS G2 S2 SO-8 S1 7A G1 DESCRIPTION -30V RDS(ON) 50mΩ ID -5.3A The advanced power MOSFETs from Silicon Standard Corp. provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The SO-8 package is universally preferred for all commercialindustrial surface mount applications and suited for low voltage applications such as DC/DC converters. D2 D1 Pb-free; RoHS-compliant G2 G1 S2 S1 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Rating N-channel VDS Drain-Source Voltage VGS Gate-Source Voltage ID@TA=25℃ ID@TA=70℃ Units P-channel 30 -30 V ±20 ±20 V 3 7 -5.3 A 3 5.8 -4.7 A 20 -20 A Continuous Drain Current Continuous Drain Current 1 IDM Pulsed Drain Current PD@TA=25℃ Total Power Dissipation 2 W Linear Derating Factor 0.016 W/℃ TSTG Storage Temperature Range -55 to 150 ℃ TJ Operating Junction Temperature Range -55 to 150 ℃ THERMAL DATA Symbol Rthj-amb 08/17/2007 Rev.1.00 Parameter Thermal Resistance Junction-ambient 3 www.SiliconStandard.com Max. Value Unit 62.5 ℃/W 1 SSM4501GM N-CH ELECTRICAL CHARACTERISTICS o @Tj=25 C (unless otherwise specified) Symbol Parameter Test Conditions BVDSS Drain-Source Breakdown Voltage ΔBVDSS/ΔTj Breakdown Voltage Temperature Coefficient Reference to 25℃, ID=1mA RDS(ON) 30 - - V - 0.02 - V/℃ VGS=10V, ID=7A - - 28 mΩ VGS=4.5V, ID=5A - - 42 mΩ VDS=VGS, ID=250uA 1 - 3 V VDS=10V, ID=7A - 13 - S Drain-Source Leakage Current (Tj=25 C) VDS=30V, VGS=0V - - 1 uA Drain-Source Leakage Current (Tj=70oC) VDS=24V, VGS=0V - - 25 uA Gate-Source Leakage VGS=±20V - - ID=7A - 8.4 - nC Static Drain-Source On-Resistance VGS(th) Gate Threshold Voltage gfs Forward Transconductance o IDSS IGSS 2 VGS=0V, ID=250uA Min. Typ. Max. Units 2 ±100 nA Qg Total Gate Charge Qgs Gate-Source Charge VDS=24V - 2.1 - nC Qgd Gate-Drain ("Miller") Charge VGS=4.5V - 4.7 - nC VDS=15V - 6 - ns 2 td(on) Turn-on Delay Time tr Rise Time ID=1A - 5.2 - ns td(off) Turn-off Delay Time RG=3.3Ω,VGS=10V - 18.8 - ns tf Fall Time RD=15Ω - 4.4 - ns Ciss Input Capacitance VGS=0V - 645 - pF Coss Output Capacitance VDS=25V - 150 - pF Crss Reverse Transfer Capacitance f=1.0MHz - 95 - pF SOURCE-DRAIN DIODE Symbol IS VSD Parameter Test Conditions Continuous Source Current ( Body Diode ) 2 Forward On Voltage 08/17/2007 Rev.1.00 Min. Typ. Max. Units VD=VG=0V , VS=1.2V - - 1.7 A Tj=25℃, IS=7A, VGS=0V - - 1.2 V www.SiliconStandard.com 2 SSM4501GM P-CH ELECTRICAL CHARACTERISTICS o @Tj=25 C (unless otherwise specified) Symbol Parameter Test Conditions BVDSS Drain-Source Breakdown Voltage ΔBVDSS/ΔTj Breakdown Voltage Temperature Coefficient Reference to 25℃, ID=-1mA RDS(ON) 2 Static Drain-Source On-Resistance VGS(th) Gate Threshold Voltage gfs Forward Transconductance IDSS IGSS VGS=0V, ID=-250uA Min. Typ. Max. Units -30 - - V - -0.03 - V/℃ VGS=-10V, ID=-5.3A - - 50 mΩ VGS=-4.5V, ID=-4.2A - - 90 mΩ VDS=VGS, ID=-250uA -1 - -3 V VDS=-10V, ID=-5.3A - 8.5 - S o VDS=-30V, VGS=0V - - -1 uA o Drain-Source Leakage Current (Tj=70 C) VDS=-24V, VGS=0V - - -25 uA Gate-Source Leakage VGS= ± 20V - - Drain-Source Leakage Current (Tj=25 C) 2 ±100 nA Qg Total Gate Charge ID=-5.3A - 20 - nC Qgs Gate-Source Charge VDS=-15V - 3.5 - nC Qgd Gate-Drain ("Miller") Charge VGS=-10V - 2 - nC VDS=-15V - 12 - ns 2 td(on) Turn-on Delay Time tr Rise Time ID=-1A - 20 - ns td(off) Turn-off Delay Time RG=6Ω,VGS=-10V - 45 - ns tf Fall Time RD=15Ω - 27 - ns Ciss Input Capacitance VGS=0V - 790 - pF Coss Output Capacitance VDS=-15V - 440 - pF Crss Reverse Transfer Capacitance f=1.0MHz - 120 - pF SOURCE-DRAIN DIODE Symbol Parameter Test Conditions IS Continuous Source Current ( Body Diode ) VD=VG=0V , VS=-1.2V VSD Forward On Voltage2 Tj=25℃, IS=-2.6A, VGS=0V Min. Typ. Max. Units -1.7 A - - -1.2 V Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 2 3.Surface mounted on 1 in copper pad of FR4 board ; 135℃/W when mounted on Min. copper pad. 08/17/2007 Rev.1.00 www.SiliconStandard.com 3 SSM4501GM N-Channel 36 36 10V 8.0V 6.0V 5.0V V GS =4.5V 24 ID , Drain Current (A) ID , Drain Current (A) 10V 8.0V 6.0V 5.0V 12 24 V GS =4.5V 12 T C =150 o C T C =25 o C 0 0 0 2 3 5 0 6 2 V DS , Drain-to-Source Voltage (V) 3 5 6 V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 2 90 I D =7.0A V GS = 10V I D =7.0A T C =25 ℃ Normalized RDS(ON) RDS(ON) (mΩ ) 70 50 1.4 0.8 30 10 0.2 2 6 10 14 -50 0 Fig 3. On-Resistance v.s. Gate Voltage 08/17/2007 Rev.1.00 50 100 150 T j , Junction Temperature ( o C) V GS (V) Fig 4. Normalized On-Resistance v.s. Junction Temperature www.SiliconStandard.com 4 SSM4501GM 8 2.4 6 1.8 PD (W) ID , Drain Current (A) N-Channel 4 1.2 0.6 2 0 0 25 50 75 100 125 0 150 50 100 150 T c ,Case Temperature ( o C) o T c , Case Temperature ( C) Fig 5. Maximum Drain Current v.s. Fig 6. Typical Power Dissipation Case Temperature 100 1 Normalized Thermal Response (Rthja) Duty Factor = 0.5 10 ID (A) 1ms 10ms 1 100ms 1s 0.1 T C =25 o C Single Pulse 10s DC 0.2 0.1 0.1 0.05 0.02 0.01 PDM 0.01 t T Single Pulse Duty Factor = t/T Peak Tj = P DM x R thja + Ta o Rthja=135 C/W 0.001 0.01 0.1 1 10 100 0.0001 0.001 0.01 0.1 1 10 100 1000 V DS (V) t , Pulse Width (s) Fig 7. Maximum Safe Operating Area 08/17/2007 Rev.1.00 Fig 8. Effective Transient Thermal Impedance www.SiliconStandard.com 5 SSM4501GM N-Channel f=1.0MHz 12 10000 VGS , Gate to Source Voltage (V) I D =7.0A 9 V DS= 1 6 V V DS =20V V DS =24V 1000 C (pF) Ciss 6 Coss Crss 100 3 0 10 0 4 8 12 16 1 7 13 19 25 31 V DS (V) Q G , Total Gate Charge (nC) Fig 9. Gate Charge Characteristics Fig 10. Typical Capacitance Characteristics 3 100 2.5 10 2 T C =25 o C VGS(th) (V) IS(A) T C = 150 o C 1 1.5 1 0.1 0.5 0 0.01 0 0.4 0.8 1.2 -50 Fig 11. Forward Characteristic of Reverse Diode 08/17/2007 Rev.1.00 0 50 100 150 T j , Junction Temperature ( o C ) V SD (V) Fig 12. Gate Threshold Voltage v.s. Junction Temperature www.SiliconStandard.com 6 SSM4501GM N-Channel VDS 90% RD VDS D 0.5 x RATED VDS G RG TO THE OSCILLOSCOPE + 10% VGS S VGS 10V - td(on) Fig 13. Switching Time Circuit td(off) tf tr Fig 14. Switching Time Waveform VG VDS QG TO THE OSCILLOSCOPE D 4.5V 0.8 x RATED VDS QGS G S QGD VGS + 1~ 3 mA I G I D Charge Fig 15. Gate Charge Circuit 08/17/2007 Rev.1.00 Q Fig 16. Gate Charge Waveform www.SiliconStandard.com 7 SSM4501GM P-Channel 20 20 10V 8.0V 6.0V 10V 8.0V 6.0V 15 -ID , Drain Current (A) -ID , Drain Current (A) 15 V GS =4. 0 V 10 V GS =4. 0 V 10 5 5 T C =150 o C T C =25 o C 0 0 0 1 2 3 0 4 1 Fig 1. Typical Output Characteristics 3 4 Fig 2. Typical Output Characteristics 90 1.8 I D =-5.3A T C =25 ℃ I D =-5.3A 80 1.6 70 1.4 Normalized RDS(ON) RDS(ON) (mΩ ) 2 -V DS , Drain-to-Source Voltage (V) -V DS , Drain-to-Source Voltage (V) 60 50 V GS = -10V 1.2 1 0.8 40 0.6 30 3 4 5 6 7 8 9 10 11 -50 -V GS (V) Fig 3. On-Resistance v.s. Gate Voltage 08/17/2007 Rev.1.00 0 50 100 150 T j , Junction Temperature ( o C) Fig 4. Normalized On-Resistance v.s. Junction Temperature www.SiliconStandard.com 8 SSM4501GM P-Channel 6 2.4 5 4 PD (W) -ID , Drain Current (A) 1.8 3 1.2 2 0.6 1 0 0 25 50 75 100 125 150 0 50 o 100 150 T c ,Case Temperature ( o C) T c , Case Temperature ( C) Fig 5. Maximum Drain Current v.s. Fig 6. Typical Power Dissipation Case Temperature 1 100 Normalized Thermal Response (R thja) Duty Factor = 0.5 10 -ID (A) 1ms 10ms 1 100ms 1s 0.1 10s DC o T C =25 C Single Pulse 0.01 0.2 0.1 0.1 0.05 0.02 0.01 PDM t 0.01 T Single Pulse Duty Factor = t/T Peak Tj = P DM x Rthja + Ta Rthja=195 oC/W 0.001 0.1 1 10 100 0.0001 0.001 0.01 0.1 1 10 100 1000 -V DS (V) t , Pulse Width (s) Fig 7. Maximum Safe Operating Area Fig 8. Effective Transient Thermal Impedance 08/17/2007 Rev.1.00 www.SiliconStandard.com 9 SSM4501GM P-Channel 14 I D =-5.3A 12 10 1000 V DS =-10V V DS =-15V V DS =-20V 8 Ciss C (pF) -VGS , Gate to Source Voltage (V) f=1.0MHz 10000 6 Coss Crss 100 4 2 0 10 0 5 10 15 20 25 30 1 5 9 13 17 21 25 29 -V DS (V) Q G , Total Gate Charge (nC) Fig 9. Gate Charge Characteristics Fig 10. Typical Capacitance Characteristics 3 100.00 2.5 10.00 T j =150 o C -VGS(th) (V) -IS(A) 2 T j =25 o C 1.5 1.00 1 0.10 0.5 0.01 0 0.1 0.4 0.7 1 1.3 -50 0 -V SD (V) Fig 11. Forward Characteristic of Reverse Diode 08/17/2007 Rev.1.00 50 100 150 T j ,Junction Temperature ( o C) Fig 12. Gate Threshold Voltage v.s. Junction Temperature www.SiliconStandard.com 10 SSM4501GM P-Channel VDS 90% RD VDS D RG TO THE OSCILLOSCOPE 0.5 x RATED VDS G 10% S -10 V VGS VGS td(on) Fig 13. Switching Time Circuit td(off) tf tr Fig 14. Switching Time Waveform VG VDS -10V 0.5 x RATED VDS G S QG TO THE OSCILLOSCOPE D QGS QGD VGS -1~-3mA I G ID Charge Fig 15. Gate Charge Circuit 08/17/2007 Rev.1.00 Q Fig 16. Gate Charge Waveform www.SiliconStandard.com 11 SSM4501GM Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, expressed or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 08/17/2007 Rev.1.00 www.SiliconStandard.com 12