SSM4426GM N-channel Enhancement-mode Power MOSFET PRODUCT SUMMARY BVDSS 30V R DS(ON) 6.5mΩ ID 16A DESCRIPTION The SSM4426GM acheives fast switching performance with low gate charge without a complex drive circuit. It is suitable for low voltage applications such as DC/DC converters and general load-switching circuits. The SSM4426GM is supplied in an RoHS-compliant SO-8 package, which is widely used for medium power commercial and industrial surface mount applications. Pb-free; RoHS-compliant SO-8 D D D D G SO-8 S S S ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Units VDS Drain-source voltage 30 V VGS Gate-source voltage ±20 V ID Continuous drain current, TC = 25°C 16 A 12.8 A 80 A 2.5 W 0.02 W/°C TC = 70°C 1 IDM Pulsed drain current PD Total power dissipation, TC = 25°C Linear derating factor TSTG Storage temperature range -55 to 150 °C TJ Operating junction temperature range -55 to 150 °C THERMAL CHARACTERISTICS Symbol RΘ JA Parameter Maximum thermal resistance, junction-ambient 3 Value Units 50 °C/W Notes: 1.Pulse width must be limited to avoid exceeding the maximum junction temperature of 150°C. 2.Pulse width <300us, duty cycle <2%. 3.Mounted on a square inch of copper pad on FR4 board ; 125°C/W when mounted on the minimum pad area required for soldering. 4/16/2006 Rev.3.01 www.SiliconStandard.com 1 of 5 SSM4426GM ELECTRICAL CHARACTERISTICS Symbol (at Tj = 25°C, unless otherwise specified) Parameter Test Conditions Min. Typ. Max. Units 30 - - V BVDSS Drain-source breakdown voltage VGS=0V, ID=250uA ∆ BV DSS/∆ Tj Breakdown voltage temperature coefficient Reference to 25°C, ID=1mA - 0.02 - V/°C RDS(ON) Static drain-source on-resistance2 VGS=10V, ID=16A - - 6.5 mΩ VGS=4.5V, ID=12A - - 10 mΩ 0.8 - 2.5 V VGS(th) Gate threshold voltage VDS=VGS, ID=250uA gfs Forward transconductance VDS=10V, ID=16A - 30 - S IDSS Drain-source leakage current VDS=30V, VGS=0V - - 1 uA VDS=24V ,VGS=0V, Tj = 70°C - - 25 uA VGS=±20V - - ±100 nA ID=16A - 28 45 nC IGSS Gate-source leakage current 2 Qg Total gate charge Qgs Gate-source charge VDS=25V - 5 - nC Qgd Gate-drain ("Miller") charge VGS=4.5V - 16 - nC VDS=15V - 12 - ns 2 td(on) Turn-on delay time tr Rise time ID=1A - 8 - ns td(off) Turn-off delay time RG=3.3Ω , VGS=10V - 44 - ns tf Fall time RD=15Ω - 17 - ns Ciss Input capacitance VGS=0V - 2000 3200 pF Coss Output capacitance VDS=25V - 500 - pF Crss Reverse transfer capacitance f=1.0MHz - 1370 - pF Rg Gate resistance f=1.0MHz - 1.1 1.7 Ω Min. Typ. IS=1.9A, VGS=0V - - 1.3 V Source-Drain Diode Symbol Parameter Test Conditions Max. Units VSD Forward voltage trr Reverse-recovery time IS=16A, VGS=0V, - 30 - ns Qrr Reverse-recovery charge dI/dt=100A/µs - 25 - nC 2 Notes: 1.Pulse width must be limited to avoid exceeding the maximum junction temperature of 150°C. 2.Pulse width <300us, duty cycle <2%. 4/16/2006 Rev.3.01 www.SiliconStandard.com 2 of 5 SSM4426GM 100 100 10V 7.0V 5.0V 4.5V T A = 25 C ID , Drain Current (A) 80 60 80 V G =3.0V 40 V G =3.0V 60 40 20 20 0 0 0 2 4 0 6 2 Fig 1. Typical Output Characteristics 6 Fig 2. Typical Output Characteristics 20 1.9 I D = 16 A V G =10V I D = 12 A T A =25°C 15 1.4 Normalized RDS(ON) RDS(ON) (mΩ ) 4 V DS , Drain-to-Source Voltage (V) V DS , Drain-to-Source Voltage (V) 10 0.9 0.4 5 2 4 6 8 -50 10 0 50 100 150 T j , Junction Temperature ( o C) V GS , Gate-to-Source Voltage (V) Fig 3. On-Resistance vs. Gate Voltage Fig 4. Normalized On-Resistance vs. Junction Temperature 12 2.0 9 Normalized VGS(th) (V) 1.5 o o T j =150 C T j =25 C IS(A) 6 3 1.0 0.5 0.0 0 0 0.2 0.4 0.6 0.8 1 -50 1.2 Fig 5. Forward Characteristic of Reverse Diode 0 50 100 150 T j , Junction Temperature ( o C) V SD , Source-to-Drain Voltage (V) 4/16/2006 Rev.3.01 10V 7.0V 5.0V 4.5V o T A = 150 C ID , Drain Current (A) o ff Fig 6. Gate Threshold Voltage vs. Junction Temperature www.SiliconStandard.com 3 of 5 SSM4426GM f=1.0MHz 16 10000 12 V DS = 15 V V DS = 20 V V DS = 25 V C iss C (pF) VGS , Gate to Source Voltage (V) I D = 16 A 8 1000 C oss C rss 4 100 0 0 20 40 1 60 5 9 13 17 21 25 29 V DS , Drain-to-Source Voltage (V) Q G , Total Gate Charge (nC) Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics 100 1 Duty factor=0.5 10 Normalized Thermal Response (Rthja) 100us 1ms ID (A) 10ms 1 100ms 1s 0.1 T A =25 o C Single Pulse DC 0.2 0.1 0.1 0.05 0.02 PDM 0.01 0.01 t T Single Pulse Duty factor = t/T Peak Tj = PDM x Rthja + T a Rthja=125 oC/W 0.001 0.01 0.1 1 10 100 0.0001 0.001 0.01 V DS , Drain-to-Source Voltage (V) 0.1 1 10 100 t , Pulse Width (s) Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance 100 VG V DS =5V ID , Drain Current (A) 80 T j =25 o C T j =150 o C QG 4.5V 60 QGS QGD 40 20 Charge Q 0 0 1 2 3 4 5 V GS , Gate-to-Source Voltage (V) Fig 11. Transfer Characteristics 4/16/2006 Rev.3.01 Fig 12. Gate Charge Waveform www.SiliconStandard.com 4 of 5 SSM4426GM PHYSICAL DIMENSIONS D SYMBOL MIN MAX A 1.35 1.75 A1 0.10 0.25 B 0.33 0.51 C 0.19 0.25 D 4.80 5.00 E 3.80 4.00 H E e e A A1 C B L 1.27(TYP) H 5.80 6.50 L 0.38 1.27 All dimensions in millimeters. Dimensions do not include mold protrusions. PART MARKING PART NUMBER: 4426GM XXXXXX YWWSSS DATE/LOT CODE: (YWWSSS) Y = last digit of the year WW = week SSS = lot code sequence PACKING: Moisture sensitivity level MSL3 3000 pcs in antistatic tape on a 13 inch (330mm) reel packed in a moisture barrier bag (MBB). 4/16/2006 Rev.3.01 www.SiliconStandard.com 5 of 5