SSM4920M N-CHANNEL ENHANCEMENT-MODE POWER MOSFET Simple Drive Requirement D2 D2 Low On-resistance D1 D1 Fast Switching BV DSS 25V R DS(ON) 25mΩ 7A ID G2 S2 SO-8 S1 G1 Description D2 D1 Power MOSFETs from Silicon Standard provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and costeffectiveness. G2 G1 S1 S2 The SO-8 package is widely preferred for all commercial and industrial surface mount applications and suited for low voltage applications such as DC/DC converters. Absolute Maximum Ratings Symbol Parameter VDS Drain-Source Voltage VGS Gate-Source Voltage ID@TA=25℃ ID@TA=70℃ Rating Units 25 V ± 20 V 3 7 A 3 5.7 A Continuous Drain Current Continuous Drain Current 1,4 IDM Pulsed Drain Current 20 A PD@TA=25℃ Total Power Dissipation 2 W Linear Derating Factor 0.016 W/℃ TSTG Storage Temperature Range -55 to 150 ℃ TJ Operating Junction Temperature Range -55 to 150 ℃ Thermal Data Symbol Rthj-amb Rev.2.01 6/26/2003 Parameter Thermal Resistance Junction-ambient www.SiliconStandard.com Max. Value Unit 62.5 ℃/W 1 of 6 SSM4920M Electrical Characteristics @ Tj=25oC (unless otherwise specified) Symbol Parameter Test Conditions BVDSS Drain-Source Breakdown Voltage ΔBVDSS/ΔTj RDS(ON) 25 - - V Breakdown Voltage Temperature Coefficient Reference to 25℃, ID=1mA - 0.037 - V/℃ Static Drain-Source On-Resistance VGS=10V, ID=7A - - 25 mΩ VGS=4.5V, ID=5.2A - - 35 mΩ VDS=VGS, ID=250uA 1 - 3 V VGS(th) Gate Threshold Voltage gfs Forward Transconductance IDSS VDS=10V, ID=7A - 14 - S o VDS=25V, VGS=0V - - 1 uA o Drain-Source Leakage Current (Tj=55 C) VDS=20V, VGS=0V - - 25 uA Gate-Source Leakage VGS=±20V - - ID=7A - 10.5 - nC Drain-Source Leakage Current (Tj=25 C) IGSS VGS=0V, ID=250uA Min. Typ. Max. Units 2 ±100 nA Qg Total Gate Charge Qgs Gate-Source Charge VDS=15V - 1.9 - nC Qgd Gate-Drain ("Miller") Charge VGS=4.5V - 7.5 - nC VDS=15V - 8 - ns 2 td(on) Turn-on Delay Time tr Rise Time ID=1A - 9.5 - ns td(off) Turn-off Delay Time RG=6Ω,VGS=10V - 25 - ns tf Fall Time RD=15Ω - 13.5 - ns Ciss Input Capacitance VGS=0V - 395 - pF Coss Output Capacitance VDS=25V - 260 - pF Crss Reverse Transfer Capacitance f=1.0MHz - 105 - pF Source-Drain Diode Symbol Parameter IS Continuous Source Current ( Body Diode ) ISM Pulsed Source Current ( Body Diode ) 1 VSD 2 Forward On Voltage Test Conditions VD=VG=0V , VS=1.2V Tj=25℃, IS=2.1A, VGS=0V Min. Typ. Max. Units - - 2.1 A - - 20 A - 0.8 1.2 V Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on FR4 board, t<10sec. 4.Pulse width <10us , duty cycle <1%. Rev.2.01 6/26/2003 www.SiliconStandard.com 2 of 6 SSM4920M 20 20 T C =25 o C T C =150 o C V G =10V V G =10V V G =8.0V V G =8.0V 15 V G =6.0V ID , Drain Current (A) ID , Drain Current (A) 15 V G =5.0V V G =4.0V 10 V G =6.0V V G =5.0V V G =4.0V 10 5 5 0 0 0 1 2 3 4 5 6 0 7 1 2 3 4 5 6 7 V DS , Drain-to-Source Voltage (V) V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 50 1.8 Id=7A T c =25 ℃ I D =7A V G =10V 1.6 Normalized RDS(ON) RDSON (mΩ ) 40 30 1.4 1.2 1.0 20 0.8 10 0.6 3 4 5 6 7 8 9 10 11 -50 Fig 3. On-Resistance v.s. Gate Voltage Rev.2.01 6/26/2003 0 50 100 150 T j , Junction Temperature ( o C) V GS (V) Fig 4. Normalized On-Resistance v.s. Junction Temperature www.SiliconStandard.com 3 of 6 SSM4920M 3 8 7 6 ID , Drain Current (A) 2 PD (W) 5 4 3 1 2 1 0 0 25 50 75 100 125 0 150 50 100 150 T c ,Case Temperature ( o C) T c , Case Temperature ( o C) Fig 5. Maximum Drain Current v.s. Fig 6. Typical Power Dissipation Case Temperature 1 100 10 Normalized Thermal Response (Rthja) DUTY=0.5 1ms ID (A) 10ms 100ms 1 0.1 0.1 0.05 0.02 0.01 P DM 0.01 1s T c =25 o C Single Pulsee 0.2 t T SINGLE PULSE Duty factor = t/T Peak Tj = PDM x Rthja + Ta 0.001 0.1 0.1 Rev.2.01 6/26/2003 1 10 100 0.0001 0.001 0.01 0.1 1 10 100 1000 V DS (V) t , Pulse Width (s) Fig 7. Maximum Safe Operating Area Fig 8. Effective Transient Thermal Impedance www.SiliconStandard.com 4 of 6 SSM4920M 12 I D =7A V DS =15V 10 8 1000 Ciss C (pF) VGS , Gate to Source Voltage (V) f=1.0MHz 10000 6 4 Coss 100 Crss 2 0 10 0 2 4 6 8 10 12 14 16 18 1 20 5 9 13 17 21 25 29 V DS (V) Q G , Total Gate Charge (nC) Fig 9. Gate Charge Characteristics Fig 10. Typical Capacitance Characteristics 3 100.00 2.5 10.00 2 VGS(th) (V) IS(A) T j =150 o C T j =25 o C 1.00 1.5 1 0.10 0.5 0.01 0 0.1 0.3 0.5 0.7 0.9 1.1 1.3 Fig 11. Forward Characteristic of Rev.2.01 6/26/2003 -50 0 50 100 150 T j ,Junction Temperature ( o C) V SD (V) Reverse Diode 1.5 Fig 12. Gate Threshold Voltage v.s. Junction Temperature www.SiliconStandard.com 5 of 6 SSM4920M VDS 90% RD VDS D 0.6x RATED VDS G RG TO THE OSCILLOSCOPE 10% VGS S + VGS 10V - td(on) Fig 13. Switching Time Circuit tr td(off) tf Fig 14. Switching Time Waveform VG VDS QG TO THE OSCILLOSCOPE D 4.5V 0.6 x RATED VDS QGS G S QGD VGS + 1~ 3 mA I G I D Charge Fig 15. Gate Charge Circuit Q Fig 16. Gate Charge Waveform Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. Rev.2.01 6/26/2003 www.SiliconStandard.com 6 of 6