SSM9620M P-CHANNEL ENHANCEMENT-MODE POWER MOSFET Low on-resistance D D Capable of 2.5V drive D D Fast switching G Simple drive requirement SO-8 S BVDSS -20V R DS(ON) 20mΩ ID -9.5A S S Description D Power MOSFETs from Silicon Standard provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. G S The SSM9620M is supplied in the SO-8 package, which is widely preferred for commercial and industrial surface-mount applications. This device is well suited for low voltage applications such as DC/DC converters. Absolute Maximum Ratings Parameter Symbol VDS Drain-Source Voltage VGS Gate-Source Voltage ID @ TA=25°C ID @ TA=70°C Rating Units - 20 V ±12 V 3 -9.5 A 3 -7.6 A Continuous Drain Current Continuous Drain Current 1,2 IDM Pulsed Drain Current -76 A PD @ TA=25°C Total Power Dissipation 2.5 W Linear Derating Factor 0.02 W/°C TSTG Storage Temperature Range -55 to 150 °C TJ Operating Junction Temperature Range -55 to 150 °C Thermal Data Symbol Rthj-amb Rev.2.02 3/06/2004 Value Parameter Thermal Resistance Junction-ambient Max. www.SiliconStandard.com 50 Unit °C/W 1 of 6 SSM9620M Electrical Characteristics @ Tj=25oC (unless otherwise specified) Symbol Parameter Test Conditions BVDSS Drain-Source Breakdown Voltage ∆ BV DSS/∆ T j RDS(ON) -20 - Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=-1mA - -0.037 Static Drain-Source On-Resistance VGS=-4.5V, ID=-9.5A - VGS=-2.5V, ID=-6.0A VGS(th) Gate Threshold Voltage gfs Forward Transconductance IDSS VGS=0V, ID=-250uA - V - V/°C - 20 mΩ - - 35 mΩ VDS=VGS, ID=-250uA - - -1 V VDS=-10V, ID=-9.5A - 28 - S o VDS=-20V, VGS=0V - - -1 uA o Drain-Source Leakage Current (Tj=70 C) VDS=-16V, VGS=0V - - -25 uA Gate-Source Leakage VGS= ± 12V - - ±100 nA ID=-9.5A - 30 - nC Drain-Source Leakage Current (Tj=25 C) IGSS Min. Typ. Max. Units 2 Qg Total Gate Charge Qgs Gate-Source Charge VDS=-10V - 6 - nC Qgd Gate-Drain ("Miller") Charge VGS=-5V - 3.5 - nC VDS=-10V - 26 - ns 2 td(on) Turn-on Delay Time tr Rise Time ID=-9.5A - 500 - ns td(off) Turn-off Delay Time RG=6Ω ,VGS=-4.5V - 70 - ns tf Fall Time RD=1.05Ω - 300 - ns Ciss Input Capacitance VGS=0V - 2158 - pF Coss Output Capacitance VDS=-15V - 845 - pF Crss Reverse Transfer Capacitance f=1.0MHz - 230 - pF Source-Drain Diode Symbol IS ISM VSD Parameter Test Conditions VD=VG=0V , VS=-1.2V Continuous Source Current ( Body Diode ) Pulsed Source Current ( Body Diode ) 1 2 Forward On Voltage Tj=25°C, IS=-2.5A, VGS=0V Min. Typ. Max. Units - - -2.5 A - - -76 A - - -1.2 V Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on FR4 board, t<10 sec. Rev.2.02 3/06/2004 www.SiliconStandard.com 2 of 6 SSM9620M 120 100 -10V T C =150 o C -10V T C =25 o C -8.0V 80 -8.0V -ID , Drain Current (A) -ID , Drain Current (A) 90 -6.0V 60 V GS =-4.0V 60 -6.0V V GS =-4.0V 40 30 20 0 0 0 2 4 0 6 2 Fig 1. Typical Output Characteristics 6 8 Fig 2. Typical Output Characteristics 1.6 40 I D =-9.5A V GS =4.5V I D =-9.5A T C =25 ℃ 1.4 Normalized R DS(ON) 35 RDS(ON) (mΩ ) 4 -V DS , Drain-to-Source Voltage (V) -V DS , Drain-to-Source Voltage (V) 30 25 1.2 1.0 0.8 20 0.6 15 1 2 3 4 5 6 -50 0 -V GS (V) 100 150 o T j , Junction Temperature ( C) Fig 3. On-Resistance v.s. Gate Voltage Rev.2.02 3/06/2004 50 Fig 4. Normalized On-Resistance vs. Junction Temperature www.SiliconStandard.com 3 of 6 SSM9620M 3 10 2.5 2 6 PD (W) -ID , Drain Current (A) 8 1.5 4 1 2 0.5 0 0 25 50 75 100 125 150 0 30 60 90 120 150 o T c , Case Temperature ( o C) T c , Case Temperature ( C) Fig 5. Maximum Drain Current vs. Case Temperature Fig 6. Typical Power Dissipation 1 1000.00 Normalized Thermal Response (R thja) Duty Factor = 0.5 100.00 100us 1ms -ID (A) 10.00 10ms 100ms 1.00 1s 0.10 0.2 0.1 0.1 0.05 0.02 0.01 PDM 0.01 t Single Pulse T Duty Factor = t/T Peak Tj = P DM x Rthja + Ta T c =25 o C Single Pulse 0.001 0.01 0.1 1 10 100 0.0001 0.001 Fig 7. Maximum Safe Operating Area Rev.2.02 3/06/2004 0.01 0.1 1 10 100 1000 t , Pulse Width (s) -V DS (V) Fig 8. Effective Transient Thermal Impedance www.SiliconStandard.com 4 of 6 SSM9620M f=1.0MHz 7 10000 I D =-9.5A V DS =-10V 5 Ciss 4 C (pF) -VGS , Gate to Source Voltage (V) 6 1000 Coss 3 2 Crss 1 100 0 0 5 10 15 20 25 30 35 1 40 8 100.00 1.2 10.00 0.9 T j =25 o C 1.00 22 29 Fig 10. Typical Capacitance Characteristics -VGS(th) (V) -IS(A) Fig 9. Gate Charge Characteristics T j =150 o C 15 -V DS (V) Q G , Total Gate Charge (nC) 0.10 0.6 0.3 0.01 0 0.1 0.4 0.7 1 1.3 -50 0 Fig 11. Forward Characteristic of Reverse Diode Rev.2.02 3/06/2004 50 100 150 T j , Junction Temperature ( o C) -V SD (V) Fig 12. Gate Threshold Voltage vs. Junction Temperature www.SiliconStandard.com 5 of 6 SSM9620M VDS 90% RD VDS D 0.5 x RATED VDS G RG TO THE OSCILLOSCOPE 10% S VGS VGS -5V td(on) Fig 13. Switching Time Circuit td(off) tf tr Fig 14. Switching Time Waveform VG VDS QG TO THE OSCILLOSCOPE D 0.5 x RATED VDS -4.5V QGS G S QGD VGS -1~-3mA I I G D Charge Fig 15. Gate Charge Circuit Q Fig 16. Gate Charge Waveform Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. Rev.2.02 3/06/2004 www.SiliconStandard.com 6 of 6