SSM4410M N-CHANNEL ENHANCEMENT MODE POWER MOSFET Low on-resistance BV D D Fast switching R DS(ON) D D Simple drive requirement S 30V 13.5mΩ 10A ID G SO-8 DSS S S Description D Power MOSFETs from Silicon Standard provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. G S The SO-8 package is widely preferred for commercial and industrial surface mount applications and well suited for low voltage applications such as DC/DC converters. Absolute Maximum Ratings Parameter Symbol VDS Drain-Source Voltage VGS Gate-Source Voltage ID @ TA=25°C ID @ TA=70°C Rating Units 30 V ± 20 V 3 10 A 3 8 A Continuous Drain Current Continuous Drain Current 1,2 IDM Pulsed Drain Current 50 A PD @ TA=25°C Total Power Dissipation 2.5 W Linear Derating Factor 0.02 W/°C TSTG Storage Temperature Range -55 to 150 °C TJ Operating Junction Temperature Range -55 to 150 °C Thermal Data Symbol Rthj-amb Rev.2.02 12/29/2003 Parameter Thermal Resistance Junction-ambient Max. www.SiliconStandard.com Value Unit 50 °C/W 1 of 6 SSM4410M Electrical Characteristics @ T j=25oC (unless otherwise specified) Symbol BVDSS ∆ BV DSS/∆ Tj RDS(ON) Parameter Test Conditions Min. Typ. 30 - - V Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=1mA - 0.037 - V/°C Static Drain-Source On-Resistance VGS=10V, ID=10A - - 13.5 mΩ VGS=4.5V, ID=5A - - 22 mΩ VDS=VGS, ID=250uA 1 - 3 V VDS=15V, ID=10A - 20 - S Drain-Source Leakage Current (Tj=25 C) VDS=30V, VGS=0V - - 1 uA Drain-Source Leakage Current (Tj=55oC) VDS=24V, VGS=0V - - 25 uA Gate-Source Leakage VGS= ± 20V - - ±100 nA ID=10A - 16.6 - nC Drain-Source Breakdown Voltage VGS(th) Gate Threshold Voltage gfs Forward Transconductance VGS=0V, ID=250uA o IDSS IGSS 2 Max. Units Qg Total Gate Charge Qgs Gate-Source Charge VDS=15V - 2.7 - nC Qgd Gate-Drain ("Miller") Charge VGS=5V - 10.6 - nC VDS=25V - 9.6 - ns 2 td(on) Turn-on Delay Time tr Rise Time ID=1A - 12.4 - ns td(off) Turn-off Delay Time RG=3.3Ω , VGS=5V - 25.4 - ns tf Fall Time RD=25Ω - 33 - ns Ciss Input Capacitance VGS=0V - 745 - pF Coss Output Capacitance VDS=15V - 510 - pF Crss Reverse Transfer Capacitance f=1.0MHz - 210 - pF Min. Typ. - - 2.3 A - - 50 A - - 1.3 V Source-Drain Diode Symbol IS ISM VSD Parameter Test Conditions VD=VG=0V , VS=1.3V Continuous Source Current ( Body Diode ) Pulsed Source Current ( Body Diode ) 1 2 Forward On Voltage Tj=25°C, IS=2.3A, VGS=0V Max. Units Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on FR4 board, t<10 sec. Rev.2.02 12/29/2003 www.SiliconStandard.com 2 of 6 SSM4410M 150 200 o T C =150 o C V G =10V T C =25 C V G =10V V G =8.0V V G =8.0V ID , Drain Current (A) ID , Drain Current (A) 150 V G =6.0V 100 100 V G =6.0V 50 V G =4.0V 50 V G =4.0V 0 0 0 1 2 3 4 5 6 7 0 8 2 6 8 V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 20 1.8 I D =10A V G =10V I D =10A T C =25 o C 1.6 Normalized R DS(ON) 18 RDSON (mΩ ) 4 V DS , Drain-to-Source Voltage (V) 16 14 1.4 1.2 1 12 0.8 0.6 10 3 4 5 6 7 8 9 10 11 -50 0 Fig 3. On-Resistance v.s. Gate Voltage Rev.2.02 12/29/2003 50 100 150 T j , Junction Temperature ( o C) V GS (V) Fig 4. Normalized On-Resistance vs. Junction Temperature www.SiliconStandard.com 3 of 6 12 3 10 2.5 8 2 PD (W) ID , Drain Current (A) SSM4410M 6 1.5 4 1 2 0.5 0 0 25 50 75 100 125 0 150 30 T c , Case Temperature ( o C ) 60 90 120 150 o T c , Case Temperature ( C) Fig 5. Maximum Drain Current v.s. Case Temperature Fig 6. Typical Power Dissipation 1 100 10 Normalized Thermal Response (R thja) DUTY=0.5 ID (A) 1ms 10ms 1 100ms 1s T c =25 o C Single Pluse 0.1 0.1 1 10 100 0.2 0.1 0.1 0.05 0.02 0.01 PDM t 0.01 0.001 0.0001 T SINGLE PULSE Duty factor = t/T Peak Tj = P DM x Rthja + Ta 0.001 V DS (V) 0.1 1 10 100 1000 t , Pulse Width (s) Fig 7. Maximum Safe Operating Area Rev.2.02 12/29/2003 0.01 Fig 8. Effective Transient Thermal Impedance www.SiliconStandard.com 4 of 6 SSM4410M f=1.0MHz 10000 12 I D =10A V DS =15V 8 1000 Ciss C (pF) VGS , Gate to Source Voltage (V) 10 6 Coss Crss 4 100 2 0 10 0 5 10 15 20 25 1 7 13 19 V DS (V) Q G , Total Gate Charge (nC) Fig 9. Gate Charge Characteristics Fig 10. Typical Capacitance Characteristics 3 100.00 10.00 2 o o T j =25 C VGS(th) (V) IS(A) T j =150 C 1.00 1 0.10 0.01 0 0 0.4 0.8 1.2 -50 0 100 150 T j , Jujnction Temperature ( C ) Fig 11. Forward Characteristic of Reverse Diode Rev.2.02 12/29/2003 50 o V SD (V) Fig 12. Gate Threshold Voltage vs. Junction Temperature www.SiliconStandard.com 5 of 6 SSM4410M VDS 90% RD VDS D RG TO THE OSCILLOSCOPE VDS = 25V G + 10% VGS S 5v VGS - td(on) Fig 13. Switching Time Circuit td(off) tf tr Fig 14. Switching Time Waveform VG VDS 5V 0.5 xRATED VDS G S QG TO THE OSCILLOSCOPE D QGS QGD VGS + 1~ 3 mA I G ID Charge Fig 15. Gate Charge Circuit Q Fig 16. Gate Charge Waveform Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. Rev.2.02 12/29/2003 www.SiliconStandard.com 6 of 6