SSM4435M
P-CHANNEL ENHANCEMENT-MODE POWER MOSFET
Simple drive requirement
D
Low on-resistance
D
D
D
Fast switching
BVDSS
-30V
R DS(ON)
20mΩ
-8A
ID
G
SO-8
S
S
S
Description
D
Power MOSFETs from Silicon Standard provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and cost-effectiveness.
G
S
The SO-8 package is widely preferred for commercial and industrial
surface mount applications and is well suited for low voltage applications
such as DC/DC converters.
Absolute Maximum Ratings
Symbol
Parameter
VDS
Drain-Source Voltage
VGS
Gate-Source Voltage
I D @ TA=25°C
I D @ TA=70°C
Rating
Units
- 30
V
± 20
V
3
-8
A
3
-6
A
Continuous Drain Current
Continuous Drain Current
1,2
I DM
Pulsed Drain Current
-50
A
PD @ TA=25°C
Total Power Dissipation
2.5
W
Linear Derating Factor
0.02
W/ °C
TSTG
Storage Temperature Range
-55 to 150
°C
TJ
Operating Junction Temperature Range
-55 to 150
°C
Thermal Data
Symbol
Rthj-amb
Rev.2.02 4/18/2004
Parameter
Thermal Resistance Junction-ambient
Max.
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Value
Unit
50
°C/W
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SSM4435M
Electrical Characteristics @ Tj=25oC (unless otherwise specified)
Symbol
Parameter
Test Conditions
BVDSS
Drain-Source Breakdown Voltage
∆ BV DSS/∆ Tj
RDS(ON)
-30
-
-
V
Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=-1mA
-
-0.037
-
V/°C
Static Drain-Source On-Resistance
VGS=-10V, ID=-8A
-
-
20
mΩ
VGS=-4.5V, ID=-5A
-
-
35
mΩ
VDS=VGS, ID=-250uA
-1
-
-3
V
VGS(th)
Gate Threshold Voltage
gfs
Forward Transconductance
IDSS
VGS=0V, ID=-250uA
VDS=-15V, ID=-8A
-
20
-
S
o
VDS=-30V, VGS=0V
-
-
-1
uA
o
Drain-Source Leakage Current (Tj=70 C)
VDS=-24V, VGS=0V
-
-
-25
uA
Gate-Source Leakage
VGS= ± 20V
-
-
±100
nA
ID=-4.6A
-
36
-
nC
Drain-Source Leakage Current (Tj=25 C)
IGSS
Min. Typ. Max. Units
2
Qg
Total Gate Charge
Qgs
Gate-Source Charge
VDS=-15V
-
5.5
-
nC
Qgd
Gate-Drain ("Miller") Charge
VGS=-10V
-
3.5
-
nC
VDS=-15V
-
12
-
ns
2
td(on)
Turn-on Delay Time
tr
Rise Time
ID=-1A
-
8
-
ns
td(off)
Turn-off Delay Time
RG=6Ω , VGS=-10V
-
75
-
ns
tf
Fall Time
RD=15Ω
-
40
-
ns
Ciss
Input Capacitance
VGS=0V
-
1530
-
pF
Coss
Output Capacitance
VDS=-15V
-
900
-
pF
Crss
Reverse Transfer Capacitance
f=1.0MHz
-
280
-
pF
Source-Drain Diode
Symbol
IS
ISM
VSD
Parameter
Test Conditions
VD=VG=0V , VS=-1.2V
Continuous Source Current ( Body Diode )
Pulsed Source Current ( Body Diode )
1
2
Forward On Voltage
Tj=25°C, IS=-2.1A, VGS=0V
Min. Typ. Max. Units
-
-
-2.1
A
-
-
-50
A
-0.75 -1.2
V
-
Notes:
1.Pulse width limited by Max. junction temperature.
2.Pulse width <300us , duty cycle <2%.
3.Surface mounted on FR4 board, t<10 sec.
Rev.2.02 4/18/2004
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SSM4435M
50
50
T C =25 o C
40
V G =-8.0V
V G =-6.0V
V G =-6.0V
30
V G =-4.0V
20
30
V G =-4.0V
20
10
10
0
0
0
2
4
6
8
10
0
2
-V DS , Drain-to-Source Voltage (V)
4
6
8
10
-V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1.6
40
Id=-8A
T c =25 ℃
I D =-8A
V G =-10V
1.4
Normalized RDS(ON)
35
RDSON (mΩ )
V G =-10V
40
V G =-8.0V
-ID , Drain Current (A)
-ID , Drain Current (A)
T C =150 o C
V G =-10V
30
25
1.2
1.0
0.8
20
0.6
15
3
4
5
6
7
8
9
10
11
-50
0
100
150
o
T j , Junction Temperature ( C)
-V GS (V)
Fig 3. On-Resistance vs. Gate Voltage
Rev.2.02 4/18/2004
50
Fig 4. Normalized On-Resistance
v.s. Junction Temperature
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SSM4435M
3
10
2.5
2
6
PD (W)
-ID , Drain Current (A)
8
1.5
4
1
2
0.5
0
0
25
50
75
100
125
0
150
25
50
75
100
125
150
o
o
T c , Case Temperature ( C)
T c , Case Temperature ( C)
Fig 5. Maximum Drain Current vs.
Case Temperature
Fig 6. Typical Power Dissipation
1
100.00
DUTY=0.5
100us
0.2
Normalized Thermal Response (R thja)
1ms
10.00
-ID (A)
10ms
100ms
1s
1.00
0.1
0.1
0.05
0.02
0.01
PDM
t
SINGLE PULSE
0.01
T
Duty factor = t/T
Peak Tj = P DM x Rthja + Ta
T c =25 o C
Single Pulse
0.10
0.001
0.1
1
10
100
0.0001
0.001
-V DS (V)
0.1
1
10
100
1000
t , Pulse Width (s)
Fig 7. Maximum Safe Operating Area
Rev.2.02 4/18/2004
0.01
Fig 8. Effective Transient Thermal Impedance
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SSM4435M
f=1.0MHz
14
10000
I D =-4.6A
V DS =-15V
10
Ciss
8
C (pF)
-VGS , Gate to Source Voltage (V)
12
6
1000
Coss
4
Crss
2
0
100
0
5
10
15
20
25
30
35
40
45
50
1
5
9
Q G , Total Gate Charge (nC)
13
17
21
25
29
-V DS (V)
Fig 9. Gate Charge Characteristics
Fig 10. Typical Capacitance Characteristics
3
100.00
10.00
2
-VGS(th) (V)
-IS(A)
T j =150 o C
T j =25 o C
1.00
1
0.10
0.01
0
0.1
0.3
0.5
0.7
0.9
1.1
1.3
1.5
-50
0
Fig 11. Forward Characteristic of
Reverse Diode
Rev.2.02 4/18/2004
50
100
150
T j , Junction Temperature ( o C)
-V SD (V)
Fig 12. Gate Threshold Voltage vs.
Junction Temperature
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SSM4435M
VDS
90%
RD
VDS
D
TO THE
OSCILLOSCOPE
0.5 x RATED
RG
G
10%
VGS
S
VGS
-10 V
td(on)
Fig 13. Switching Time Circuit
td(off) tf
tr
Fig 14. Switching Time Waveform
VG
VDS
QG
TO THE
OSCILLOSCOPE
D
-10V
0.5 x RATED VDS
QGS
G
S
QGD
VGS
-1~-3mA
I
I
G
D
Charge
Fig 15. Gate Charge Circuit
Q
Fig 16. Gate Charge Waveform
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
Rev.2.02 4/18/2004
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