SSM9585GM
P-channel Enhancement-mode Power MOSFET
D
Simple drive requirement
Lower gate charge
Fast switching characteristics
G
Pb-free; RoHS compliant.
BVDSS
-80V
R DS(ON)
180mΩ
ID
-2.7A
S
DESCRIPTION
D
D
Advanced Power MOSFETs from Silicon Standard provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and cost-effectiveness.
D
D
G
The SSM9585GM is in the SO-8 package, which is widely preferred for
commercial and industrial surface mount applications. This device is suitable
for low voltage applications such as DC/DC converters.
SO-8
S
S
S
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDS
Drain-Source Voltage
VGS
Gate-Source Voltage
ID @ TA=25°C
ID @ TA=70°C
Rating
Units
-80
V
±25
V
3
-2.7
A
3
-2.1
A
Continuous Drain Current
Continuous Drain Current
1
IDM
Pulsed Drain Current
-20
A
PD @ TA=25°C
Total Power Dissipation
2.5
W
Linear Derating Factor
0.02
W/°C
TSTG
Storage Temperature Range
-55 to 150
°C
TJ
Operating Junction Temperature Range
-55 to 150
°C
THERMAL DATA
Symbol
RΘj-a
3/21/2005 Rev.2.01
Parameter
Maximum Thermal Resistance Junction-ambient
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3
Value
Unit
50
°C/W
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SSM9585GM
ELECTRICAL CHARACTERISTICS (at Tj = 25°C, unless otherwise specified)
Symbol
Parameter
Test Conditions
Min.
Typ.
-80
-
-
V
-
-0.07
-
V/°C
VGS=-10V, ID=-2.7A
-
-
180
mΩ
VGS=-4.5V, ID=-2.5A
-
-
200
mΩ
Gate Threshold Voltage
VDS=VGS, ID=-250uA
-1
-
-3
V
gfs
Forward Transconductance
VDS=-10V, ID=-2.7A
-
5
-
S
IDSS
Drain-Source Leakage Current (Tj=25oC)
VDS=-80V, VGS=0V
-
-
-1
uA
Drain-Source Leakage Current (Tj=70oC)
VDS=-64V, VGS=0V
-
-
-25
uA
Gate-Source Leakage
VGS=±25V
-
-
±100
nA
ID=-2.7A
-
18
28
nC
BVDSS
Drain-Source Breakdown Voltage
∆ BV DSS/∆ Tj
Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=-1mA
RDS(ON)
VGS(th)
IGSS
Static Drain-Source On-Resistance
2
VGS=0V, ID=-250uA
2
Max. Units
Qg
Total Gate Charge
Qgs
Gate-Source Charge
VDS=-64V
-
5
-
nC
Qgd
Gate-Drain ("Miller") Charge
VGS=-4.5V
-
7
-
nC
VDS=-40V
-
10
-
ns
2
td(on)
Turn-on Delay Time
tr
Rise Time
ID=-1A
-
6
-
ns
td(off)
Turn-off Delay Time
RG=3.3Ω , VGS=-10V
-
67
-
ns
tf
Fall Time
RD=40Ω
30
-
ns
Ciss
Input Capacitance
VGS=0V
-
1790 2860
pF
Coss
Output Capacitance
VDS=-25V
-
140
-
pF
Crss
Reverse Transfer Capacitance
f=1.0MHz
-
98
-
pF
Min.
Typ.
IS=-2A, VGS=0V
-
-
-1.2
V
SOURCE-DRAIN DIODE
Symbol
VSD
Parameter
2
Forward On Voltage
2
Test Conditions
Max. Units
trr
Reverse Recovery Time
IS=-2.7A, VGS=0V,
-
80
-
ns
Qrr
Reverse Recovery Charge
dI/dt=100A/µs
-
320
-
nC
Notes:
1.Pulse width limited by maximum junction temperature.
2.Pulse width <300us, duty cycle <2%.
3.Surface-mounted on 1 in2 copper pad on FR4 board; 125°C/W when mounted on minimum copper pad.
3/21/2005 Rev.2.01
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SSM9585GM
40
30
30
25
20
15
V G = -3.0 V
10
-10V
-6.0V
-5.0V
-4.5V
TA=150oC
25
-ID , Drain Current (A)
35
-ID , Drain Current (A)
-10V
-6.0V
-5.0V
-4.5V
T A = 25 o C
20
15
10
V G = -3.0 V
5
5
0
0
0
4
8
12
16
20
0
2
-V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
6
8
10
12
14
Fig 2. Typical Output Characteristics
150
2.2
2.0
I D = -2.5 A
T A =25°C
I D = -2.7 A
V G =-10V
1.8
Normalized R DS(ON)
145
RDS(ON) (mΩ )
4
-V DS , Drain-to-Source Voltage (V)
140
135
1.6
1.4
1.2
1.0
0.8
130
0.6
0.4
125
3
4
5
6
7
8
9
10
-50
11
0
-V GS , Gate-to-Source Voltage (V)
50
100
150
o
T j , Junction Temperature ( C)
Fig 3. On-Resistance vs. Gate Voltage
Fig 4. Normalized On-Resistance
vs. Junction Temperature
3
6
2.5
2
T j =150 o C
-VGS(th) (V)
-IS(A)
4
T j =25 o C
2
1.5
1
0.5
0
0
0
3/21/2005 Rev.2.01
0.2
0.4
0.6
0.8
1
1.2
1.4
-50
0
50
100
150
o
-V SD , Source-to-Drain Voltage (V)
T j , Junction Temperature ( C)
Fig 5. Forward Characteristic of
Reverse Diode
Fig 6. Gate Threshold Voltage vs.
Junction Temperature
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SSM9585GM
f=1.0MHz
10000
I D = -2.7A
V DS = -64V
10
C iss
8
1000
C (pF)
-VGS , Gate to Source Voltage (V)
12
6
4
C oss
C rss
100
2
0
10
0
10
20
30
40
1
5
Q G , Total Gate Charge (nC)
9
13
17
21
25
29
-V DS , Drain-to-Source Voltage (V)
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
1
100
Normalized Thermal Response (Rthja)
Duty factor=0.5
10
-ID (A)
1ms
1
10ms
100ms
0.1
T A =25 o C
Single Pulse
1s
DC
0.2
0.1
0.1
0.05
0.02
0.01
PDM
0.01
t
Single Pulse
T
Duty factor = t/T
Peak Tj = PDM x Rthja + Ta
Rthja=125°C/W
0.001
0.01
0.1
1
10
100
1000
0.0001
0.001
0.01
-V DS , Drain-to-Source Voltage (V)
Fig 9. Maximum Safe Operating Area
0.1
1
10
100
1000
t , Pulse Width (s)
Fig 10. Effective Transient Thermal Impedance
VG
VDS
90%
QG
-4.5V
QGS
QGD
10%
VGS
td(on) tr
td(off) tf
Fig 11. Switching Time Waveform
3/21/2005 Rev.2.01
Charge
Q
Fig 12. Gate Charge Waveform
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SSM9585GM
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
3/21/2005 Rev.2.01
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