SSM4424GM
N-channel Enhancement-mode Power MOSFET
D
Simple drive requirement
BVDSS
30V
Lower gate charge
R DS(ON)
9mΩ
ID
13.8A
G
Fast switching characteristics
S
Pb-free, RoHS compliant.
DESCRIPTION
D
Advanced Power MOSFETs from Silicon Standard provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and cost-effectiveness.
D
D
D
G
SO-8
The SSM4424GM is in the SO-8 package, which is widely preferred for
commercial and industrial surface mount applications, and is well suited
for low voltage applications such as DC/DC converters.
S
S
S
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDS
Drain-Source Voltage
VGS
Gate-Source Voltage
ID @ TA=25°C
ID @ TA=70°C
Rating
Units
30
V
± 20
V
3
13.8
A
3
11
A
Continuous Drain Current
Continuous Drain Current
1
IDM
Pulsed Drain Current
50
A
PD @ TA=25°C
Total Power Dissipation
2.5
W
Linear Derating Factor
0.02
W/°C
TSTG
Storage Temperature Range
-55 to 150
°C
TJ
Operating Junction Temperature Range
-55 to 150
°C
THERMAL DATA
Symbol
Rthj-a
5/25/2005 Rev.2.10
Parameter
Thermal Resistance Junction-ambient
3
Max.
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Value
Unit
50
°C/W
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SSM4424GM
Electrical Characteristics @ Tj=25oC(unless otherwise specified)
Symbol
Parameter
Test Conditions
Typ.
Max. Units
30
-
-
V
BVDSS
Drain-Source Breakdown Voltage
∆ BV DSS/∆ Tj
Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=1mA
-
0.02
-
V/°C
RDS(ON)
Static Drain-Source On-Resistance2
VGS=10V, ID=13A
-
-
9
mΩ
VGS=4.5V, ID=10A
-
-
14
mΩ
VDS=VGS, ID=250uA
1
-
3
V
VGS(th)
Gate Threshold Voltage
gfs
Forward Transconductance
IDSS
VDS=10V, ID=13A
-
21
-
S
o
VDS=30V, VGS=0V
-
-
1
uA
o
Drain-Source Leakage Current (Tj=70 C)
VDS=24V, VGS=0V
-
-
25
uA
Gate-Source Leakage
VGS=±20V
-
-
±100
nA
ID=13A
-
23
35
nC
Drain-Source Leakage Current (Tj=25 C)
IGSS
VGS=0V, ID=250uA
Min.
2
Qg
Total Gate Charge
Qgs
Gate-Source Charge
VDS=24V
-
6
-
nC
Qgd
Gate-Drain ("Miller") Charge
VGS=4.5V
-
15
-
nC
VDS=15V
-
13
-
ns
2
td(on)
Turn-on Delay Time
tr
Rise Time
ID=1A
-
9
-
ns
td(off)
Turn-off Delay Time
RG=3.3Ω,VGS=10V
-
35
-
ns
tf
Fall Time
RD=15Ω
-
17
-
ns
Ciss
Input Capacitance
VGS=0V
-
1920 3070
pF
Coss
Output Capacitance
VDS=25V
-
410
-
pF
Crss
Reverse Transfer Capacitance
f=1.0MHz
-
300
-
pF
Rg
Gate Resistance
f=1.0MHz
-
0.9
-
Ω
Min.
Typ.
Source-Drain Diode
Symbol
Parameter
2
Test Conditions
Max. Units
VSD
Forward On Voltage
IS=2.1A, VGS=0V
-
-
1.2
V
trr
Reverse Recovery Time2
IS=13A, VGS=0V,
-
33
-
ns
Qrr
Reverse Recovery Charge
dI/dt=100A/µs
-
26
-
nC
Notes:
1.Pulse width limited by Max. junction temperature.
2.Pulse width <300us , duty cycle <2%.
3.Surface mounted on 1 in2 copper pad of FR4 board ; 125°C/W when mounted on min. copper pad.
5/25/2005 Rev.2.10
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SSM4424GM
210
140
150
120
5.0V
90
10V
7.0V
o
T A = 150 C
120
ID , Drain Current (A)
T A = 25 o C
180
ID , Drain Current (A)
10V
7.0V
4.5V
60
100
80
5.0V
60
4.5V
40
V G =4.0V
30
20
V G =4.0V
0
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
0.0
0.5
V DS , Drain-to-Source Voltage (V)
1.5
2.0
2.5
3.0
3.5
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
16
1.6
I D = 10 A
T A =25°C
I D =1 3 A
V G =10V
1.4
Normalized R DS(ON)
14
RDS(ON) (mΩ )
1.0
12
10
1.2
1.0
0.8
8
0.6
6
3
5
7
9
-50
11
0
50
100
150
o
V GS , Gate-to-Source Voltage (V)
T j , Junction Temperature ( C)
Fig 3. On-Resistance vs. Gate Voltage
Fig 4. Normalized On-Resistance
vs. Junction Temperature
12
3.00
10
2.50
T j =150 o C
VGS(th) (V)
IS(A)
8
T j =25 o C
6
2.00
4
1.50
2
1.00
0
0
0.2
0.4
0.6
0.8
1
V SD , Source-to-Drain Voltage (V)
Fig 5. Forward Characteristic of
Reverse Diode
5/25/2005 Rev.2.10
1.2
-50
0
50
100
150
T j , Junction Temperature ( o C)
Fig 6. Gate Threshold Voltage vs.
Junction Temperature
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3 of 5
SSM4424GM
f=1.0MHz
16
10000
12
V DS =15V
V DS =20V
V DS =24V
C iss
C (pF)
VGS , Gate to Source Voltage (V)
I D = 13 A
8
1000
C oss
C rss
4
0
100
0
10
20
30
40
50
1
5
9
13
17
21
25
29
V DS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
1
100
10
1ms
ID (A)
10ms
1
100ms
1s
0.1
T A =25 o C
Single Pulse
DC
0.01
Normalized Thermal Response (Rthja)
Duty factor=0.5
0.2
0.1
0.1
0.05
0.02
0.01
PDM
t
0.01
T
Single Pulse
Duty factor = t/T
Peak Tj = PDM x Rthja + Ta
Rthja=125oC/W
0.001
0.1
1
10
100
0.0001
0.001
0.01
V DS , Drain-to-Source Voltage (V)
Fig 9. Maximum Safe Operating Area
0.1
1
10
100
1000
t , Pulse Width (s)
Fig 10. Effective Transient Thermal Impedance
VG
VDS
90%
QG
4.5V
QGS
QGD
10%
VGS
td(on) tr
td(off) tf
Fig 11. Switching Time Waveform
5/25/2005 Rev.2.10
Charge
Q
Fig 12. Gate Charge Waveform
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SSM4424GM
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
5/25/2005 Rev.2.10
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